- 01 6月, 2013 1 次提交
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由 Richard Henderson 提交于
The code reorganization in commit 4a6fd938 broke handling of PREFIX_ADR. While fixing this, tidy and comment the code so that it's more obvious what's going on in setting both aflag and dflag. The TARGET_X86_64 ifdef can be eliminated because CODE64 expands to the constant zero when TARGET_X86_64 is undefined. Cc: Paolo Bonzini <pbonzini@redhat.com> Reported-by: NLaszlo Ersek <lersek@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Message-id: 1369855851-21400-1-git-send-email-rth@twiddle.net Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 11 5月, 2013 1 次提交
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由 Aurelien Jarno 提交于
Fix EFLAGS corruption by ROR r8/r16 imm instruction located at the end of the TB, similarly to commit 089305ac for the non-immediate case. Reported-by: NHervé Poussineau <hpoussin@reactos.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 02 5月, 2013 1 次提交
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由 Eduardo Habkost 提交于
This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 21 4月, 2013 1 次提交
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由 Pavel Dovgaluk 提交于
Fixed EFLAGS corruption by ROR r8/r16 instruction located at the end of the TB. Signed-off-by: NPavel Dovgalyuk <pavel.dovgaluk@gmail.com> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 13 4月, 2013 2 次提交
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由 Aurelien Jarno 提交于
Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Aurelien Jarno 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 02 4月, 2013 1 次提交
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由 Aurelien Jarno 提交于
gen_op_mov_TN_reg() loads the value in cpu_T[0], so this temporary should be used instead of cpu_tmp0. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 23 3月, 2013 1 次提交
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由 Richard Henderson 提交于
When starting from CC_OP_DYNAMIC, and issuing adox before adcx, a typo used the wrong value for the resulting CC_OP. Cc: Blue Swirl <blauwirbel@gmail.com> Reported-by: NTorbjorn Granlund <tg@gmplib.org> Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 22 3月, 2013 1 次提交
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由 Peter Maydell 提交于
Fix various typos and misspellings. The bulk of these were found with codespell. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
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- 03 3月, 2013 1 次提交
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由 Peter Maydell 提交于
The gen_icount_start/end functions are now somewhat misnamed since they are useful for generic "start/end of TB" code, used for more than just icount. Rename them to gen_tb_start/end. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 28 2月, 2013 1 次提交
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由 Richard Henderson 提交于
These correspond very closely to the insns that we're emulating. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 24 2月, 2013 1 次提交
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 20 2月, 2013 7 次提交
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由 Richard Henderson 提交于
With this being all straight-line code, it can get deleted when the cc variables die. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
The shift and rotate insns use movcond to set CC_OP, and thus achieve a conditional EFLAGS setting. By discarding CC_OP in a later flags setting insn, we can discard that movcond. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
With this being all straight-line code, it can get deleted when the cc variables die. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
With this being all straight-line code, it can get deleted when the cc variables die. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Special case xor with self. We need not even store the known zero into cc_src. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
We weren't computing flags for lzcnt at all. At the same time, adjust the implementation of bsf/bsr to avoid the local branch, using movcond instead. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 19 2月, 2013 21 次提交
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Do all of group 17 at one time for ease. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
As this is the first of the BMI insns to be implemented, this carries quite a bit more baggage than normal. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
No actual required uses of these encodings yet. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Avoid duplicating switch statement between 32 and 64-bit modes. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Add another slot in ENV and store two of the three inputs. This lets us do less work when carry-out is not needed, and avoids the unpredictable CC_OP after translating these insns. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Pass the data in explicitly, rather than indirectly via env. This avoids all sorts of unnecessary register spillage. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
After a comparison or subtraction, the original value of the LHS will currently be reconstructed using an addition. However, in most cases it is already available: store it in a temp-local variable and save 1 or 2 TCG ops (2 if the result of the addition needs to be extended). The temp-local can be declared dead as soon as the cc_op changes again, or also before the translation block ends because gen_prepare_cc will always make a copy before returning it. All this magic, plus copy propagation and dead-code elimination, ensures that the temp local will (almost) never be spilled. Example (cmp $0x21,%rax + jbe): Before After ---------------------------------------------------------------------------- movi_i64 tmp1,$0x21 movi_i64 tmp1,$0x21 movi_i64 cc_src,$0x21 movi_i64 cc_src,$0x21 sub_i64 cc_dst,rax,tmp1 sub_i64 cc_dst,rax,tmp1 add_i64 tmp7,cc_dst,cc_src movi_i32 cc_op,$0x11 movi_i32 cc_op,$0x11 brcond_i64 tmp7,cc_src,leu,$0x0 discard loc11 brcond_i64 rax,cc_src,leu,$0x0 Before After ---------------------------------------------------------------------------- mov (%r14),%rbp mov (%r14),%rbp mov %rbp,%rbx mov %rbp,%rbx sub $0x21,%rbx sub $0x21,%rbx lea 0x21(%rbx),%r12 movl $0x11,0xa0(%r14) movl $0x11,0xa0(%r14) movq $0x21,0x90(%r14) movq $0x21,0x90(%r14) mov %rbx,0x98(%r14) mov %rbx,0x98(%r14) cmp $0x21,%r12 | cmp $0x21,%rbp jbe ... jbe ... Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Placing the CC_OP_DYNAMIC at the join is less effective than before the branch, as the branch will have forced global registers to their home locations. This way we have a chance to discard CC_SRC2 before it gets stored. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
A jump that ends a basic block or otherwise falls back to CC_OP_DYNAMIC will always have to call gen_op_set_cc_op. However, not all jumps end a basic block, so introduce a variant that does not do this. This was partially undone earlier (i386: drop cc_op argument of gen_jcc1), redo it now also to prepare for the introduction of src2. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Replace low-level ops with a higher-level "cmp %al, (A0)" in the case of scas, and "cmp T0, (A0)" in the case of cmps. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Paolo Bonzini 提交于
It is almost unused, and it is simpler to pass a TCG value directly to gen_shiftd_rm_T1_T3. This value is then written to t2 without going through a temporary register. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Paolo Bonzini 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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