- 22 9月, 2012 30 次提交
-
-
由 Aurelien Jarno 提交于
movcond operation can be implemented on MIPS32 Release 2 using the MOVN, MOVZ, SLT and SLTU instructions. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
deposit operations can be optimized on MIPS32 Release 2 using the INS instruction. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
rotr operations can be optimized on MIPS32 Release 2 using the ROTR and ROTRV instructions. Also implemented rotl operations by subtracting the shift from 32. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
bswap operations can be optimized on MIPS32 Release 2 using the ROTR, WSBH and SEH instructions. We can't use the non-R2 code to implement the ops due to registers constraints, so don't define the corresponding TCG_TARGET_HAS_bswap* values. Also bswap16* operations are supposed to be called with the 16 high bits zeroed. This is the case everywhere (including for TCG by definition) except when called from the store helper. Remove the AND instructions from bswap16* and move it there. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
MIPS has some conditional branch instructions when comparing with zero. Use them. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Use stack instead of temp_buf array in CPUState for TCG temps. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Don't use the global pointer in TCG, in case helpers try access global variables. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Instead of int, use the correct TCGArg and TCGReg type: TCGReg when representing a TCG target register, TCGArg when representing the latter or a constant. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Recent versions of GCC emit warnings when compiling user mode targets. Kill them by reordering a bit the #ifdef. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
The 'Z' constraint has been introduced to map the zero register. However when the op also accept a constant, there is no point to accept the zero register in addition. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
git://git.kraxel.org/qemu由 Aurelien Jarno 提交于
* 'usb.65' of git://git.kraxel.org/qemu: uhci: Don't queue up packets after one with the SPD flag set usb-redir: Revert usb-redir part of commit 93bfef4c usb-redir: Add chardev open / close debug logging usb-redir: Add support for migration usb-redir: Store max_packet_size in endp_data usb-redir: Add an already_in_flight packet-id queue usb-redir: Change cancelled packet code into a generic packet-id queue ehci: Walk async schedule before and after migration ehci: Don't set seen to 0 when removing unseen queue-heads configure: usbredir fixes ehci: Don't process too much frames in 1 timer tick (v2) ehci: Fix interrupts stopping when Interrupt Threshold Control is 8 ehci: switch to new-style memory ops usb-host: allow emulated (non-async) control requests without USBPacket
-
由 Richard Henderson 提交于
The CONFIG_TCG_PASS_AREG0 code for calling ld/st helpers was not respecting the ABI requirement for 64-bit values being aligned in registers. Mirror the ARM port in use of helper functions to marshal arguments into the correct registers. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Neither of these functions were performing double-word compares properly. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Commit 6375e09e changed the type of TranslationBlock.tb_next, but failed to change the type of TCGContext.tb_next. Signed-off-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
We have to use different type to access float values when USE_SOFTFLOAT_STRUCT_TYPES is defined. Rework SH4 version of cpu_gdb_{read,write}_register() using a single case, and fixing the coding style. Use ldll_p() and stfl_p() to access float values. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
While swapping constants to the second operand, swap sources matching destinations to the first operand. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
For proper cmov insns, as well as the non-goto-tb case of conditional branch. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Implemented with setcond if the target does not provide the optional opcode. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Almost dead code. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
We should avoid accessing env at translation stage, except of course for static values like the supported features. Remove variables copied from env in DisasContext and use the TB flags instead. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Since commit fd4bab10 PC is restored in case of exception through code retranslation. While it is clearly the thing to do in case it is not not known if an helper is going to trigger an exception or not (e.g. for load/store, FPU, etc.), it just make things slower when the exception is already known at translation time. Partially revert this commit and save PC in the TCG code. Set bstate to BS_BRANCH to not generate TCG exit code. Micro-optimize the sleep helper. Make all the exception helpers to call raise_exception and mark it as noreturn. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
gen_clr_t() and gen_set_t() have very few callers and can be remplaced by a single line. Remove them. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
It's possible swap the two 16-bit words of a 32-bit register using a rotation. If the TCG target doesn't implement rotation, the replacement code is similar to the previously implemented code. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
The register being 32 bit long, after a shift to the right by 16 bits, the upper 16 bit are already cleared. There is no need to call ext16u to clear them. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
addv and subv helpers implementation is directly copied from the SH4 manual and looks quite complex. It is however possible to explain it without branches, and is therefore possible to implement it with TCG. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Now that setcond is available, the addc and subc can easily be implemented using TCG. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
There is no need to add a SH4 specific pickNaNMulAdd() to softfloat as SH4 is always returning a default NaN. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
- 21 9月, 2012 2 次提交
-
-
由 Max Filippov 提交于
Unconditional gen_check_loop_end at the end of disas_xtensa_insn can emit tcg_gen_goto_tb with slot id already used in the TB (e.g. when TB ends at LEND with a branch). Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: Nmalc <av1474@comtv.ru>
-
由 Max Filippov 提交于
extui opcode only uses lowermost op1 bit for sa4. Reported-by: Nmalc <av1474@comtv.ru> Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Cc: qemu-stable <qemu-stable@nongnu.org> Signed-off-by: Nmalc <av1474@comtv.ru>
-
- 20 9月, 2012 8 次提交
-
-
由 Aurelien Jarno 提交于
Commit e31b0a7c fixed copy propagation on 32-bit host by restricting the copy between different types. This was the wrong fix. The real problem is that the all temps states should be reset at the end of a basic block. This was done by adding such operations in the switch, but brcond2 was forgotten (that's why the crash was only observed on 32-bit hosts). Fix that by looking at the TCG_OPF_BB_END instead. We need to keep the case for op_set_label as temps might be modified through another path. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Implements all of the COP2 instructions except for the S<cond> family of comparisons. The documentation is unclear for those. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
this will prevent some of the compilation errors with debugging enabled from creeping back in. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
The macro uses the DisasContext. Pass it around as needed. Signed-off-by: NRichard Henderson <rth@twiddle.net> Acked-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Richard Henderson 提交于
Used by MIPS_DEBUG, when enabled. Signed-off-by: NRichard Henderson <rth@twiddle.net> Acked-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Peter Maydell 提交于
Drop the private reimplementation of ctz32() from pflash_cfi0[12] in favour of using the standard version from host-utils.h. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
pflash_cfi01 announces a version number of 1.1, which implies "Protection Register Information" and "Burst Read information" sections, which are not provided. Decrease the version number to 1.0 so that only the "Protection Register Information" section is needed. Set the number of protection fields (0x3f) to 0x01, as 0x00 means 256 protections field, which makes the CFI table bigger than the current implementation, causing some kernels to fail to read it. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Given the copy propagation breakage on 32-bit hosts has been fixed commit e31b0a7c can be reverted. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-