- 12 6月, 2018 6 次提交
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由 Mark Cave-Ayland 提交于
Commit 72d3d8f0 "hw/isa/superio: Add a keyboard/mouse controller (8042)" added an 8042 keyboard device to the PC87312 superio device to replace that being used by the prep machine. Unfortunately this commit didn't do the same for the 40p machine which broke the keyboard by registering two 8042 keyboard devices at the same address. Resolve this by similarly removing the 8042 keyboard from the 40p machine as done for the prep machine in commit 72d3d8f0. Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NHervé Poussineau <hpoussin@reactos.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Mark Cave-Ayland 提交于
The Linux sandalfoot zImage has an initialisation process which resets the VGA controller by setting all the BAR addresses to zero to access the VGA ioports at their legacy addresses. Unfortunately setting the framebuffer BAR to address 0 makes the framebuffer memory overlap the internal VGA memory causing accesses to fail, and so prevents the kernel from switching successfully to text mode. Since OpenHackWare configures the framebuffer BAR address outside of the legacy VGA internal memory space, remove pci_allow_0_address from the 40p machine class which causes the BAR reprogramming to zero to fail and so the VGA internal memory can be accessed correctly again. Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Philippe Mathieu-Daudé 提交于
Use error_report() + abort() instead of error_setg(&error_abort), as suggested by the "qapi/error.h" documentation: Please don't error_setg(&error_fatal, ...), use error_report() and exit(), because that's more obvious. Likewise, don't error_setg(&error_abort, ...), use assert(). Use abort() instead of the suggested assert() because the error message already got displayed. Suggested-by: NEric Blake <eblake@redhat.com> Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NEric Auger <eric.auger@redhat.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Mark Cave-Ayland 提交于
>From observation of various OS sources it can be seen that the token register introduced in 4e46dcdb "PPC: Newworld: Add uninorth token register" is not required, since the only register currently implemented is the uninorth hardware version which is read-only. Remove the token register implementation and instead return the uninorth version corresponding to the hardware. Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Mark Cave-Ayland 提交于
Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 BALATON Zoltan 提交于
Signed-off-by: NBALATON Zoltan <balaton@eik.bme.hu> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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- 09 6月, 2018 25 次提交
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由 Paolo Bonzini 提交于
For the case where the end_transfer_func is also the caller of ide_transfer_start, the mutual recursion can lead to unlimited stack usage. Introduce a new version that can be used to change tail recursion into a loop, and use it in trace_ide_atapi_cmd_reply_end. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-8-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 Paolo Bonzini 提交于
The ATAPI_INT_REASON_IO interrupt is raised when I/O starts, but in the AHCI case ide_set_irq was actually called at the end of a mutual recursion. Move it early, with the side effect that ide_transfer_start becomes a tail call in ide_atapi_cmd_reply_end. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-7-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 Paolo Bonzini 提交于
There is code checking s->end_transfer_func and it was not taught about ide_transfer_cancel. We can just use ide_transfer_stop because s->end_transfer_func is only ever called in the DRQ phase. ide_transfer_cancel can then be removed, since it would just be calling ide_transfer_halt. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-6-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 Paolo Bonzini 提交于
The code can simply be moved to the sole caller that has notify == true. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-5-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 Paolo Bonzini 提交于
Now that end_transfer_func is a tail call in ahci_start_transfer, formalize the fact that the callback (of which ahci_start_transfer is the sole implementation) takes care of the transfer too: rename it to pio_transfer and, if it is present, call the end_transfer_func as soon as it returns. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-4-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
The PIO Setup FIS is written in the PIO:Entry state, which comes before the ATA and ATAPI data transfer states. As a result, the PIO Setup FIS interrupt is now raised before DMA ends for ATAPI commands, and tests have to be adjusted. This is also hinted by the description of the command header in the AHCI specification, where the "A" bit is described as When ‘1’, indicates that a PIO setup FIS shall be sent by the device indicating a transfer for the ATAPI command. and also by the description of the ACMD (ATAPI command region): The ATAPI command must be either 12 or 16 bytes in length. The length transmitted by the HBA is determined by the PIO setup FIS that is sent by the device requesting the ATAPI command. QEMU, which conflates the "generator" and the "receiver" of the FIS into one device, always uses ATAPI_PACKET_SIZE, aka 12, for the length. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606190955.20845-3-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-17-jsnow@redhat.com [Fixed format specifiers. --js] Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-16-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Actually, this function looks pretty broken, but for now, let's finish up what this series of commits came here to do. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-15-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-14-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-13-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-12-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Yes, comment, it ought to be 0x2C. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-11-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-10-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
They're now unused. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-9-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-8-jsnow@redhat.com [Changed format specifier. --js] Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-7-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-6-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Churn. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-5-jsnow@redhat.com [Fix patchew/checkpatch nit. --js] Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
A trace is added to let us watch unimplemented registers specifically, as these are more likely to cause us trouble. Otherwise, the port read traces now tell us what register is getting hit, which is nicer. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-4-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-3-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Instead of tracking offsets, lets count the registers. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180531222835.16558-2-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
The comment gives us a hint. *Maybe* we still have something to process. Well, why not check? Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Reviewed-by: NJeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-4-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
Fixes: https://bugs.launchpad.net/qemu/+bug/1769189 AHCI presently signals completion prior to the PxCI register being cleared to indicate completion. If a guest driver attempts to issue a new command in its IRQ handler, it might be surprised to learn there is still a command pending. In the case of Windows 10's boot driver, it will actually poll the IRQ register hoping to find out when the command is done running -- which will never happen, as there isn't a command running. Fix this: clear PxCI in ahci_cmd_done and not in the asynchronous BH. Because it now runs synchronously, we don't need to check if the command is actually done by spying on the ATA registers. We know it's done. CC: qemu-stable <qemu-stable@nongnu.org> Reported-by: NFrançois Guerraz <kubrick@fgv6.net> Tested-by: NBruce Rogers <brogers@suse.com> Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Reviewed-by: NJeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-3-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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由 John Snow 提交于
These functions work on the AHCI device, not the individual AHCI devices, so trim the AHCIDevice argument. Signed-off-by: NJohn Snow <jsnow@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Reviewed-by: NJeff Cody <jcody@redhat.com> Message-id: 20180531004323.4611-2-jsnow@redhat.com Signed-off-by: NJohn Snow <jsnow@redhat.com>
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- 08 6月, 2018 9 次提交
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由 Philippe Mathieu-Daudé 提交于
These commands got introduced by Spec v3 (see 0c3fb03f and 4481bbc7). Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-7-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-6-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
CMD8 is "Reserved" in Spec v1.10. Spec v2.00 introduces the SEND_IF_COND command: 6.4.1 Power Up CMD8 is newly added in the Physical Layer Specification Version 2.00 to support multiple voltage ranges and used to check whether the card supports supplied voltage. The version 2.00 or later host shall issue CMD8 and verify voltage before card initialization. The host that does not support CMD8 shall supply high voltage range. Message-Id: 201204252110.20873.paul@codesourcery.com Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-5-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
As of this commit, the Spec v1 is not working, and all controllers expect the cards to be conformant to Spec v2. Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-4-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
From the "Physical Layer Simplified Specification Version 1.10" Chapter 7.3 "SPI Mode Transaction Packets" Table 57: "Commands and arguments" Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: NAlistair Francis <alistair.francis@wdc.com> Message-id: 20180607180641.874-3-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
The initial implementation is based on the Specs v1.10 (see a1bb27b1). However the SCR is anouncing the card being v1.01. The new chapters added in version 1.10 are: 4.3.10 Switch function command Switch function command (CMD6) 1 is used to switch or expand memory card functions. [...] This is a new feature, introduced in SD physical Layer Specification Version 1.10. Therefore, cards that are compatible with earlier versions of the spec do not support it. The host shall check the "SD_SPEC" field in the SCR register to recognize what version of the spec the card complies with before using CMD6. It is mandatory for SD memory card of Ver1.10 to support CMD6. 4.3.11 High-Speed mode (25MB/sec interface speed) Though the Rev 1.01 SD memory card supports up to 12.5MB/sec interface speed, the speed of 25MB/sec is necessary to support increasing performance needs of the host and because of memory size which continues to grow. To achieve 25MB/sec interface speed, clock rate is increased to 50MHz and CLK/CMD/DAT signal timing and circuit conditions are reconsidered and changed from Physical Layer Specification Version 1.01. 4.3.12 Command system (This chapter is newly added in version 1.10) SD commands CMD34-37, CMD50, CMD57 are reserved for SD command system expansion via the switch command. [These commands] will be considered as illegal commands (as defined in revision 1.01 of the SD physical layer specification). The SWITCH_FUNCTION is implemented since the first commit, a1bb27b1. The 25MB/sec High-Speed mode was already updated in d7ecb867. The current implementation does not implements CMD34-37, CMD50 and CMD57, thus these commands already return ILLEGAL. With this patch, the SCR register now matches the description of the header: * SD Memory Card emulation as defined in the "SD Memory Card Physical * layer specification, Version 1.10." Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180607180641.874-2-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-8-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20180606152128.449-7-f4bug@amsat.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Philippe Mathieu-Daudé 提交于
Signed-off-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: NAlistair Francis <alistair.francis@wdc.com> Message-id: 20180606152128.449-6-f4bug@amsat.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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