1. 13 7月, 2013 3 次提交
    • C
      Force auto-convegence of live migration · 7ca1dfad
      Chegu Vinod 提交于
      If a user chooses to turn on the auto-converge migration capability
      these changes detect the lack of convergence and throttle down the
      guest. i.e. force the VCPUs out of the guest for some duration
      and let the migration thread catchup and help converge.
      
      Verified the convergence using the following :
       - Java Warehouse workload running on a 20VCPU/256G guest(~80% busy)
       - OLTP like workload running on a 80VCPU/512G guest (~80% busy)
      
      Sample results with Java warehouse workload : (migrate speed set to 20Gb and
      migrate downtime set to 4seconds).
      
       (qemu) info migrate
       capabilities: xbzrle: off auto-converge: off  <----
       Migration status: active
       total time: 1487503 milliseconds
       expected downtime: 519 milliseconds
       transferred ram: 383749347 kbytes
       remaining ram: 2753372 kbytes
       total ram: 268444224 kbytes
       duplicate: 65461532 pages
       skipped: 64901568 pages
       normal: 95750218 pages
       normal bytes: 383000872 kbytes
       dirty pages rate: 67551 pages
      
       ---
      
       (qemu) info migrate
       capabilities: xbzrle: off auto-converge: on   <----
       Migration status: completed
       total time: 241161 milliseconds
       downtime: 6373 milliseconds
       transferred ram: 28235307 kbytes
       remaining ram: 0 kbytes
       total ram: 268444224 kbytes
       duplicate: 64946416 pages
       skipped: 64903523 pages
       normal: 7044971 pages
       normal bytes: 28179884 kbytes
      Signed-off-by: NChegu Vinod <chegu_vinod@hp.com>
      Signed-off-by: NJuan Quintela <quintela@redhat.com>
      7ca1dfad
    • C
      Add 'auto-converge' migration capability · bde1e2ec
      Chegu Vinod 提交于
      The auto-converge migration capability allows the user to specify if they
      choose live migration seqeunce to automatically detect and force convergence.
      Signed-off-by: NChegu Vinod <chegu_vinod@hp.com>
      Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
      Reviewed-by: NEric Blake <eblake@redhat.com>
      Signed-off-by: NJuan Quintela <quintela@redhat.com>
      bde1e2ec
    • C
      Introduce async_run_on_cpu() · 3c02270d
      Chegu Vinod 提交于
      Introduce an asynchronous version of run_on_cpu() i.e. the caller
      doesn't have to block till the call back routine finishes execution
      on the target vcpu.
      Signed-off-by: NChegu Vinod <chegu_vinod@hp.com>
      Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NJuan Quintela <quintela@redhat.com>
      3c02270d
  2. 12 7月, 2013 23 次提交
  3. 11 7月, 2013 7 次提交
  4. 10 7月, 2013 7 次提交
    • A
      Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging · 51455c59
      Anthony Liguori 提交于
      QOM CPUState refactorings
      
      * Fix for OpenRISCCPU subclasses
      * Fix for gdbstub CPU selection
      * Move linux-user CPU functions into new header
      * CPUState part 10 refactoring: first_cpu, next_cpu, cpu_single_env et al.
      * Fix some targets to consistently inline TCG code generation
      * Centrally log CPU reset
      
      # gpg: Signature made Wed 10 Jul 2013 07:52:39 AM CDT using RSA key ID 3E7E013F
      # gpg: Can't check signature: public key not found
      
      # By Andreas Färber (41) and others
      # Via Andreas Färber
      * afaerber/tags/qom-cpu-for-anthony: (43 commits)
        cpu: Move reset logging to CPUState
        target-ppc: Change LOG_MMU_STATE() argument to CPUState
        target-i386: Change LOG_PCALL_STATE() argument to CPUState
        log: Change log_cpu_state[_mask]() argument to CPUState
        target-i386: Change do_smm_enter() argument to X86CPU
        target-i386: Change do_interrupt_all() argument to X86CPU
        target-xtensa: Change gen_intermediate_code_internal() arg to XtensaCPU
        target-unicore32: Change gen_intermediate_code_internal() signature
        target-sparc: Change gen_intermediate_code_internal() argument to SPARCCPU
        target-sh4: Change gen_intermediate_code_internal() argument to SuperHCPU
        target-s390x: Change gen_intermediate_code_internal() argument to S390CPU
        target-ppc: Change gen_intermediate_code_internal() argument to PowerPCCPU
        target-mips: Change gen_intermediate_code_internal() argument to MIPSCPU
        target-microblaze: Change gen_intermediate_code_internal() argument types
        target-m68k: Change gen_intermediate_code_internal() argument to M68kCPU
        target-lm32: Change gen_intermediate_code_internal() argument to LM32CPU
        target-i386: Change gen_intermediate_code_internal() argument to X86CPU
        target-cris: Change gen_intermediate_code_internal() argument to CRISCPU
        target-arm: Change gen_intermediate_code_internal() argument to ARMCPU
        target-alpha: Change gen_intermediate_code_internal() argument to AlphaCPU
        ...
      51455c59
    • A
      Merge remote-tracking branch 'riku/linux-user-for-upstream' into staging · 9f9a03b9
      Anthony Liguori 提交于
      # By Andreas Schwab (2) and others
      # Via Riku Voipio
      * riku/linux-user-for-upstream:
        linux-user: Do not ignore mmap failure from host
        linux-user: improve target_to_host_sock_type conversion
        user-exec.c: Set is_write correctly in the ARM cpu_signal_handler()
        linux-user: Fix sys_utimensat (would not compile on old glibc)
        linux-user: fix signal number range check
        linux-user: add SIOCADDRT/SIOCDELRT support
        linux-user: handle /proc/$$ like /proc/self
      
      Message-id: cover.1373051589.git.riku.voipio@linaro.org
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      9f9a03b9
    • A
      Merge remote-tracking branch 'rth/tcg-next' into staging · 6272d17c
      Anthony Liguori 提交于
      # By Richard Henderson
      # Via Richard Henderson
      * rth/tcg-next:
        tcg-arm: Implement tcg_register_jit
        tcg-i386: Use QEMU_BUILD_BUG_ON instead of assert for frame size
        tcg: Move the CIE and FDE header definitions to common code
        tcg: Fix high_pc fields in .debug_info
        tcg-arm: Use AT_PLATFORM to detect the host ISA
        tcg-arm: Simplify logic in detecting the ARM ISA in use
        tcg-arm: Rename use_armv5_instructions to use_armvt5_instructions
        tcg-arm: Make use of conditional availability of opcodes for divide
        tcg: Simplify logic using TCG_OPF_NOT_PRESENT
        tcg: Allow non-constant control macros
        tcg-ppc64: Don't implement rem
        tcg-ppc: Don't implement rem
        tcg-arm: Don't implement rem
        tcg: Split rem requirement from div requirement
        tcg: Add myself to general TCG maintainership
      
      Message-id: 1373379515-28596-1-git-send-email-rth@twiddle.net
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      6272d17c
    • P
      qom: Fix class cast of NULL classes · 9d6a3d58
      Peter Crosthwaite 提交于
      Its clear from the implementation that class casting is supposed to work
      with a NULL class argument. Guard all dereferences of the class argument
      against NULL accordingly.
      Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
      Message-id: 94cd5ba46b74eea289a7e582635820c1c54e66fa.1371546907.git.peter.crosthwaite@xilinx.com
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      9d6a3d58
    • A
      cpu: Move reset logging to CPUState · 91b1df8c
      Andreas Färber 提交于
      x86 was using additional CPU_DUMP_* flags, so make that configurable in
      CPUClass::reset_dump_flags.
      
      This adds reset logging for alpha, unicore32 and xtensa.
      
      Acked-by: Michael Walle <michael@walle.cc> (for lm32)
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      91b1df8c
    • A
      target-ppc: Change LOG_MMU_STATE() argument to CPUState · 77710e7a
      Andreas Färber 提交于
      Choose CPUState rather than PowerPCCPU since doing a CPU() cast on the
      macro argument would hide type mismatches.
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      77710e7a
    • A
      target-i386: Change LOG_PCALL_STATE() argument to CPUState · 8995b7a0
      Andreas Färber 提交于
      Since log_cpu_state_mask() argument was changed to CPUState,
      CPUArchState is no longer needed.
      
      Choose CPUState rather than X86CPU to not hide type mismatches with CPU().
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      8995b7a0