- 16 12月, 2016 1 次提交
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由 Prasad J Pandit 提交于
IOMMU MMIO registers are divided in two groups by their offsets. Low offsets(<0x2000) registers are grouped into 'amdvi_mmio_low' table and higher offsets(>=0x2000) registers are grouped into 'amdvi_mmio_high' table. No of registers in each table is given by macro 'AMDVI_MMIO_REGS_LOW' and 'AMDVI_MMIO_REGS_HIGH' resp. Values of these two macros were swapped, resulting in an OOB access when reading 'amdvi_mmio_high' table. Correct these two macros. Also read from 'amdvi_mmio_low' table for lower address. Reported-by: NAzureyang <azureyang@tencent.com> Signed-off-by: NPrasad J Pandit <pjp@fedoraproject.org> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 04 10月, 2016 1 次提交
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由 David Kiarie 提交于
Signed-off-by: NDavid Kiarie <davidkiarie4@gmail.com> Message-Id: <1475553808-13285-2-git-send-email-davidkiarie4@gmail.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 27 9月, 2016 2 次提交
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由 Peter Xu 提交于
x86 vIOMMUs still lack of a complete IOMMU notifier mechanism. Before that is achieved, let's open a door for vhost DMAR support, which only requires cache invalidations (UNMAP operations). Meanwhile, convert hw_error() to error_report() and exit(1), to make the error messages cleaner and obvious (no CPU registers will be dumped). Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPeter Xu <peterx@redhat.com> Message-Id: <1474606948-14391-4-git-send-email-peterx@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Peter Xu 提交于
The new interface can be used to replace the old notify_started() and notify_stopped(). Meanwhile it provides explicit flags so that IOMMUs can know what kind of notifications it is requested for. Acked-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NPeter Xu <peterx@redhat.com> Message-Id: <1474606948-14391-3-git-send-email-peterx@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 24 9月, 2016 2 次提交
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由 David Kiarie 提交于
Add IVRS table for AMD IOMMU. Generate IVRS or DMAR depending on emulated IOMMU. Signed-off-by: NDavid Kiarie <davidkiarie4@gmail.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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由 David Kiarie 提交于
Add AMD IOMMU emulaton to Qemu in addition to Intel IOMMU. The IOMMU does basic translation, error checking and has a minimal IOTLB implementation. This IOMMU bypassed the need for target aborts by responding with IOMMU_NONE access rights and exempts the region 0xfee00000-0xfeefffff from translation as it is the q35 interrupt region. We advertise features that are not yet implemented to please the Linux IOMMU driver. IOTLB aims at implementing commands on real IOMMUs which is essential for debugging and may not offer any performance benefits Signed-off-by: NDavid Kiarie <davidkiarie4@gmail.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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