1. 16 7月, 2015 3 次提交
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150715' into staging · 7692401a
      Peter Maydell 提交于
      target arm queue:
       * handle broken AArch64 kernels which assume DTB won't cross a 2MB boundary
       * correct broken SCTLR_EL3 reset value
      
      # gpg: Signature made Wed Jul 15 17:24:24 2015 BST using RSA key ID 14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      
      * remotes/pmaydell/tags/pull-target-arm-20150715:
        hw/arm/boot: Increase fdt alignment
        target-arm: Fix broken SCTLR_EL3 reset
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      7692401a
    • A
      hw/arm/boot: Increase fdt alignment · 76e2aef3
      Alexander Graf 提交于
      The Linux kernel on aarch64 creates a page table entry at early bootup
      that spans the 2MB range on memory spanning the fdt start address:
      
        [ ALIGN_DOWN(fdt, 2MB) ... ALIGN_DOWN(fdt, 2MB) + 2MB ]
      
      This means that when our current 4k alignment happens to fall at the end
      of the aligned region, Linux tries to access memory that is not mapped.
      
      The easy fix is to instead increase the alignment to 2MB, making Linux's
      logic always succeed.
      
      We leave the existing 4k alignment for 32bit kernels to not cause any
      regressions due to space constraints.
      Reported-by: NAndreas Schwab <schwab@suse.de>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      76e2aef3
    • P
      target-arm: Fix broken SCTLR_EL3 reset · e46e1a74
      Peter Maydell 提交于
      The SCTLR_EL3 cpreg definition was implicitly resetting the
      register state to 0, which is both wrong and clashes with
      the reset done via the SCTLR definition (since sctlr[3]
      is unioned with sctlr_s). This went unnoticed until recently,
      when an unrelated change (commit a903c449) happened to
      perturb the order of enumeration through the cpregs hashtable for
      reset such that the erroneous reset happened after the correct one
      rather than before it. Fix this by marking SCTLR_EL3 as an alias,
      so its reset is left up to the AArch32 view.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
      e46e1a74
  2. 15 7月, 2015 16 次提交
  3. 14 7月, 2015 14 次提交
  4. 13 7月, 2015 6 次提交
  5. 10 7月, 2015 1 次提交