Do not hardcode the list of 64-bit CPUs.  Use sizeof(void *) to
compute it.  Renaming it to HOST_LONG_BITS to HOST_POINTER_BITS
is left for later.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Non-existent -I paths are dropped silently by the compiler, but still
it is not polite to pass bogus options.  Configure-time tests do not
need any include files from the source path, so only include -I flags
at make time (when they're properly expanded).
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

The "test the C compiler works ok" comes before a bunch of flags
are added for --cpu or just depending on the host.  It helps
debugging if the test is done after these flags are (unconditionally)
added.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

I didn't test with sparse, but the old code using += before a variable
was set was wrong.  Sparse support should probably be ripped out or
redone, but this at least keeps some sanity.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Avoid emitting conditional tcg operations for uncoditional
direct branches.
Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@petalogix.com>

When storing a direct jmp from translation state into
runtime state we should set the btaken flag.
Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>

According to RFC 1350 (TFTP Revision 2) the mode field can contain any
combination of upper and lower case; also RFC 2349 propagates that the
transfer size option ("tsize") is case in-sensitive too.

Current implementation of embedded TFTP server missed that what does
mess some TFTP clients. Fixed by using STRCASECMP(3) in the required
places.
Signed-off-by: NSergei Gavrikov <sergei.gavrikov@gmail.com>
Reviewed-by: NStefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>

Fix a buffer overflow, reported by cppcheck:
[/src/qemu/hw/ppc405_uc.c:72]: (error) Buffer access out-of-bounds: bd.bi_s_version

The use of field bi_s_version seems to be a typo, it should be
bi_r_version.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a buffer overflow, reported by cppcheck:
[/src/qemu/hw/lan9118.c:849]: (error) Buffer access out-of-bounds: s.eeprom

All eeprom handling code assumes that the size of eeprom is 128,
except lan9118_eeprom_cmd. Fix this by restricting the address passed.
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a file descriptor leak, reported by cppcheck:
[/src/qemu/block/vpc.c:524]: (error) Resource leak: fd
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a memory leak, reported by cppcheck:
[/src/qemu/qemu-io.c:1135]: (error) Memory leak: ctx
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a file descriptor leak, reported by cppcheck:
[/src/qemu/block/vvfat.c:759]: (error) Resource leak: dir
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a file descriptor leak, reported by cppcheck:
[/src/qemu/hw/loader.c:311]: (error) Resource leak: fd
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Fix a memory leak reported by cppcheck:
[/src/qemu/ui/vnc-auth-sasl.c:448]: (error) Memory leak: mechname
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Refactor the volume mixing, so it can be reused for capturing devices.
Additionally, it removes superfluous multiplications with the nominal
volume within the hardware voice code path.
Signed-off-by: NMichael Walle <michael@walle.cc>
Signed-off-by: Nmalc <av1474@comtv.ru>

Following commit 5d48e917, it's possible
to remove the hack that used to display the opcodes on ARM hosts only.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Enhance the ARM disassembler used for debugging so that it includes
the hex dump of the opcode as well as the symbolic disassembly.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add a comment about cache coherency and retranslation, so that people
developping new targets based on existing ones are warned of the issue.
Acked-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add a configure check for the existence of linux/fiemap.h and the
IOC_FS_FIEMAP ioctl. This fixes a compilation failure on Linux
systems which don't have that header file.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Fix errors in the decoding of ARM VQSHL/VQSHLU immediate forms,
including using the new VQSHLU helper functions where appropriate.
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Add neon helper functions to implement VQSHLU, which is a
signed-to-unsigned version of VQSHL available only as an
immediate form.
Signed-off-by: NJuha Riihimäki <juha.riihimaki@nokia.com>
Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Illegal instructions in a slot delay should generate a slot illegal
instruction exception instead of an illegal instruction exception.

The current PC should be saved before generating such an exception,
but should not be corrected if in a delay slot, given it's already
done in the exception handler do_interrupt().
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Based on a patch by Blue Swirl <blauwirbel@gmail.com>.
Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>

Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>

Signed-off-by: NEdgar E. Iglesias <edgar@axis.com>

Slirp code tries to be smart an avoid data copy by using pointer to
the data. This solution leads to unaligned access, in this case
preq_addr, which is a 32-bit long structure. There is no real point
of avoiding data copy in a such case, as the value itself is smaller
or the same size as a pointer.

The patch replaces pointers to the preq_addr structure by the strcture
itself, and use the address 0.0.0.0 if no address has been requested
(this is not a valid address in such a request). It compares it with
htonl(0L) for correctness reasons, in case a code checker look for such
mistakes. It also uses memcpy() for copying the data, which takes care
of alignement issues.

This fixes an unaligned access on IA64 host while requesting a DHCP
address.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Improve constant loading in two ways:
- On all ARM versions, it's possible to load 0xffffff00 = -0x100 using
  the mvn rd, #0. Fix the conditions.
- On <= ARMv6 versions, where movw and movt are not available, load the
  constants using mov and orr with rotations depending on the constant
  to load. This is very useful for example to load constants where the
  low byte is 0. This reduce the generated code size by about 7%.

Also fix the coding style at the same time.

Cc: Andrzej Zaborowski <balrog@zabor.org>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Spotted by Richard Henderson.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

SH4 is using 16-bit instructions which means most of the constants are
loaded through a constant pool at the end of the subroutine. The same
memory page is therefore accessed in exec and read mode.

With the current implementation, a QEMU TLB entry is set to read or
read/write mode after an UTLB search and to exec mode after an ITLB
search, which causes a lot of TLB exceptions to switch from read or
read/write to exec and vice versa.

This patch optimizes that by already setting the QEMU TLB entry in read
or read/write mode when an UTLB entry is copied into ITLB (during an
ITLB miss). This improve the emulation speed by about 14%.
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Some Linux kernels seems to implement ITLB/UTLB flushing through by
writing all TLB entries through the memory mapped interface instead
of writing one to MMUCR.TI.

Implement memory mapped ITLB write interface so that such kernels can
boot. This fixes https://bugs.launchpad.net/bugs/700774 .
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

Signed-off-by: NMike Frysinger <vapier@gentoo.org>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

neccessary -> necessary
Keberos -> Kerberos
emuilated -> emulated
transciever -> transceiver
emulaton -> emulation
inital -> initial
MingGW -> MinGW
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>