* 'target-arm.for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
  target-arm: Decode SETEND correctly in Thumb
  target-arm: Clear IT bits when taking exceptions in v7M
  target-arm: Fix typo in ARM946 cp15 c5 handling

* 'malta' of git://qemu.weilnetz.de/qemu:
  malta: Fix display for LED array
  malta: Use symbolic hardware addresses
  malta: Always allocate flash memory
  malta: Clean allocation of bios region alias

* 'ppc-for-upstream' of git://repo.or.cz/qemu/agraf:
  PPC: Fix openpic with relative memregions
  pseries: Configure PCI bridge using properties
  PPC: KVM: Synchronize regs on CPU dump
  kvm: Comparison with ioctl number macros needs to be unsigned
  ppc: Correctly define POWERPC_INSNS2_DEFAULT
  pseries: Add support for level interrupts to XICS
  PPC: Fix large page support in TCG
  PPC: Add PIR register to POWER7 CPU
  pseries: Remove PCI device from PCI host bridge code
  pseries: Remove unused constant from PCI code
  pseries: Update SLOF firmware image
  PPC64: Add support for ldbrx and stdbrx instructions
  pseries: Don't try to munmap() a malloc()ed TCE table
  ppc: Add missing 'static' to spin_rw_ops
  PPC: 405: Fix ppc405ep initialization
  Bad zero comparison for sas_ss_flags on powerpc

VMSTATE_VARRAY_UINT32() is used in hw/ds1225y.c, and we checked
VMS_VARRAY_UINT32 bit of field->flags in vmstate_load_state(),
but we don't check this bit in vmstate_save_state().
Signed-off-by: NAmos Kong <akong@redhat.com>
Acked-by: NJuan Quintela <quintela@redhat.com>
Acked-by: NHervé Poussineau <hpoussin@reactos.org>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

An attempt to allocate a large memory chunk after a small one resulted in
circular links in list of pools.  It caused the same memory being
allocated twice for different arrays.

Now pools for large memory chunks are kept in separate list and are
freed during pool reset because current allocator can not reuse them.
Signed-off-by: NKirill Batuzov <batuzovk@ispras.ru>
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>

The 8-LED array was already implemented in the first commit to Malta,
but this implementation was incomplete.
Signed-off-by: NStefan Weil <sw@weilnetz.de>

The patch adds definitions of some hardware addresses and uses these
definitions.

It also replaces the type of all addresses from signed to unsigned values.
This is only a cosmetic change because addresses are unsigned values,
the functions called also expect unsigned values,
and we need no sign extension here.
Signed-off-by: NStefan Weil <sw@weilnetz.de>

There is no reason why there should not be a flash memory when the
Malta emulation is started with a Linux kernel. When flash memory
is always available, the code is simpler, and it can be better tested.
Signed-off-by: NStefan Weil <sw@weilnetz.de>

It is sufficient to define the region alias once for all code branches.
Signed-off-by: NStefan Weil <sw@weilnetz.de>

Decode the SETEND instruction correctly in Thumb mode,
rather than accidentally treating it like CPS. We don't
support BE8 mode, but this change brings the Thumb mode
in to line with behaviour in ARM mode: 'SETEND BE' is
not supported and will provoke an UNDEF exception, but
'SETEND LE' is correctly handled as a no-op.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reported-by: NDaniel Forsgren <daniel.forsgren@enea.com>
Reviewed-by: NLaurent Desnogues <laurent.desnogues@gmail.com>

When taking an exception for an M profile core, we must clear
the IT bits. Since the IT bits are cached in env->condexec_bits
we must clear them there: writing the bits in env->uncached_cpsr
has no effect. (Reported as LP:944645.)
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Fix a typo in handling of the ARM946 cp15 c5 c0 0 1 handling
(instruction access permission bits) that meant it would
return the data access permission bits by mistake.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

After commit 5312bd8b we got memory region relative offsets into our mmio
callbacks instead of page boundary based offsets.

This broke the OpenPIC emulation which expected offsets to be on page boundary
and substracted its region offset manually.

This patch gets rid of that manual substraction and lets the memory api do its
magic instead.
Signed-off-by: NAlexander Graf <agraf@suse.de>

Currently, the function spapr_create_phb() uses its parameters to
initialize the correct memory windows for the new PCI Host Bridge
(PHB).  This is not the way things are supposed to be done with qdevs,
and means you can't create extra PHBs easily using -device.

Since pSeries machines can and do have many PHBs with various
configurations, this is a real limitation, not just a theoretical.
This patch, therefore, alters the PHB initialization code to use qdev
properties to set these parameters of the new bridge, moving most of
the code from spapr_create_phb() to spapr_phb_init().

While we're at it, we change the naming of each PCI bus and its
associated memory regions to be less arbitrary and make it easier to
relate the guest and qemu views of memory to each other.
Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>

When we dump the CPU registers, there's a certain chance they haven't been
synchronized with KVM yet, so we have to manually trigger that.

This aligns the code with x86 and fixes a bug where the register state was
bogus on invalid/unknown kvm exit reasons.
Reported-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NAlexander Graf <agraf@suse.de>

In kvm-all.c we store an ioctl cmd number in the irqchip_inject_ioctl field
of KVMState, which has type 'int'.  This seems to make sense since the
ioctl() man page says that the cmd parameter has type int.

However, the kernel treats ioctl numbers as unsigned - sys_ioctl() takes an
unsigned int, and the macros which generate ioctl numbers expand to
unsigned expressions.  Furthermore, some ioctls (IOC_READ ioctls on x86
and IOC_WRITE ioctls on powerpc) have bit 31 set, and so would be negative
if interpreted as an int. This has the surprising and compile-breaking
consequence that in kvm_irqchip_set_irq() where we do:
    return (s->irqchip_inject_ioctl == KVM_IRQ_LINE) ? 1 : event.status;
We will get a "comparison is always false due to limited range of data
type" warning from gcc if KVM_IRQ_LINE is one of the bit-31-set ioctls,
which it is on powerpc.

So, despite the fact that the man page and posix say ioctl numbers are
signed, they're actually unsigned.  The kernel uses unsigned, the glibc
header uses unsigned long, and FreeBSD, NetBSD and OSX also use unsigned
long ioctl numbers in the code.

Therefore, this patch changes the variable to be unsigned, fixing the
compile.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

'POWERPC_INSNS2_DEFAULT' was defined incorrectly which was causing the
opcode table creation code to erroneously register 'eieio' and 'mbar'
for the "default" processor:

   ** ERROR: opcode 1a already assigned in opcode table 16
   *** ERROR: unable to insert opcode [1f-16-1a]
   *** ERROR initializing PowerPC instruction 0x1f 0x16 0x1a
Signed-off-by: NMeador Inge <meadori@codesourcery.com>
Signed-off-by: NAlexander Graf <agraf@suse.de>

The pseries "xics" interrupt controller, like most interrupt
controllers can support both message (i.e. edge sensitive) interrupts
and level sensitive interrupts, but it needs to know which are which.

When I implemented the xics emulation for qemu, the only devices we
supported were the PAPR virtual IO devices.  These devices only use
message interrupts, so they were the only ones I implemented in xics.

Since then, however, we have added support for PCI devices, which use
level sensitive interrupts.  It turns out the message interrupt logic
still actually works most of the time for these, but there are
circumstances where we can lost interrupts due to the incorrect
interrupt logic.

This patch, therefore, implements the correct xics level-sensitive
interrupt logic.  The type of the interrupt is set when a device
allocates a new xics interrupt.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

Fix large page support in TCG. The old code would overwrite the large page
table entry with the fake 4 KB one generated here whenever the ref/change bits
were updated, causing it to point to the wrong area of memory.
Signed-off-by: NNathan Whitehorn <nwhitehorn@freebsd.org>
Acked-by: NDavid Gibson <david@gibson.drobpear.id.au>
[agraf: fix whitespace, braces]
Signed-off-by: NAlexander Graf <agraf@suse.de>

The POWER7 emulation is missing the Processor Identification Register,
mandatory in recent POWER CPUs, that is required for SMP on at least
some operating systems (e.g. FreeBSD) to function properly. This patch
copies the existing PIR code from the other CPUs that implement it.
Signed-off-by: NNathan Whitehorn <nwhitehorn@freebsd.org>
Signed-off-by: NAlexander Graf <agraf@suse.de>

The sPAPR PCI code defines a PCI device "spapr-pci-host-bridge-pci" which
is never used.  This came over from the earlier bridge driver we used as
a template.  Some other bridges appear on their own PCI bus as a device,
but that is not true of pSeries bridges, which are pure host to PCI with
no visible presence on the PCI side.
Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

The 'bars' constant array was used in experimental device allocation code
which is no longer necessary now that we always run the SLOF firmware.
This patch removes the now redundant variable.
Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

This patch updates the SLOF firmware image used on the pseries
machine.  The new version adds support for Cirrus VGA and virtfs, as
well as including a number of bugfixes.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

These instructions for loading and storing byte-swapped 64-bit values have
been introduced in PowerISA 2.06.
Signed-off-by: NThomas Huth <thuth@linux.vnet.ibm.com>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

For the pseries machine, TCE (IOMMU) tables can either be directly
malloc()ed in qemu or, when running on a KVM which supports it, mmap()ed
from a KVM ioctl.  The latter option is used when available, because it
allows the (frequent bottlenext) H_PUT_TCE hypercall to be KVM accelerated.
However, even when KVM is persent, TCE acceleration is not always possible.
Only KVM HV supports this ioctl(), not KVM PR, or the kernel could run out
of contiguous memory to allocate the new table.  In this case we need to
fall back on the malloc()ed table.

When a device is removed, and we need to remove the TCE table, we need to
either munmap() or free() the table as appropriate for how it was
allocated.  The code is supposed to do that, but we buggily fail to
initialize the tcet->fd variable in the malloc() case, which is used as a
flag to determine which is the right choice.

This patch fixes the bug, and cleans up error messages relating to this
path while we're at it.
Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>

spin_rw_ops is only used in hw/ppce500_spin.c.
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Acked-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>

When trying to run a ppc405 guest, it segfaults quite quickly, trying to
access timers that weren't initialized. Initialize them properly instead.
Reported-by: NAndreas Faerber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>

All architectures work the same way, and all check for sas_ss_flags ==
0. The powerpc lines are wrong, and do the check the other way round
(it's a qemu internal check, which is done wrong only for this
architecture, it's more a typo than a bug). It's NOT ppc specific,
it's POSIX standard (sigaltstack) and qemu internal.

I have a test source that I will send in a follow-up (it's longer than
I would have wished, I'm sure that a better test case can be written
if needed)
Signed-off-by: NAlex Barcelo <abarcelo@ac.upc.edu>
Signed-off-by: NAlexander Graf <agraf@suse.de>

Commit 9b9a970a
(target-lm32/microblaze: Typedef struct CPU{MB,LM32}State)
introduced necessary typedefs for cpu_mmu_index() and mmu.h
respectively.

On some GCC versions this leads to "error: redefinition of typedef".

Drop the original typedef to hopefully fix the build.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

* afaerber/qom-cpu.v5: (43 commits)
  qom: Introduce CPU class
  Rename CPUState -> CPUArchState
  xtensa hw/: Don't use CPUState
  sparc hw/: Don't use CPUState
  sh4 hw/: Don't use CPUState
  s390x hw/: Don't use CPUState
  ppc hw/: Don't use CPUState
  mips hw/: Don't use CPUState
  microblaze hw/: Don't use CPUState
  m68k hw/: Don't use CPUState
  lm32 hw/: Don't use CPUState
  i386 hw/: Don't use CPUState
  cris hw/: Don't use CPUState
  arm hw/: Don't use CPUState
  alpha hw/: Don't use CPUState
  xtensa-semi: Don't use CPUState
  m68k-semi: Don't use CPUState
  arm-semi: Don't use CPUState
  target-xtensa: Don't overuse CPUState
  target-unicore32: Don't overuse CPUState
  ...

This fixes memory reads and writes which exceeded the upper limit
of allocated memory vd->guest.ds->data and vd->server->data.

Cc: Anthony Liguori <aliguori@us.ibm.com>
Signed-off-by: NStefan Weil <weil@mail.berlios.de>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

The threaded VNC servers messed up with QEMU fd handlers without
any kind of locking, and that can cause some nasty race conditions.

Using qemu_mutex_lock_iothread() won't work because vnc_dpy_cpy(),
which will wait for the current job queue to finish, can be called with
the iothread lock held.

Instead, we now store the data in a temporary buffer, and use a bottom
half to notify the main thread that new data is available.

vnc_[un]lock_ouput() is still needed to access VncState members like
abort, csock or jobs_buffer.
Signed-off-by: NCorentin Chary <corentin.chary@gmail.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Reintroduce CPUState as QOM object: It's abstract and derived directly
from TYPE_OBJECT for compatibility with the user emulators.
The identifier CPUState avoids conflicts between CPU() and the struct.

Introduce $(qom-twice-y) to build it separately for system and for user
emulators.

Prepare a virtual reset method, (re)introduce cpu_reset() as wrapper.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
    sed -i "s/CPUState/CPUArchState/g" $file
  done

All occurrences of CPUArchState are expected to be replaced by QOM CPUState,
once all targets are QOM'ified and common fields have been extracted.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/xtensa_*.[hc]; do
    sed -i "s/CPUState/CPUXtensaState/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/sun4m.c hw/sun4u.c hw/grlib.h hw/leon3.c; do
    sed -i "s/CPUState/CPUSPARCState/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/sh.h hw/shix.c hw/r2d.c; do
    sed -i "s/CPUState/CPUSH4State/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/s390-*.[hc]; do
    sed -i "s/CPUState/CPUS390XState/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do
    sed -i "s/CPUState/CPUPPCState/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>

Scripted conversion:
  for file in hw/mips_*.[hc]; do
    sed -i "s/CPUState/CPUMIPSState/g" $file
  done
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Acked-by: NAnthony Liguori <aliguori@us.ibm.com>