- 31 1月, 2018 14 次提交
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
However since HPPA has a software-managed TLB, and the relevant TLB manipulation instructions are not implemented, this does not actually do anything. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Any one TB will have only one space value. If we change spaces, we change TBs. Thus BE and BEV must exit the TB immediately. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
This changes the system virtual address width to 64-bit and incorporates the space registers into load/store operations. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Not used where they should be yet, but we can copy them. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Most aspects of privilege are not yet handled. But this gives us the start from which to begin checking. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
For system mode, we will need 64-bit virtual addresses even when we have 32-bit register sizes. Since the rest of QEMU equates TARGET_LONG_BITS with the address size, redefine everything related to register size in terms of a new TARGET_REGISTER_BITS. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Richard Henderson 提交于
We don't actually do anything with most of the bits yet, but at least they have names and we have somewhere to store them. Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Helge Deller 提交于
With the addition of default-configs/hppa-softmmu.mak, this will compile. It is not enabled with this patch, however. Signed-off-by: NHelge Deller <deller@gmx.de> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
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- 25 1月, 2018 1 次提交
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由 Laurent Vivier 提交于
The MC68040 MMU provides the size of the access that triggers the page fault. This size is set in the Special Status Word which is written in the stack frame of the access fault exception. So we need the size in m68k_cpu_unassigned_access() and m68k_cpu_handle_mmu_fault(). To be able to do that, this patch modifies the prototype of handle_mmu_fault handler, tlb_fill() and probe_write(). do_unassigned_access() already includes a size parameter. This patch also updates handle_mmu_fault handlers and tlb_fill() of all targets (only parameter, no code change). Signed-off-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NDavid Hildenbrand <david@redhat.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-Id: <20180118193846.24953-2-laurent@vivier.eu>
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- 01 9月, 2017 1 次提交
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由 Igor Mammedov 提交于
drop custom cpu_hppa_init() in favor of cpu_generic_init(), to make cpu_generic_init() work all we need is to provide cc->class_by_name callback that would resolve any cpu_model to the sole TYPE_HPPA_CPU to match current behaviour. Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Acked-by: NRichard Henderson <rth@twiddle.net> Message-Id: <1503592308-93913-11-git-send-email-imammedo@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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- 24 1月, 2017 1 次提交
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由 Richard Henderson 提交于
This is just about the minimum required to enable compilation without actually executing any instructions. This contains the HPPACPU structure and the required callbacks, the gdbstub, the basic translation loop, and a translate_one function that always results in an illegal instruction. Signed-off-by: NRichard Henderson <rth@twiddle.net>
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