1. 07 2月, 2015 10 次提交
  2. 06 2月, 2015 24 次提交
  3. 05 2月, 2015 6 次提交
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150205' into staging · cd07b193
      Peter Maydell 提交于
      target-arm queue:
       * refactor/clean up armv7m_init()
       * some initial cleanup in the direction of supporting 64-bit EL3
       * fix broken synchronization of registers between QEMU and KVM
         for 32-bit ARM hosts (which among other things broke memory
         access via gdbstub)
       * fix flush-to-zero handling in FMULX, FRECPS, FRSQRTS and FRECPE
       * don't crash QEMU for UNPREDICTABLE BFI insns in A32 encoding
       * explain why virt board's device-to-transport mapping code is
         the way it is
       * implement mmu_idx values which match the architectural
         distinctions, and introduce the concept of a translation
         regime to get_phys_addr() rather than incorrectly looking
         at the current CPU state
       * update to upstream VIXL 1.7 (gives us correct code addresses
         when dissassembling pc-relative references)
       * sync system register state between KVM and QEMU for 64-bit ARM
       * support virtio on big-endian guests by implementing the
         "which endian is the guest now?" CPU method
      
      # gpg: Signature made Thu 05 Feb 2015 14:02:16 GMT using RSA key ID 14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      
      * remotes/pmaydell/tags/pull-target-arm-20150205: (28 commits)
        target-arm: fix for exponent comparison in recpe_f64
        target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64
        target-arm: KVM64: Get and Sync up guest register state like kvm32.
        disas/arm-a64.cc: Tell libvixl correct code addresses
        disas/libvixl: Update to upstream VIXL 1.7
        target-arm: Fix brace style in reindented code
        target-arm: Reindent ancient page-table-walk code
        target-arm: Use mmu_idx in get_phys_addr()
        target-arm: Pass mmu_idx to get_phys_addr()
        target-arm: Split AArch64 cases out of ats_write()
        target-arm: Don't define any MMU_MODE*_SUFFIXes
        target-arm: Use correct mmu_idx for unprivileged loads and stores
        target-arm: Define correct mmu_idx values and pass them in TB flags
        target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT
        target-arm: Make arm_current_el() return sensible values for M profile
        cpu_ldst.h: Allow NB_MMU_MODES to be 7
        hw/arm/virt: explain device-to-transport mapping in create_virtio_devices()
        target-arm: check that LSB <= MSB in BFI instruction
        target-arm: Squash input denormals in FRECPS and FRSQRTS
        Fix FMULX not squashing denormalized inputs when FZ is set.
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      cd07b193
    • I
      target-arm: fix for exponent comparison in recpe_f64 · fc1792e9
      Ildar Isaev 提交于
      f64 exponent in HELPER(recpe_f64) should be compared to 2045 rather than 1023
      (FPRecipEstimate in ARMV8 spec). This fixes incorrect underflow handling when
      flushing denormals to zero in the FRECPE instructions operating on 64-bit
      values.
      Signed-off-by: NIldar Isaev <ild@inbox.ru>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      fc1792e9
    • P
      target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64 · 84f2bed3
      Pranavkumar Sawargaonkar 提交于
      This patch implements a fucntion pointer "virtio_is_big_endian"
      from "CPUClass" structure for arm/arm64.
      Function arm_cpu_is_big_endian() is added to determine and
      return the guest cpu endianness to virtio.
      This is required for running cross endian guests with virtio on ARM/ARM64.
      Signed-off-by: NPranavkumar Sawargaonkar <pranavkumar@linaro.org>
      Message-id: 1423130382-18640-3-git-send-email-pranavkumar@linaro.org
      [PMM: check CPSR_E in env->cpsr_uncached, not env->pstate.]
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      84f2bed3
    • P
      target-arm: KVM64: Get and Sync up guest register state like kvm32. · 568bab1f
      Pranavkumar Sawargaonkar 提交于
      This patch adds:
      1. Call write_kvmstate_to_list() and write_list_to_cpustate()
         in kvm_arch_get_registers() to sync guest register state.
      2. Call write_list_to_kvmstate() in kvm_arch_put_registers()
         to sync guest register state.
      
      These changes are already there for kvm32 in target-arm/kvm32.c.
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NPranavkumar Sawargaonkar <pranavkumar@linaro.org>
      Message-id: 1423130382-18640-2-git-send-email-pranavkumar@linaro.org
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      568bab1f
    • P
      disas/arm-a64.cc: Tell libvixl correct code addresses · 8d298bee
      Peter Maydell 提交于
      disassembling relative branches in code which doesn't reside at
      what the guest CPU would think its execution address is. Use
      the new MapCodeAddress() API to tell libvixl where the code is
      from the guest CPU's point of view so it can get the target
      addresses right.
      
      Previous disassembly:
      
      0x0000000040000000:  580000c0      ldr x0, pc+24 (addr 0x7f6cb7020434)
      0x0000000040000004:  aa1f03e1      mov x1, xzr
      0x0000000040000008:  aa1f03e2      mov x2, xzr
      0x000000004000000c:  aa1f03e3      mov x3, xzr
      0x0000000040000010:  58000084      ldr x4, pc+16 (addr 0x7f6cb702042c)
      0x0000000040000014:  d61f0080      br x4
      
      Fixed disassembly:
      0x0000000040000000:  580000c0      ldr x0, pc+24 (addr 0x40000018)
      0x0000000040000004:  aa1f03e1      mov x1, xzr
      0x0000000040000008:  aa1f03e2      mov x2, xzr
      0x000000004000000c:  aa1f03e3      mov x3, xzr
      0x0000000040000010:  58000084      ldr x4, pc+16 (addr 0x40000020)
      0x0000000040000014:  d61f0080      br x4
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1422274779-13359-3-git-send-email-peter.maydell@linaro.org
      8d298bee
    • P
      disas/libvixl: Update to upstream VIXL 1.7 · d4eba98d
      Peter Maydell 提交于
      Update our copy of libvixl to upstream's 1.7 release.
      This includes upstream's fix for the issue we had a local
      patch for in commit 94cc44a9.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1422274779-13359-2-git-send-email-peter.maydell@linaro.org
      d4eba98d