1. 11 3月, 2014 2 次提交
  2. 04 2月, 2014 11 次提交
  3. 07 1月, 2014 1 次提交
  4. 24 12月, 2013 6 次提交
  5. 23 12月, 2013 1 次提交
  6. 12 12月, 2013 2 次提交
    • F
      target-i386: clear guest TSC on reset · 0522604b
      Fernando Luis Vázquez Cao 提交于
      VCPU TSC is not cleared by a warm reset (*), which leaves some types of Linux
       guests (non-pvops guests and those with the kernel parameter no-kvmclock set)
      vulnerable to the overflow in cyc2ns_offset fixed by upstream commit
      9993bc635d01a6ee7f6b833b4ee65ce7c06350b1 ("sched/x86: Fix overflow in
      cyc2ns_offset").
      
      To put it in a nutshell, if such a Linux guest without the patch above applied
      has been up more than 208 days and attempts a warm reset chances are that
      the newly booted kernel will panic or hang.
      
      (*) Intel Xeon E5 processors show the same broken behavior due to
          the errata "TSC is Not Affected by Warm Reset" (Intel® Xeon®
          Processor E5 Family Specification Update - August 2013): "The
          TSC (Time Stamp Counter MSR 10H) should be cleared on
          reset. Due to this erratum the TSC is not affected by warm
          reset."
      
      Cc: Will Auld <will.auld@intel.com>
      Cc: Marcelo Tosatti <mtosatti@redhat.com>
      Signed-off-by: NFernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NFernando Luis Vázquez Cao <fernando_b1@lab.ntt.co.jp>
      0522604b
    • L
      target-i386: Intel MPX · 79e9ebeb
      Liu Jinsong 提交于
      Add some MPX related definiation, and hardcode sizes and offsets
      of xsave features 3 and 4. It also add corresponding part to
      kvm_get/put_xsave, and vmstate.
      Signed-off-by: NLiu Jinsong <jinsong.liu@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      79e9ebeb
  7. 06 12月, 2013 1 次提交
    • L
      target-i386: fix cpuid leaf 0x0d · 33f373d7
      Liu Jinsong 提交于
      Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
      
      However, before this patch the CPUID worked fine -- the .offset
      field contained the size _and_ was stored in the register that
      is supposed to hold the size (eax), and likewise the .size field
      contained the offset _and_ was stored in the register trhat is
      supposed to hold the offset (ebx).
      Signed-off-by: NLiu Jinsong <jinsong.liu@intel.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      33f373d7
  8. 21 11月, 2013 1 次提交
  9. 07 10月, 2013 1 次提交
  10. 02 10月, 2013 3 次提交
  11. 20 9月, 2013 2 次提交
  12. 03 9月, 2013 1 次提交
    • E
      target-i386: Use #defines instead of magic numbers for CPUID cache info · 5e891bf8
      Eduardo Habkost 提交于
      This is an attempt to make the CPUID cache topology code clearer, by
      replacing the magic numbers in the code with #defines, and moving all
      the cache information to the same place in the file.
      
      I took care of comparing the assembly output of compiling
      target-i386/cpu.c before and after applying this change, to make sure
      not a single bit was changed on cpu_x86_cpuid() before and after
      applying this patch (unfortunately I had to manually check existing
      differences, because of __LINE__ expansions on
      object_class_dynamic_cast_assert() calls).
      
      This even keeps the code bug-compatible with the previous version: today
      the cache information returned on AMD cache information leaves (CPUID
      0x80000005 & 0x80000006) do not match the information returned on CPUID
      leaves 2 and 4. The L2 cache information on CPUID leaf 2 also doesn't
      match the information on CPUID leaf 2. The new constants should make it
      easier to eventually fix those inconsistencies. All inconsistencies I
      have found are documented in code comments.
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      Reviewed-by: Nliguang <lig.fnst@cn.fujitsu.com>
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      5e891bf8
  13. 20 8月, 2013 1 次提交
  14. 17 8月, 2013 1 次提交
  15. 07 8月, 2013 1 次提交
    • A
      target-i386: Fix X86CPU error handling · cd7b87ff
      Andreas Färber 提交于
      Error **errp argument is not for emitting warnings, it means an error
      has occurred and the caller should not make any assumptions about the
      state of other return values (unless otherwise documented).
      
      Therefore cpu_x86_create() must unref the new X86CPU itself, and
      pc_new_cpu() must check for an Error rather than NULL return value.
      
      While at it, clean up a superfluous NULL check.
      Reported-by: NJan Kiszka <jan.kiszka@siemens.com>
      Cc: qemu-stable@nongnu.org
      Cc: Igor Mammedov <imammedo@redhat.com>
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      cd7b87ff
  16. 29 7月, 2013 3 次提交
    • E
      target-i386: Disable PMU CPUID leaf by default · 9337e3b6
      Eduardo Habkost 提交于
      Bug description: QEMU currently gets all bits from GET_SUPPORTED_CPUID
      for CPUID leaf 0xA and passes them directly to the guest. This makes
      the guest ABI depend on host kernel and host CPU capabilities, and
      breaks live migration if we migrate between hosts with different
      capabilities (e.g., different number of PMU counters).
      
      Add a "pmu" property to X86CPU, and set it to true only on "-cpu host",
      or on pc-*-1.5 and older machine-types.
      
      For now, setting pmu=on will enable the current passthrough mode that
      doesn't have any ABI stability guarantees, but in the future we may
      implement a mode where the PMU CPUID bits are stable and configurable.
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      9337e3b6
    • E
      target-i386: Pass X86CPU object to cpu_x86_find_by_name() · c1399112
      Eduardo Habkost 提交于
      This will help us change the initialization code to not require carrying
      some intermediate values in a x86_def_t struct (and eventually kill the
      x86_def_t struct entirely).
      Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      c1399112
    • A
      cpu: Partially revert "cpu: Change qemu_init_vcpu() argument to CPUState" · 14a10fc3
      Andreas Färber 提交于
      Commit c643bed9 moved qemu_init_vcpu() calls to common CPUState code.
      This causes x86 cpu-add to fail with "KVM: setting VAPIC address failed".
      
      The reason for the failure is that CPUClass::kvm_fd is not yet
      initialized in the following call graph:
      ->x86_cpu_realizefn
       ->x86_cpu_apic_realize
        ->qdev_init
         ->device_set_realized
          ->device_reset (hotplugged == 1)
           ->apic_reset_common
            ->vapic_base_update
             ->kvm_apic_vapic_base_update
      This causes attempted KVM vCPU ioctls to fail.
      
      By contrast, in the non-hotplug case the APIC is reset much later, when
      the vCPU is already initialized.
      
      As a quick and safe solution, move the qemu_init_vcpu() call back into
      the targets' realize functions.
      Reported-by: NChen Fan <chen.fan.fnst@cn.fujitsu.com>
      Acked-by: Igor Mammedov <imammedo@redhat.com> (for i386)
      Tested-by: Jia Liu <proljc@gmail.com> (for openrisc)
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      14a10fc3
  17. 27 7月, 2013 2 次提交