1. 14 1月, 2012 1 次提交
    • A
      Merge remote-tracking branch 'stefanha/trivial-patches' into HEAD · 607a2c72
      Anthony Liguori 提交于
      * stefanha/trivial-patches:
        bt-host: add missing break statement
        virtfs-proxy-helper: Add missing printf format attribute
        virtfs-proxy-helper: Clean include files
        virtfs-proxy-helper: Fix compilation on newer systems
        hmp: Fix freeing of PciInfoList
        Add 'fall through' comments to case statements without break
        omap_dss: correct chip[1] index in RFBI_READ/RFBI_STATUS
        vnc: fix no-lock-key-sync strncmp() length
        vvfat: avoid leaking file descriptor in commit_one_file()
        Spelling fixes in comments and documentation
        tcg-arm: fix a typo in comments
        configure: Modify detection of supported warning options
      607a2c72
  2. 13 1月, 2012 31 次提交
  3. 12 1月, 2012 4 次提交
  4. 11 1月, 2012 4 次提交
    • A
      target-i386: fix SSE rounding and flush to zero · 2355c16e
      Aurelien Jarno 提交于
      SSE rounding and flush to zero control has never been implemented. However
      given that softfloat-native was using a single state for FPU and SSE and
      given that glibc is setting both FPU and SSE state in fesetround(), this
      was working correctly up to the switch to softfloat.
      
      Fix that by adding an update_sse_status() function similar to
      update_fpu_status(), and callin git on write to mxcsr.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      2355c16e
    • A
      target-i386: fix dpps and dppd SSE2 instructions · 170d5b4b
      Aurelien Jarno 提交于
      The helpers implemented dpps and dppd SSE instructions are not passing
      the correct argument types to the softfloat functions. While they do
      work anyway providing a correct behaviour, this patch fixes that.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      170d5b4b
    • A
      target-i386: fix round{pd,ps,sd,ss} SSE2 instructions · adc71666
      Aurelien Jarno 提交于
      roundps and roundss SSE2 instructions have been broken when switching
      target-i386 to softfloat. They use float64_round_to_int to convert a
      float32, and while the implicit conversion from float32 to float64 was
      correct for softfloat-native, it is not for pure softfloat. Fix that by
      using the correct registers and correct functions.
      
      Also fix roundpd and roundsd implementation at the same time, even if
      these functions are behaving correctly.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      adc71666
    • A
      target-i386: fix {min,max}{pd,ps,sd,ss} SSE2 instructions · a4d1f142
      Aurelien Jarno 提交于
      minpd, minps, minsd, minss and maxpd, maxps, maxsd, maxss SSE2
      instructions have been broken when switching target-i386 to softfloat.
      It's not possible to use comparison instructions on float types anymore
      to softfloat, so use the floatXX_lt function instead, as the
      float_XX_min and float_XX_max functions can't be used due to the Intel
      specific behaviour.
      
      As it implements the correct NaNs behaviour, let's remove the
      corresponding entry from the TODO.
      
      It fixes GDM screen display on Debian Lenny.
      
      Thanks to Peter Maydell and Jason Wessel for their analysis of the
      problem.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      a4d1f142