1. 10 4月, 2010 5 次提交
  2. 06 4月, 2010 1 次提交
  3. 29 3月, 2010 1 次提交
  4. 20 3月, 2010 2 次提交
    • A
      tcg/arm: correctly save/restore registers in prologue/epilogue · 5c689207
      Aurelien Jarno 提交于
      Since commit 6113d6d3 QEMU crashes
      on ARM hosts. This is not a bug of this commit, but a latent bug
      revealed by this commit.
      
      The TCG code is called through a procedure call using the prologue
      and epilogue code. This code does not save and restore enough registers.
      The "Procedure Call Standard for the ARM Architecture" says:
      
        A subroutine must preserve the contents of the registers r4-r8, r10,
        r11 and SP (and r9 in PCS variants that designate r9 as v6).
      
      The current code only saves and restores r9 to r11, and misses r4 to
      r8. The patch fixes that by saving r4 to r12. Theoretically there is
      no need to save and restore r12, but an even number of registers have
      to be saved as per EABI.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      (cherry picked from commit 4e17eae9)
      5c689207
    • I
      workaround for cmd646 bmdma register access while no dma is active · 18a21890
      Igor V. Kovalenko 提交于
      This is a workaround only, and is a partial revert
      of a few changes to BMDMAState which removed pci_dev
      field on the way.
      
      - cmd646 pci_from_bm() expects bm->unit value to
      correspond with bm data being passed to callback
      as opaque pointer. This breaks when write to dma
      control register of second channel happens when no
      dma operation is in progress, so bm->unit is zero
      for second channel, and pci_from_bm() returns garbage
      pointer. Crash happens shortly after that while
      dereferencing that pointer.
      
      v0->v1: cleaned up dead code from pci_from_bm.
      Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      (cherry picked from commit 90228ee3)
      18a21890
  5. 16 3月, 2010 2 次提交
  6. 15 3月, 2010 1 次提交
  7. 13 3月, 2010 2 次提交
  8. 10 3月, 2010 1 次提交
    • A
      target-i386: fix SIB decoding with index = 4 · d2df336c
      Aurelien Jarno 提交于
      A SIB byte with an index of 4 means "no scaled index", even if the scale
      value is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects
      %r12. This is correctly handled by the computation of the index variable,
      which includes the index bits, and also the REX.X prefix:
      
          index = ((code >> 3) & 7) | REX_X(s);
      
      Thanks to Avi Kivity, Jamie Lokier and Malc for the analysis of the
      problem and the initial patch.
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      (cherry picked from commit b16f827b)
      d2df336c
  9. 07 3月, 2010 3 次提交
  10. 28 2月, 2010 1 次提交
  11. 27 2月, 2010 2 次提交
  12. 24 2月, 2010 19 次提交