- 27 7月, 2013 25 次提交
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由 Andreas Färber 提交于
Completes migration of target-specific code to new target-*/gdbstub.c. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
This avoids polluting the global namespace with a non-prefixed macro and makes it obvious in the call sites that we return. Semi-automatic conversion using, e.g., sed -i 's/GET_REGL(/return gdb_get_regl(mem_buf, /g' target-*/gdbstub.c followed by manual tweaking for sparc's GET_REGA() and Coding Style. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Acked-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Acked-by: NMichael Walle <michael@walle.cc> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Reviewed-by: NJia Liu <proljc@gmail.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
CPUState::gdb_num_regs replaces num_g_regs. CPUClass::gdb_num_core_regs replaces NUM_CORE_REGS. Allows building gdb_register_coprocessor() for xtensa, too. As a side effect this should fix coprocessor register numbering for SMP. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Acked-by: Max Filippov <jcmvbkbc@gmail.com> (for xtensa) Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
GET_REG*() macros include a return statement, thus no need for break. Acked-by: Michael Walle <michael@walle.cc> (for lm32) Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Add braces, replace tabs, remove trailing whitespace, drop space before parenthesis and place break etc. below case statements. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Register a CPU type per core registered. Save the XtensaConfig in XtensaCPUClass and copy it from there to CPUXtensaState, to avoid touching every env->config access for now. Prepares for storing per-class GDB register count. Acked-by: NMax Filippov <jcmvbkbc@gmail.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Christian Borntraeger 提交于
Commit f17ec444 exec: Change cpu_memory_rw_debug() argument to CPUState missed to update s390x KVM code, breaking the build. Let's fix it up. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Stefan Weil 提交于
Passing a CPUState pointer instead of a CPUArchState pointer eliminates the last target dependent data type in sysemu/kvm.h. It also simplifies the code. Signed-off-by: NStefan Weil <sw@weilnetz.de> Acked-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
This fixes a mismerge in 874ec3c5. Acked-by: NRiku Voipio <riku.voipio@iki.fi> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Anthony Liguori 提交于
# By Claudio Fontana (1) and others # Via Richard Henderson * rth/tcg-next: tcg: Remove temp_buf tcg/aarch64: Implement tlb lookup fast path tcg/aarch64: implement ldst 12bit scaled uimm offset Message-id: 1373919944-8521-1-git-send-email-rth@twiddle.net Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
# By Jia Liu # Via Jia Liu * jliu/or32: target-openrisc: Free typename in openrisc_cpu_class_by_name hw/openrisc: Use stderr output instead of qemu_log hw/openrisc: Indent typo Message-id: 1374576458-22808-1-git-send-email-proljc@gmail.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 26 7月, 2013 6 次提交
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由 Anthony Liguori 提交于
# By Laszlo Ersek # Via Michael Roth * mdroth/qga-pull-2013-7-25: qga: escape cmdline args when registering win32 service (CVE-2013-2231) ga_install_service(): nest error paths more idiomatically qga/service-win32.c: diagnostic output should go to stderr Message-id: 1374784644-29078-1-git-send-email-mdroth@linux.vnet.ibm.com
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由 Anthony Liguori 提交于
# By Gerd Hoffmann # Via Gerd Hoffmann * kraxel/seabios-1.7.3: seabios: update to 1.7.3 Message-id: 1374673573-25074-1-git-send-email-kraxel@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
* riku/linux-user-for-upstream: (21 commits) linux-user: Handle compressed ISA encodings when processing MIPS exceptions linux-user: Unlock mmap_lock when resuming guest from page_unprotect linux-user: Reset copied CPUs in cpu_copy() always linux-user: Fix epoll on ARM hosts linux-user: fix segmentation fault passing with h2g(x) != x linux-user: Fix pipe syscall return for SPARC linux-user: Fix target_stat and target_stat64 for OpenRISC linux-user: Avoid conditional cpu_reset() configure: Make NPTL non-optional linux-user: Enable NPTL for x86-64 linux-user: Add i386 TLS setter linux-user: Clean up handling of clone() argument order linux-user: Add missing 'break' in i386 get_thread_area syscall linux-user: Enable NPTL for m68k linux-user: Enable NPTL for SPARC targets linux-user: Enable NPTL for OpenRISC linux-user: Move includes of target-specific headers to end of qemu.h configure: Enable threading for unicore32-linux-user configure: Enable threading on all ppc and mips linux-user targets configure: Don't say target_nptl="no" if there is no linux-user target ... Conflicts: linux-user/main.c Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Laszlo Ersek 提交于
Reported-by: NLev Veyde <lveyde@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NLaszlo Ersek <lersek@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Laszlo Ersek 提交于
Acked-by: NMichael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NLaszlo Ersek <lersek@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Laszlo Ersek 提交于
Acked-by: NMichael Roth <mdroth@linux.vnet.ibm.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NLaszlo Ersek <lersek@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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- 25 7月, 2013 9 次提交
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由 Paolo Bonzini 提交于
The ports at 0xe8..0xeb have impl.min/max_access_size == 1, so that memory accesses are split and combined by the memory core. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-29-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
When combining multiple accesses into a single value, we need to do so in the device's desired endianness. The target endianness does not have any influence. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-28-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
The accessors all use a MemoryRegion opaque value. Avoid going uselessly through void*. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-27-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
Prepare for next patch, no semantic change. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-26-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This writes a register and reads its 1/2/4 byte parts. Masking is done in the device model. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-25-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
The device provides an ISA bus so that pseries can also run the endianness test. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-24-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
The device provides an ISA bus to run the endianness test on. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-23-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This will let these machines run an endianness test for ISA I/O port space. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-22-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
... by making apb a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-21-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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