“37abbb387ea6c90d6084bc147aea9fd77ac575c4”上不存在“README.rst”
- 05 3月, 2018 1 次提交
-
-
由 Laurent Vivier 提交于
Move fpu/softfloat-macros.h to include/fpu/ Export floatx80 functions to be used by target floatx80 specific implementations. Exports: propagateFloatx80NaN(), extractFloatx80Frac(), extractFloatx80Exp(), extractFloatx80Sign(), normalizeFloatx80Subnormal(), packFloatx80(), roundAndPackFloatx80(), normalizeRoundAndPackFloatx80() Also exports packFloat32() that will be used to implement m68k fsinh, fcos, fsin, ftan operations. Signed-off-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-Id: <20180224201802.911-2-laurent@vivier.eu>
-
- 21 2月, 2018 14 次提交
-
-
由 Alex Bennée 提交于
This is a little bit of a departure from softfloat's original approach as we skip the estimate step in favour of a straight iteration. There is a minor optimisation to avoid calculating more bits of precision than we need however this still brings a performance drop, especially for float64 operations. Suggested-by: NRichard Henderson <richard.henderson@linaro.org> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
The compare function was already expanded from a macro. I keep the macro expansion but move most of the logic into a compare_decomposed. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
Let's do the same re-factor treatment for minmax functions. I still use the MACRO trick to expand but now all the checking code is common. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
This is one of the simpler manipulations you could make to a floating point number. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
These are considerably simpler as the lower order integers can just use the higher order conversion function. As the decomposed fractional part is a full 64 bit rounding and inexact handling comes from the pack functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
We share the common int64/uint64_pack_decomposed function across all the helpers and simply limit the final result depending on the final size. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
-
由 Alex Bennée 提交于
We can now add float16_round_to_int and use the common round_decomposed and canonicalize functions to have a single implementation for float16/32/64 round_to_int functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Alex Bennée 提交于
We can now add float16_muladd and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 muladd functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Alex Bennée 提交于
We can now add float16_div and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 versions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Alex Bennée 提交于
We can now add float16_mul and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 versions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Alex Bennée 提交于
We can now add float16_add/sub and use the common decompose and canonicalize functions to have a single implementation for float16/32/64 add and sub functions. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
-
由 Alex Bennée 提交于
These structures pave the way for generic softfloat helper routines that will operate on fully decomposed numbers. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
-
由 Alex Bennée 提交于
This is pure code-motion during re-factoring as the helpers will be needed earlier. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Alex Bennée 提交于
This will be required when expanding the MINMAX() macro for 16 bit/half-precision operations. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 30 6月, 2017 1 次提交
-
-
由 Laurent Vivier 提交于
Add a function to round a floatx80 to the defined precision (floatx80_rounding_precision) Signed-off-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Message-Id: <20170628204241.32106-5-laurent@vivier.eu>
-
- 28 2月, 2017 1 次提交
-
-
由 Peter Maydell 提交于
In float64_to_uint64_round_to_zero() a typo meant that we were taking the uint64_t return value from float64_to_uint64() and putting it into an int64_t variable before returning it as uint64_t again. Use uint64_t instead of pointlessly casting it back and forth to int64_t. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
-
- 22 2月, 2017 3 次提交
-
-
由 Bharata B Rao 提交于
float128_to_uint32_round_to_zero() is needed by xscvqpuwz instruction of PowerPC ISA 3.0. Signed-off-by: NBharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
-
由 Bharata B Rao 提交于
Implement float128_to_uint64() and use that to implement float128_to_uint64_round_to_zero() This is required by xscvqpudz instruction of PowerPC ISA 3.0. Signed-off-by: NBharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
-
由 Bharata B Rao 提交于
Power ISA 3.0 introduces a few quadruple precision floating point instructions that support round-to-odd rounding mode. The round-to-odd mode is explained as under: Let Z be the intermediate arithmetic result or the operand of a convert operation. If Z can be represented exactly in the target format, the result is Z. Otherwise the result is either Z1 or Z2 whichever is odd. Here Z1 and Z2 are the next larger and smaller numbers representable in the target format respectively. Signed-off-by: NBharata B Rao <bharata@linux.vnet.ibm.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
-
- 15 9月, 2016 1 次提交
-
-
由 Andrew Dutcher 提交于
All operations that take a floatx80 as an operand need to have their inputs checked for malformed encodings. In all of these cases, use the function floatx80_invalid_encoding to perform the check. If an invalid operand is found, raise an invalid operation exception, and then return either NaN (for fp-typed results) or the integer indefinite value (the minimum representable signed integer value, for int-typed results). For the non-quiet comparison operations, this touches adjacent code in order to pass style checks. Signed-off-by: NAndrew Dutcher <andrew@andrewdutcher.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1471392895-17324-1-git-send-email-andrew@andrewdutcher.com [PMM: changed "1 << 63" to "1ULL << 63" to fix compile errors] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
- 24 6月, 2016 1 次提交
-
-
由 Aleksandar Markovic 提交于
This patch modifies SoftFloat library so that it can be configured in run-time in relation to the meaning of signaling NaN bit, while, at the same time, strictly preserving its behavior on all existing platforms. Background: In floating-point calculations, there is a need for denoting undefined or unrepresentable values. This is achieved by defining certain floating-point numerical values to be NaNs (which stands for "not a number"). For additional reasons, virtually all modern floating-point unit implementations use two kinds of NaNs: quiet and signaling. The binary representations of these two kinds of NaNs, as a rule, differ only in one bit (that bit is, traditionally, the first bit of mantissa). Up to 2008, standards for floating-point did not specify all details about binary representation of NaNs. More specifically, the meaning of the bit that is used for distinguishing between signaling and quiet NaNs was not strictly prescribed. (IEEE 754-2008 was the first floating-point standard that defined that meaning clearly, see [1], p. 35) As a result, different platforms took different approaches, and that presented considerable challenge for multi-platform emulators like QEMU. Mips platform represents the most complex case among QEMU-supported platforms regarding signaling NaN bit. Up to the Release 6 of Mips architecture, "1" in signaling NaN bit denoted signaling NaN, which is opposite to IEEE 754-2008 standard. From Release 6 on, Mips architecture adopted IEEE standard prescription, and "0" denotes signaling NaN. On top of that, Mips architecture for SIMD (also known as MSA, or vector instructions) also specifies signaling bit in accordance to IEEE standard. MSA unit can be implemented with both pre-Release 6 and Release 6 main processor units. QEMU uses SoftFloat library to implement various floating-point-related instructions on all platforms. The current QEMU implementation allows for defining meaning of signaling NaN bit during build time, and is implemented via preprocessor macro called SNAN_BIT_IS_ONE. On the other hand, the change in this patch enables SoftFloat library to be configured in run-time. This configuration is meant to occur during CPU initialization, at the moment when it is definitely known what desired behavior for particular CPU (or any additional FPUs) is. The change is implemented so that it is consistent with existing implementation of similar cases. This means that structure float_status is used for passing the information about desired signaling NaN bit on each invocation of SoftFloat functions. The additional field in float_status is called snan_bit_is_one, which supersedes macro SNAN_BIT_IS_ONE. IMPORTANT: This change is not meant to create any change in emulator behavior or functionality on any platform. It just provides the means for SoftFloat library to be used in a more flexible way - in other words, it will just prepare SoftFloat library for usage related to Mips platform and its specifics regarding signaling bit meaning, which is done in some of subsequent patches from this series. Further break down of changes: 1) Added field snan_bit_is_one to the structure float_status, and correspondent setter function set_snan_bit_is_one(). 2) Constants <float16|float32|float64|floatx80|float128>_default_nan (used both internally and externally) converted to functions <float16|float32|float64|floatx80|float128>_default_nan(float_status*). This is necessary since they are dependent on signaling bit meaning. At the same time, for the sake of code cleanup and simplicity, constants <floatx80|float128>_default_nan_<low|high> (used only internally within SoftFloat library) are removed, as not needed. 3) Added a float_status* argument to SoftFloat library functions XXX_is_quiet_nan(XXX a_), XXX_is_signaling_nan(XXX a_), XXX_maybe_silence_nan(XXX a_). This argument must be present in order to enable correct invocation of new version of functions XXX_default_nan(). (XXX is <float16|float32|float64|floatx80|float128> here) 4) Updated code for all platforms to reflect changes in SoftFloat library. This change is twofolds: it includes modifications of SoftFloat library functions invocations, and an addition of invocation of function set_snan_bit_is_one() during CPU initialization, with arguments that are appropriate for each particular platform. It was established that all platforms zero their main CPU data structures, so snan_bit_is_one(0) in appropriate places is not added, as it is not needed. [1] "IEEE Standard for Floating-Point Arithmetic", IEEE Computer Society, August 29, 2008. Signed-off-by: NThomas Schwinge <thomas@codesourcery.com> Signed-off-by: NMaciej W. Rozycki <macro@codesourcery.com> Signed-off-by: NAleksandar Markovic <aleksandar.markovic@imgtec.com> Tested-by: NBastian Koppelmann <kbastian@mail.uni-paderborn.de> Reviewed-by: NLeon Alrae <leon.alrae@imgtec.com> Tested-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> [leon.alrae@imgtec.com: * cherry-picked 2 chunks from patch #2 to fix compilation warnings] Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com>
-
- 20 2月, 2016 3 次提交
-
-
由 Peter Maydell 提交于
Use the plain 'int' type rather than 'int_fast16_t' for handling exponents. Exponents don't need to be exactly 16 bits, so using int16_t for them would confuse more than it clarified. This should be a safe change because int_fast16_t semantics permit use of 'int' (and on 32-bit glibc that is what you get). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-4-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Use the plain 'int' type rather than 'int_fast16_t' for shift counts in the various shift related functions, since we don't actually care about the size of the integer at all here, and using int16_t would be confusing. This should be a safe change because int_fast16_t semantics permit use of 'int' (and on 32-bit glibc that is what you get). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-3-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Make the functions which convert floating point to 16 bit integer return int16_t rather than int_fast16_t, and correspondingly use int_fast16_t in their internal implementations where appropriate. (These functions are used only by the ARM target.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Message-id: 1453807806-32698-2-git-send-email-peter.maydell@linaro.org
-
- 05 2月, 2016 1 次提交
-
-
由 Peter Maydell 提交于
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1454089805-5470-16-git-send-email-peter.maydell@linaro.org
-
- 22 1月, 2016 6 次提交
-
-
由 Aurelien Jarno 提交于
The roundAndPackFloat16 function should return a float16 value, not a float32 one. Fix that. Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1452700993-6570-1-git-send-email-aurelien@aurel32.net Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
-
由 Peter Maydell 提交于
Replace the int8 softfloat-specific typedef with int8_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint8\b/int8_t/g' together with manual removal of the typedef definition, and manual undoing of various mis-hits. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NLeon Alrae <leon.alrae@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-6-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Replace the uint32 softfloat-specific typedef with uint32_t. This change was made with find include hw fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\buint32\b/uint32_t/g' together with manual removal of the typedef definition, manual undoing of various mis-hits, and another couple of fixes found via test compilation. All the uses in hw/ were using the wrong type by mistake. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NLeon Alrae <leon.alrae@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-5-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Replace the int32 softfloat-specific typedef with int32_t. This change was made with find hw include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint32\b/int32_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. The uses in hw/ipmi/ should not have been using this type at all. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NLeon Alrae <leon.alrae@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-4-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Replace the uint64 softfloat-specific typedef with uint64_t. This change was made with find include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\buint64\b/uint64_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. Note that the target-mips/kvm.c and target-s390x/kvm.c changes are fixing code that should not have been using the uint64 type in the first place. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NLeon Alrae <leon.alrae@imgtec.com> Acked-by: NJames Hogan <james.hogan@imgtec.com> Message-id: 1452603315-27030-3-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
Replace the int64 softfloat-specific typedef with int64_t. This change was made with find include fpu target-* -name '*.[ch]' | xargs sed -i -e 's/\bint64\b/int64_t/g' together with manual removal of the typedef definition, and manual undoing of some mis-hits where macro arguments were being used for token pasting rather than as a type. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NLeon Alrae <leon.alrae@imgtec.com> Message-id: 1452603315-27030-2-git-send-email-peter.maydell@linaro.org
-
- 07 2月, 2015 3 次提交
-
-
由 Peter Maydell 提交于
Expand out and remove the STATUS macro. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
-
由 Peter Maydell 提交于
Expand out and remove the STATUS_VAR macro. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
-
由 Peter Maydell 提交于
Expand out STATUS_PARAM wherever it is used and delete the definition. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
-
- 30 1月, 2015 1 次提交
-
-
由 Peter Maydell 提交于
The code in the softfloat source files is under a mixture of licenses: the original code and many changes from QEMU contributors are under the base SoftFloat-2a license; changes from Stefan Weil and RedHat employees are GPLv2-or-later; changes from Fabrice Bellard are under the BSD license. Clarify this in the comments at the top of each affected source file, including a statement about the assumed licensing for future contributions, so we don't need to remember to ask patch submitters explicitly to pick a license. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Acked-by: NAndreas Färber <afaerber@suse.de> Acked-by: NAurelien Jarno <aurelien@aurel32.net> Acked-by: NAvi Kivity <avi.kivity@gmail.com> Acked-by: NBen Taylor <bentaylor.solx86@gmail.com> Acked-by: NBlue Swirl <blauwirbel@gmail.com> Acked-by: NChristophe Lyon <christophe.lyon@st.com> Acked-by: NFabrice Bellard <fabrice@bellard.org> Acked-by: NGuan Xuetao <gxt@mprc.pku.edu.cn> Acked-by: NJuan Quintela <quintela@redhat.com> Acked-by: NMax Filippov <jcmvbkbc@gmail.com> Acked-by: NPaul Brook <paul@codesourcery.com> Acked-by: NPaolo Bonzini <pbonzini@redhat.com> Acked-by: NPeter Maydell <peter.maydell@linaro.org> Acked-by: NRichard Henderson <rth@twiddle.net> Acked-by: NRichard Sandiford <rdsandiford@googlemail.com> Acked-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-5-git-send-email-peter.maydell@linaro.org
-
- 29 1月, 2015 2 次提交
-
-
由 Peter Maydell 提交于
Revert the remaining portions of commits 75d62a58 and 3430b0be which are under a SoftFloat-2b license, ie the functions uint64_to_float32() and uint64_to_float64(). (The float64_to_uint64() and float64_to_uint64_round_to_zero() functions were completely rewritten in commits fb3ea83a and 0a87a310 so can stay.) Reimplement from scratch the uint64_to_float64() and uint64_to_float32() conversion functions. [This is a mechanical squashing together of two separate "revert" and "reimplement" patches.] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-3-git-send-email-peter.maydell@linaro.org
-
由 Peter Maydell 提交于
This commit applies the changes to master which correspond to replacing commit 158142c2 with a set of changes made by: * taking the SoftFloat-2a release * mechanically transforming the block comment style * reapplying Fabrice's original changes from 158142c2 This commit was created by: diff -u 158142c2 import-sf-2a patch -p1 --fuzz 10 <../relicense-patch.txt (where import-sf-2a is the branch resulting from the changes above). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Message-id: 1421073508-23909-2-git-send-email-peter.maydell@linaro.org
-
- 14 10月, 2014 1 次提交
-
-
由 Leon Alrae 提交于
Add abs argument to the existing softfloat minmax() function and define new float{32,64}_{min,max}nummag functions. minnummag(x,y) returns x if |x| < |y|, returns y if |y| < |x|, otherwise minnum(x,y) maxnummag(x,y) returns x if |x| > |y|, returns y if |y| > |x|, otherwise maxnum(x,y) Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
-
- 23 6月, 2014 1 次提交
-
-
由 Luiz Capitulino 提交于
This commit expands all uses of the INLINE macro and drop it. The reason for this is to avoid clashes with external libraries with bad name conventions and also because renaming keywords is not a good practice. PS: I'm fine with this change to be licensed under softfloat-2a or softfloat-2b. Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
-