- 20 6月, 2013 1 次提交
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由 Paolo Bonzini 提交于
So far, the size of all regions passed to listeners could fit in 64 bits, because artificial regions (containers and aliases) are eliminated by the memory core, leaving only device regions which have reasonable sizes An IOMMU however cannot be eliminated by the memory core, and may have an artificial size, hence we may need 65 bits to represent its size. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 19 12月, 2012 1 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 23 10月, 2012 1 次提交
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由 Avi Kivity 提交于
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 28 3月, 2012 1 次提交
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由 Blue Swirl 提交于
Mask incoming page address early so that resolved addresses are page aligned. Remove further address masking. Tested-by: NArtyom Tarasenko <atar4qemu@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 15 3月, 2012 1 次提交
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由 Andreas Färber 提交于
Scripted conversion: sed -i "s/CPUState/CPUSPARCState/g" target-sparc/*.[hc] sed -i "s/#define CPUSPARCState/#define CPUState/" target-sparc/cpu.h Signed-off-by: NAndreas Färber <afaerber@suse.de> Acked-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 04 1月, 2012 1 次提交
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由 Avi Kivity 提交于
This reaches into the innards of the memory core, which are being changed. Switch to a memory API version. Signed-off-by: NAvi Kivity <avi@redhat.com>
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- 27 10月, 2011 4 次提交
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由 Blue Swirl 提交于
Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Move MMU helpers to mmu_helper.c. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Before the next patch, fix coding style of the areas affected. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Make [su]div{,cc} helpers take a parameter for CPUState instead of relying on global env. Move the functions to helper.c. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 23 10月, 2011 4 次提交
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由 Blue Swirl 提交于
Make raise_exception() and helper_debug() take a parameter for CPUState instead of relying on global env. Move the functions to helper.c. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
These functions don't need access to CPUState or already pass it, so relocating them from op_helper.c to helper.c and int64_helper.c is trivial. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Move CPU init to cpu_init.c and interrupt handling to int32_helper.c for Sparc32 and int64_helper.c for Sparc64. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Before the next patch, fix coding style of the areas affected. Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 11 9月, 2011 1 次提交
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由 Fabien Chouteau 提交于
Gdb expects all registers windows to be flushed in ram, which is not the case in Qemu. Therefore the back-trace generation doesn't work. This patch adds a function to handle reads (and only read) in stack frames as if windows were flushed. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 21 8月, 2011 1 次提交
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由 Anthony Liguori 提交于
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 07 8月, 2011 1 次提交
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由 Blue Swirl 提交于
Parameter is_softmmu (and its evil mutant twin brother is_softmuu) is not used in cpu_*_handle_mmu_fault() functions, remove them and adjust callers. Acked-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 22 7月, 2011 7 次提交
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由 Stefan Weil 提交于
This change is needed because commit 06e12b65 now uses an unsigned long long value (uint64_t && unsigned long long => unsigned long long). Cc: Tsuneo Saito <tsnsaito@gmail.com> Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
This patch implements MMU faults caused by TTE.NFO and TTE.E: - access other than nonfaulting load to a page marked NFO should raise data_access_exception - nonfaulting load to a page marked with E bit should raise data_access_exception To distinguish nonfaulting loads, this patch extends (abuses?) the rw argument of get_physical_address_data(). rw is set to 4 on nonfaulting loads. Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
cpu_get_phys_page_nofault() calls get_physical_address() twice, that results in overwriting the fault status in the SFSR. We need this change in order for nonfaulting loads to raising MMU faults as normal loads do. Also removed the call to cpu_get_physical_page_desc() since we are going to modify nonfaulting loads raising MMU faults. Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
This patch makes cpu_get_phys_page_debug() independent from cpu_get_phys_page_nofault() in advance of implementing nonfaulting load. This also modifies cpu_get_phys_page_nofault() to be compiled only on TARGET_SPARC64 because it is not required on SPARC32. Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
Introduce cpu_sparc_get_phys_page() to be used as a help for splitting cpu_get_phys_page_debug() from cpu_get_phys_page_nofault(). Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
Add macros for SFSR fields and use macros instead of magic numbers. Also fix the update of the register fields on MMU faults. Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Tsuneo Saito 提交于
Add macros for TTE bits and modify to use macros instead of magic numbers. Signed-off-by: NTsuneo Saito <tsnsaito@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 27 6月, 2011 2 次提交
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由 Blue Swirl 提交于
Most exec-all.h include directives are now useless, remove them. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
do_interrupt() was mixing CPUState pointer passed from caller and global env (AREG0). Fix by moving the function to helper.c. Introduce a helper for calling change_pstate() safely from outside of execution context. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 08 6月, 2011 1 次提交
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由 Alexandre Raymond 提交于
This patch removes all references to signal.h when qemu-common.h is included as they become redundant. Signed-off-by: NAlexandre Raymond <cerbere@gmail.com> Signed-off-by: NStefan Hajnoczi <stefanha@linux.vnet.ibm.com>
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- 02 2月, 2011 1 次提交
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由 Fabien Chouteau 提交于
The "leon3_cache_control_int" (op_helper.c) function is called within leon3.c which leads to segfault error with the global "env". Now cache control is a CPU feature and everything is handled in op_helper.c. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 25 1月, 2011 2 次提交
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由 Fabien Chouteau 提交于
This register is activated by CPU_FEATURE_ASR17 in the feature field. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Fabien Chouteau 提交于
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (more information on http://www.gaisler.com). Leon3 is made of multiple components available in the GrLib VHDL library. Three devices are implemented: uart, timers and IRQ manager. You can find code for these peripherals in the grlib_* files. Signed-off-by: NFabien Chouteau <chouteau@adacore.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 19 12月, 2010 1 次提交
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由 Blue Swirl 提交于
Use existing dump_mmu() to implement monitor command 'info tlb'. Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 03 12月, 2010 1 次提交
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由 Peter Maydell 提交于
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- 30 10月, 2010 1 次提交
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由 Stefan Weil 提交于
fprintf_function uses format checking with GCC_FMT_ATTR. Format errors were fixed in * target-i386/helper.c * target-mips/translate.c * target-ppc/translate.c Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 03 6月, 2010 1 次提交
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由 Igor V. Kovalenko 提交于
- set mmu tag access register on FAULT and PROT traps as well Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 22 5月, 2010 5 次提交
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由 Igor V. Kovalenko 提交于
- cpu_mmu_index return MMU_NUCLEUS_IDX if trap level is not zero - cpu_get_tb_cpu_state: store trap level and primary context in flags this allows to restart code translation when address translation is changed - stop translation block after writing to pstate and tl registers - stop translation block after writing to alternate space this can be optimized to stop only if address translation can be changed by write operation (e.g. by comparing with MMU ASI values) Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Igor V. Kovalenko 提交于
Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Igor V. Kovalenko 提交于
- refactor code to handle hpstate only if available for current cpu - conditionally set hypervisor bit in hpstate register - reorder softmmu indices so user accessable ones go first, translation context macros supervisor() and hypervisor() adjusted as well - disable sparcv8 registers for TARGET_SPARC64 - fix cpu_mmu_index to use sparcv9 bits only Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Igor V. Kovalenko 提交于
- separate PRIV and PROT handling - DPRINTF_MMU macro to clean up debug code - dump mmu_idx, trap level and mmu context registers along with address translation values Signed-off-by: NIgor V. Kovalenko <igor.v.kovalenko@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 13 5月, 2010 1 次提交
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由 Stefan Weil 提交于
cpu_get_ccr() returns a target_ulong, so a type cast is needed to avoid wrong output on big endian hosts. We could also use TARGET_FMT_lx, but that would print 8 instead of 2 digits. Cc: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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