1. 29 4月, 2020 8 次提交
  2. 23 4月, 2020 1 次提交
  3. 22 4月, 2020 2 次提交
  4. 21 4月, 2020 2 次提交
  5. 20 4月, 2020 2 次提交
    • P
      Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-5.0-pull-request' into staging · d5232d8b
      Peter Maydell 提交于
      Fix epoll_create1() for qemu-alpha
      
      # gpg: Signature made Thu 16 Apr 2020 16:28:15 BST
      # gpg:                using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
      # gpg:                issuer "laurent@vivier.eu"
      # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
      # gpg:                 aka "Laurent Vivier <laurent@vivier.eu>" [full]
      # gpg:                 aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
      # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F  5173 F30C 38BD 3F2F BE3C
      
      * remotes/vivier2/tags/linux-user-for-5.0-pull-request:
        linux-user/syscall.c: add target-to-host mapping for epoll_create1()
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      d5232d8b
    • C
      block/iscsi:fix heap-buffer-overflow in iscsi_aio_ioctl_cb · ff0507c2
      Chen Qun 提交于
      There is an overflow, the source 'datain.data[2]' is 100 bytes,
       but the 'ss' is 252 bytes.This may cause a security issue because
       we can access a lot of unrelated memory data.
      
      The len for sbp copy data should take the minimum of mx_sb_len and
       sb_len_wr, not the maximum.
      
      If we use iscsi device for VM backend storage, ASAN show stack:
      
      READ of size 252 at 0xfffd149dcfc4 thread T0
          #0 0xaaad433d0d34 in __asan_memcpy (aarch64-softmmu/qemu-system-aarch64+0x2cb0d34)
          #1 0xaaad45f9d6d0 in iscsi_aio_ioctl_cb /qemu/block/iscsi.c:996:9
          #2 0xfffd1af0e2dc  (/usr/lib64/iscsi/libiscsi.so.8+0xe2dc)
          #3 0xfffd1af0d174  (/usr/lib64/iscsi/libiscsi.so.8+0xd174)
          #4 0xfffd1af19fac  (/usr/lib64/iscsi/libiscsi.so.8+0x19fac)
          #5 0xaaad45f9acc8 in iscsi_process_read /qemu/block/iscsi.c:403:5
          #6 0xaaad4623733c in aio_dispatch_handler /qemu/util/aio-posix.c:467:9
          #7 0xaaad4622f350 in aio_dispatch_handlers /qemu/util/aio-posix.c:510:20
          #8 0xaaad4622f350 in aio_dispatch /qemu/util/aio-posix.c:520
          #9 0xaaad46215944 in aio_ctx_dispatch /qemu/util/async.c:298:5
          #10 0xfffd1bed12f4 in g_main_context_dispatch (/lib64/libglib-2.0.so.0+0x512f4)
          #11 0xaaad46227de0 in glib_pollfds_poll /qemu/util/main-loop.c:219:9
          #12 0xaaad46227de0 in os_host_main_loop_wait /qemu/util/main-loop.c:242
          #13 0xaaad46227de0 in main_loop_wait /qemu/util/main-loop.c:518
          #14 0xaaad43d9d60c in qemu_main_loop /qemu/softmmu/vl.c:1662:9
          #15 0xaaad4607a5b0 in main /qemu/softmmu/main.c:49:5
          #16 0xfffd1a460b9c in __libc_start_main (/lib64/libc.so.6+0x20b9c)
          #17 0xaaad43320740 in _start (aarch64-softmmu/qemu-system-aarch64+0x2c00740)
      
      0xfffd149dcfc4 is located 0 bytes to the right of 100-byte region [0xfffd149dcf60,0xfffd149dcfc4)
      allocated by thread T0 here:
          #0 0xaaad433d1e70 in __interceptor_malloc (aarch64-softmmu/qemu-system-aarch64+0x2cb1e70)
          #1 0xfffd1af0e254  (/usr/lib64/iscsi/libiscsi.so.8+0xe254)
          #2 0xfffd1af0d174  (/usr/lib64/iscsi/libiscsi.so.8+0xd174)
          #3 0xfffd1af19fac  (/usr/lib64/iscsi/libiscsi.so.8+0x19fac)
          #4 0xaaad45f9acc8 in iscsi_process_read /qemu/block/iscsi.c:403:5
          #5 0xaaad4623733c in aio_dispatch_handler /qemu/util/aio-posix.c:467:9
          #6 0xaaad4622f350 in aio_dispatch_handlers /qemu/util/aio-posix.c:510:20
          #7 0xaaad4622f350 in aio_dispatch /qemu/util/aio-posix.c:520
          #8 0xaaad46215944 in aio_ctx_dispatch /qemu/util/async.c:298:5
          #9 0xfffd1bed12f4 in g_main_context_dispatch (/lib64/libglib-2.0.so.0+0x512f4)
          #10 0xaaad46227de0 in glib_pollfds_poll /qemu/util/main-loop.c:219:9
          #11 0xaaad46227de0 in os_host_main_loop_wait /qemu/util/main-loop.c:242
          #12 0xaaad46227de0 in main_loop_wait /qemu/util/main-loop.c:518
          #13 0xaaad43d9d60c in qemu_main_loop /qemu/softmmu/vl.c:1662:9
          #14 0xaaad4607a5b0 in main /qemu/softmmu/main.c:49:5
          #15 0xfffd1a460b9c in __libc_start_main (/lib64/libc.so.6+0x20b9c)
          #16 0xaaad43320740 in _start (aarch64-softmmu/qemu-system-aarch64+0x2c00740)
      Reported-by: NEuler Robot <euler.robot@huawei.com>
      Signed-off-by: NChen Qun <kuhn.chenqun@huawei.com>
      Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com>
      Message-id: 20200418062602.10776-1-kuhn.chenqun@huawei.com
      Reviewed-by: NDaniel P. Berrangé <berrange@redhat.com>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      ff0507c2
  6. 17 4月, 2020 3 次提交
    • N
      target/ppc: Fix mtmsr(d) L=1 variant that loses interrupts · 5ed19506
      Nicholas Piggin 提交于
      If mtmsr L=1 sets MSR[EE] while there is a maskable exception pending,
      it does not cause an interrupt. This causes the test case to hang:
      
      https://lists.gnu.org/archive/html/qemu-ppc/2019-10/msg00826.html
      
      More recently, Linux reduced the occurance of operations (e.g., rfi)
      which stop translation and allow pending interrupts to be processed.
      This started causing hangs in Linux boot in long-running kernel tests,
      running with '-d int' shows the decrementer stops firing despite DEC
      wrapping and MSR[EE]=1.
      
      https://lists.ozlabs.org/pipermail/linuxppc-dev/2020-April/208301.html
      
      The cause is the broken mtmsr L=1 behaviour, which is contrary to the
      architecture. From Power ISA v3.0B, p.977, Move To Machine State Register,
      Programming Note states:
      
          If MSR[EE]=0 and an External, Decrementer, or Performance Monitor
          exception is pending, executing an mtmsrd instruction that sets
          MSR[EE] to 1 will cause the interrupt to occur before the next
          instruction is executed, if no higher priority exception exists
      
      Fix this by handling L=1 exactly the same way as L=0, modulo the MSR
      bits altered.
      
      The confusion arises from L=0 being "context synchronizing" whereas L=1
      is "execution synchronizing", which is a weaker semantic. However this
      is not a relaxation of the requirement that these exceptions cause
      interrupts when MSR[EE]=1 (e.g., when mtmsr executes to completion as
      TCG is doing here), rather it specifies how a pipelined processor can
      have multiple instructions in flight where one may influence how another
      behaves.
      
      Cc: qemu-stable@nongnu.org
      Reported-by: NAnton Blanchard <anton@ozlabs.org>
      Reported-by: NNathan Chancellor <natechancellor@gmail.com>
      Tested-by: NNathan Chancellor <natechancellor@gmail.com>
      Signed-off-by: NNicholas Piggin <npiggin@gmail.com>
      Message-Id: <20200414111131.465560-1-npiggin@gmail.com>
      Reviewed-by: NCédric Le Goater <clg@kaod.org>
      Tested-by: NCédric Le Goater <clg@kaod.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      5ed19506
    • G
      target/ppc: Fix wrong interpretation of the disposition flag. · 211a7784
      Ganesh Goudar 提交于
      Bitwise AND with kvm_run->flags to evaluate if we recovered from
      MCE or not is not correct, As disposition in kvm_run->flags is a
      two-bit integer value and not a bit map, So check for equality
      instead of bitwise AND.
      
      Without the fix qemu treats any unrecoverable mce error as recoverable
      and ends up in a mce loop inside the guest, Below are the MCE logs before
      and after the fix.
      
      Before fix:
      
      [   66.775757] MCE: CPU0: Initiator CPU
      [   66.775891] MCE: CPU0: Unknown
      [   66.776587] MCE: CPU0: machine check (Harmless) Host UE Indeterminate [Recovered]
      [   66.776857] MCE: CPU0: NIP: [c0080000000e00b8] mcetest_tlbie+0xb0/0x128 [mcetest_tlbie]
      
      After fix:
      
      [ 20.650577] CPU: 0 PID: 1415 Comm: insmod Tainted: G M O 5.6.0-fwnmi-arv+ #11
      [ 20.650618] NIP: c0080000023a00e8 LR: c0080000023a00d8 CTR: c000000000021fe0
      [ 20.650660] REGS: c0000001fffd3d70 TRAP: 0200 Tainted: G M O (5.6.0-fwnmi-arv+)
      [ 20.650708] MSR: 8000000002a0b033 <SF,VEC,VSX,EE,FP,ME,IR,DR,RI,LE> CR: 42000222 XER: 20040000
      [ 20.650758] CFAR: c00000000000b940 DAR: c0080000025e00e0 DSISR: 00000200 IRQMASK: 0
      [ 20.650758] GPR00: c0080000023a00d8 c0000001fddd79a0 c0080000023a8500 0000000000000039
      [ 20.650758] GPR04: 0000000000000001 0000000000000000 0000000000000000 0000000000000007
      [ 20.650758] GPR08: 0000000000000007 c0080000025e00e0 0000000000000000 00000000000000f7
      [ 20.650758] GPR12: 0000000000000000 c000000001900000 c00000000101f398 c0080000025c052f
      [ 20.650758] GPR16: 00000000000003a8 c0080000025c0000 c0000001fddd7d70 c0000000015b7940
      [ 20.650758] GPR20: 000000000000fff1 c000000000f72c28 c0080000025a0988 0000000000000000
      [ 20.650758] GPR24: 0000000000000100 c0080000023a05d0 c0000000001f1d70 0000000000000000
      [ 20.650758] GPR28: c0000001fde20000 c0000001fd02b2e0 c0080000023a0000 c0080000025e0000
      [ 20.651178] NIP [c0080000023a00e8] mcetest_tlbie+0xe8/0xf0 [mcetest_tlbie]
      [ 20.651220] LR [c0080000023a00d8] mcetest_tlbie+0xd8/0xf0 [mcetest_tlbie]
      [ 20.651262] Call Trace:
      [ 20.651280] [c0000001fddd79a0] [c0080000023a00d8] mcetest_tlbie+0xd8/0xf0 [mcetest_tlbie] (unreliable)
      [ 20.651340] [c0000001fddd7a10] [c00000000001091c] do_one_initcall+0x6c/0x2c0
      [ 20.651390] [c0000001fddd7af0] [c0000000001f7998] do_init_module+0x90/0x298
      [ 20.651433] [c0000001fddd7b80] [c0000000001f61a8] load_module+0x1f58/0x27a0
      [ 20.651476] [c0000001fddd7d40] [c0000000001f6c70] __do_sys_finit_module+0xe0/0x100
      [ 20.651526] [c0000001fddd7e20] [c00000000000b9d0] system_call+0x5c/0x68
      [ 20.651567] Instruction dump:
      [ 20.651594] e8410018 3c620000 e8638020 480000cd e8410018 3c620000 e8638028 480000bd
      [ 20.651646] e8410018 7be904e4 39400000 612900e0 <7d434a64> 4bffff74 3c4c0001 38428410
      [ 20.651699] ---[ end trace 4c40897f016b4340 ]---
      [ 20.653310]
      Bus error
      [ 20.655575] MCE: CPU0: machine check (Harmless) Host UE Indeterminate [Not recovered]
      [ 20.655575] MCE: CPU0: NIP: [c0080000023a00e8] mcetest_tlbie+0xe8/0xf0 [mcetest_tlbie]
      [ 20.655576] MCE: CPU0: Initiator CPU
      [ 20.655576] MCE: CPU0: Unknown
      Signed-off-by: NGanesh Goudar <ganeshgr@linux.ibm.com>
      Message-Id: <20200408170944.16003-1-ganeshgr@linux.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      211a7784
    • R
      linux-user/ppc: Fix padding in mcontext_t for ppc64 · 5da5f47e
      Richard Henderson 提交于
      The padding that was added in 95cda4c4 was added to a union,
      and so it had no effect.  This fixes misalignment errors detected
      by clang sanitizers for ppc64 and ppc64le.
      
      In addition, only ppc64 allocates space for VSX registers, so do
      not save them for ppc32.  The kernel only has references to
      CONFIG_SPE in signal_32.c, so do not attempt to save them for ppc64.
      
      Fixes: 95cda4c4Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>
      Message-Id: <20200407032105.26711-1-richard.henderson@linaro.org>
      Acked-by: NLaurent Vivier <laurent@vivier.eu>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      5da5f47e
  7. 16 4月, 2020 4 次提交
  8. 15 4月, 2020 18 次提交