1. 16 12月, 2014 12 次提交
    • G
      spice: rework mirror allocation, add no-resize fast path · 555e72f2
      Gerd Hoffmann 提交于
      Add fast path to qemu_spice_display_switch in case old and new
      displaysurface have identical size (happens with display panning
      and page flipping).  We just swap the backing store then and don't
      go through the whole process of deleting and creating the primary
      surface.
      
      To simplify the code a bit move mirror surface allocation to
      qemu_spice_display_switch().
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      555e72f2
    • G
      spice: reduce refresh rate in native mode · 3dcadce5
      Gerd Hoffmann 提交于
      Now that cursor updates are out of the way qxl needs the refresh timer
      only when when running in vga mode, for dirty bitmap checking.  In
      native qxl mode the guest will notify us, so we don't need to poll and
      can use the idle interval (one refresh wakeup every few seconds).
      
      Cc: Marc-André Lureau <marcandre.lureau@gmail.com>
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      3dcadce5
    • G
      spice: use bottom half instead of refresh timer for cursor updates · 0b2824e5
      Gerd Hoffmann 提交于
      Calling directly doesn't work due to the qxl-render code running in
      spice server thread context.  Meanwhile bottom half scheduling is
      thread-safe though, so we can use that to kick a cursor update in
      main i/o thread context.
      
      Cc: Marc-André Lureau <marcandre.lureau@gmail.com>
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      0b2824e5
    • P
      Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging · dfa9c2a0
      Peter Maydell 提交于
      - Migration and linuxboot fixes for 2.2 regressions
      - valgrind/KVM support
      - small i386 patches
      - PCI SD host controller support
      - malloc/free cleanups from Markus (x86/scsi)
      - IvyBridge model
      - XSAVES support for KVM
      - initial patches from record/replay
      
      # gpg: Signature made Mon 15 Dec 2014 16:35:08 GMT using RSA key ID 78C7AE83
      # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>"
      # gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>"
      # gpg: WARNING: This key is not certified with sufficiently trusted signatures!
      # gpg:          It is not certain that the signature belongs to the owner.
      # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
      #      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83
      
      * remotes/bonzini/tags/for-upstream: (47 commits)
        sdhci: Support SDHCI devices on PCI
        sdhci: Define SDHCI PCI ids
        sdhci: Add "sysbus" to sdhci QOM types and methods
        sdhci: Remove class "virtual" methods
        sdhci: Set a default frequency clock
        serial: only resample THR interrupt on rising edge of IER.THRI
        serial: update LSR on enabling/disabling FIFOs
        serial: clean up THRE/TEMT handling
        serial: reset thri_pending on IER writes with THRI=0
        linuxboot: fix loading old kernels
        kvm/apic: fix 2.2->2.1 migration
        target-i386: add Ivy Bridge CPU model
        target-i386: add f16c and rdrand to Haswell and Broadwell
        target-i386: add VME to all CPUs
        pc: add 2.3 machine types
        i386: do not cross the pages boundaries in replay mode
        cpus: make icount warp behave well with respect to stop/cont
        timer: introduce new QEMU_CLOCK_VIRTUAL_RT clock
        cpu-exec: invalidate nocache translation if they are interrupted
        icount: introduce cpu_get_icount_raw
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      dfa9c2a0
    • K
      sdhci: Support SDHCI devices on PCI · 224d10ff
      Kevin O'Connor 提交于
      Support for PCI devices following the "SD Host Controller Simplified
      Specification Version 2.00" spec.
      Signed-off-by: NKevin O'Connor <kevin@koconnor.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      224d10ff
    • K
      sdhci: Define SDHCI PCI ids · ece5e5bf
      Kevin O'Connor 提交于
      Signed-off-by: NKevin O'Connor <kevin@koconnor.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      ece5e5bf
    • K
      sdhci: Add "sysbus" to sdhci QOM types and methods · 7302dcd6
      Kevin O'Connor 提交于
      Update the sdhci sysbus QOM types and methods so that sysbus is in
      their name.  This is in preparation for adding PCI versions of these
      types and methods.
      Signed-off-by: NKevin O'Connor <kevin@koconnor.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      7302dcd6
    • K
      sdhci: Remove class "virtual" methods · d368ba43
      Kevin O'Connor 提交于
      The SDHCIClass defines a series of class "methods".  However, no code
      in the QEMU tree overrides these methods or even uses them outside of
      sdhci.c.
      
      Remove the virtual methods and replace them with direct calls to the
      underlying functions.  This simplifies the process of extending the
      sdhci code to support PCI devices (which have a different parent
      class).
      Signed-off-by: NKevin O'Connor <kevin@koconnor.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      d368ba43
    • K
      sdhci: Set a default frequency clock · c7ff8daa
      Kevin O'Connor 提交于
      The Linux SDHCI PCI driver will only register the device if there is a
      clock frequency set.  So, set a default frequency of 52Mhz.
      Signed-off-by: NKevin O'Connor <kevin@koconnor.net>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      c7ff8daa
    • P
      serial: only resample THR interrupt on rising edge of IER.THRI · 1645b8ee
      Paolo Bonzini 提交于
      There is disagreement on whether LSR.THRE should be resampled when
      IER.THRI goes from 1 to 1.  Bochs only does it if IER.THRI goes from 0
      to 1; PCE does it even if IER.THRI is unchanged.  But the Windows driver
      seems to always go from 1 to 0 and back to 1, so do things in agreement
      with Bochs, because the handling of thr_ipending was reported in 2010
      (https://lists.gnu.org/archive/html/qemu-devel/2010-03/msg01914.html)
      as breaking DR-DOS Plus.
      Reported-by: NRoy Tam <roytam@gmail.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      1645b8ee
    • P
      serial: update LSR on enabling/disabling FIFOs · 023c3a97
      Paolo Bonzini 提交于
      When the transmit FIFO is emptied or enabled, the transmitter
      hold register is empty.  When it is disabled, it is also emptied and
      in addition the previous contents of the transmitter hold register
      are discarded.  In either case, the THRE bit in LSR must be set and
      THRI raised.
      
      When the receive FIFO is emptied or enabled, the data ready and break
      bits must be cleared in LSR.  Likewise when the receive FIFO is disabled.
      Reviewed-by: NDr. David Alan Gilbert <dgilbert@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      023c3a97
    • P
      serial: clean up THRE/TEMT handling · 0d931d70
      Paolo Bonzini 提交于
      - assert TEMT is cleared before sending a character; we'll get one from
      TSR if tsr_retry > 0, from the FIFO or THR otherwise
      
      - assert THRE cleared and FIFO not empty (if enabled) before fetching a
      character to send.  This effectively reverts dffacd46, but the check
      makes no sense and commit f702e62a (serial: change retry logic to avoid
      concurrency, 2014-07-11) must have made it unnecessary.  The commit
      message for f702e62a talks about multiple calls to qemu_chr_fe_add_watch
      triggering s->tsr_retry >= MAX_XMIT_RETRY, but other failures were
      possible.  For example, if you have multiple calls, the subsequent ones
      will see s->tsr_retry == 0 and will find THRE and/or TEMT on entry.
      
      - for clarity, raise THRI immediately after the code sets THRE
      
      - check THRE to see if another character has to be sent.  This makes
      the assertions more obvious and also means TEMT has to be set as soon as
      the loop ends.  It makes the loop send both TSR and THR if flow-control
      happens in non-FIFO mode.  Previously, THR would be lost.
      
      - clear TEMT together with THRE even in the non-FIFO case
      
      The last two items are bugfixes, but they were just found by inspection
      and do not squash known bugs.
      Reviewed-by: NDr. David Alan Gilbert <dgilbert@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0d931d70
  2. 15 12月, 2014 28 次提交