- 15 6月, 2016 3 次提交
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由 Radim Krčmář 提交于
I looked at a dozen Intel CPU that have this CPUID and all of them always had Core offset as 1 (a wasted bit when hyperthreading is disabled) and Package offset at least 4 (wasted bits at <= 4 cores). QEMU uses more compact IDs and it doesn't make much sense to change it now. I keep the SMT and Core sub-leaves even if there is just one thread/core; it makes the code simpler and there should be no harm. Signed-off-by: NRadim Krčmář <rkrcmar@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Igor Mammedov 提交于
Signed-off-by: NIgor Mammedov <imammedo@redhat.com> Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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由 Eduardo Habkost 提交于
Introduce Skylake-Client cpu mode which inherits the features from Broadwell and supports some additional features that are: MPX, XSAVEC, and XGETBV1. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NXiao Guangrong <guangrong.xiao@linux.intel.com> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NXiao Guangrong <guangrong.xiao@linux.intel.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com>
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- 14 6月, 2016 37 次提交
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由 Peter Maydell 提交于
Xen 2016/06/14 # gpg: Signature made Tue 14 Jun 2016 16:01:52 BST # gpg: using RSA key 0x894F8F4870E1AE90 # gpg: Good signature from "Stefano Stabellini <stefano.stabellini@eu.citrix.com>" # Primary key fingerprint: D04E 33AB A51F 67BA 07D3 0AEA 894F 8F48 70E1 AE90 * remotes/sstabellini/tags/xen-20160614-tag: xen: Clean up includes xen/blkif: avoid double access to any shared ring request fields Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
target-arm queue: * add PMU support for virt machine under KVM * fix reset and migration of TTBCR(S) * add virt-2.7 machine type * QOMify various ARM devices * implement xilinx DisplayPort device * don't permit ARMv8-only Neon insns to work on ARMv7 # gpg: Signature made Tue 14 Jun 2016 16:01:45 BST # gpg: using RSA key 0x3C2525ED14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" # gpg: aka "Peter Maydell <pmaydell@gmail.com>" # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20160614-2: (30 commits) target-arm: Don't permit ARMv8-only Neon insns on ARMv7 arm: xlnx-zynqmp: Add xlnx-dp and xlnx-dpdma introduce xlnx-dp introduce xlnx-dpdma hw/i2c-ddc.c: Implement DDC I2C slave introduce dpcd module introduce aux-bus i2c: Factor our send() and recv() common logic i2c: implement broadcast write i2cbus: remove unused dev field hw/sd: QOM'ify pl181.c hw/dma: QOM'ify pxa2xx_dma.c hw/misc: QOM'ify mst_fpga.c hw/misc: QOM'ify exynos4210_pmu.c hw/misc: QOM'ify arm_l2x0.c hw/gpio: QOM'ify zaurus.c hw/gpio: QOM'ify pl061.c hw/gpio: QOM'ify omap_gpio.c hw/i2c: QOM'ify versatile_i2c.c hw/i2c: QOM'ify omap_i2c.c ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The Neon instructions VCVTA, VCVTM, VCVTN, VCVTP, VRINTA, VRINTM, VRINTN, VRINTP, VRINTX, and VRINTZ were only introduced with ARMv8, so they need a guard to make them UNDEF if the CPU only supports ARMv7. (We got this right for all the other new-in-v8 insns, but forgot it for these Neon 2-reg-misc ops.) Reported-by: NChristophe Lyon <christophe.lyon@linaro.org> Tested-by: NChristophe Lyon <christophe.lyon@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1465492511-9333-1-git-send-email-peter.maydell@linaro.org
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由 KONRAD Frederic 提交于
This adds the DP and the DPDMA to the Zynq MP platform. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-10-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
This is the implementation of the DisplayPort. It has an aux-bus to access dpcd and edid. Graphic plane is connected to the channel 3. Video plane is connected to the channel 0. Audio stream are connected to the channels 4 and 5. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1465833014-21982-9-git-send-email-fred.konrad@greensocs.com [PMM: fixed format strings] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
This is the implementation of the DPDMA. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-8-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Implement an I2C slave which implements DDC and returns the EDID data for an attached monitor. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-by: NHyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Message-id: 1465833014-21982-7-git-send-email-fred.konrad@greensocs.com - Rebased on the current master. - Modified for QOM. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> [PMM: actually wire up the vmstate to dc->vmsd] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
This introduces dpcd module. It wires on a aux-bus and can be accessed by the driver to get lane-speed, etc. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-6-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
This introduces a new bus: aux-bus. It contains an address space for aux slaves devices and a bridge to an I2C bus for I2C through AUX transactions. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Message-id: 1465833014-21982-5-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Most of the control flow logic between send and recv (error checking etc) is the same. Factor this out into a common send_recv() API. This is then usable by clients, where the control logic for send and receive differs only by a boolean. E.g. if (send) i2c_send(...): else i2c_recv(...); becomes: i2c_send_recv(... , send); Signed-off-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Message-id: 1465833014-21982-4-git-send-email-fred.konrad@greensocs.com Changes from FK: * Rebased on master. * Rebased on my i2c broadcast patch. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
This does a write to every slaves when the I2C bus get a write to address 0. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-3-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 KONRAD Frederic 提交于
The dev field in i2cbus is not used. So just drop it. Signed-off-by: NKONRAD Frederic <fred.konrad@greensocs.com> Reviewed-by: NAlistair Francis <alistair.francis@xilinx.com> Reviewed-by: NPeter Crosthwaite <crosthwaite.peter@gmail.com> Tested-By: NHyun Kwon <hyun.kwon@xilinx.com> Message-id: 1465833014-21982-2-git-send-email-fred.konrad@greensocs.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
split the old SysBus init function into an instance_init and a Device realize function Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-13-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
split the old SysBus init function into an instance_init and a Device realize function Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-12-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-11-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-10-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-9-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-8-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
* Merge the pl061_initfn into pl061_init * Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-7-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
* Split the old SysBus init into an instance_init and DeviceClass::realize function * Drop the SysBus init function Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-6-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-5-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
* Split the omap_i2c_init into an instance_init and realize function * Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-4-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
* Rename the exynos4210_i2c_realize to exynos4210_i2c_init * Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-3-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 xiaoqiang zhao 提交于
Drop the old SysBus init function and use instance_init Signed-off-by: Nxiaoqiang zhao <zxq_yx_007@163.com> Message-id: 1465815255-21776-2-git-send-email-zxq_yx_007@163.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Jones 提交于
Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-5-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Jones 提交于
Create two variants of DEFINE_VIRT_MACHINE. One, just called DEFINE_VIRT_MACHINE, that does not set properties that only the latest machine type should have, and another that does. This will hopefully reduce potential for errors when adding new versions. Signed-off-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465746713-30414-4-git-send-email-drjones@redhat.com Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Jones 提交于
Use DEFINE_VIRT_MACHINE to generate versioned machine type info. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-3-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Andrew Jones 提交于
Rename machvirt_info (which is specifically for 2.6 TypeInfo) to machvirt_2_6_info, and separate the type registration of the abstract machine type from the versioned type. Signed-off-by: NAndrew Jones <drjones@redhat.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1465746713-30414-2-git-send-email-drjones@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Commit 6459b94c broke reset and migration of the AArch32 TTBCR(S) register if the guest used non-LPAE page tables. This is because the AArch32 TTBCR register definition is marked as ARM_CP_ALIAS, meaning that the AArch64 variant has to handle migration and reset. Although AArch64 TCR_EL3 doesn't need to care about the mask and base_mask fields, AArch32 may do so, and so we must use the special TTBCR reset and raw write functions to ensure they are set correctly. This doesn't affect TCR_EL2, because the AArch32 equivalent of that is HTCR, which never uses the non-LPAE page table variant. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reported-by: NPranith Kumar <bobby.prani+qemu@gmail.com> Reviewed-by: NSergey Fedorov <sergey.fedorov@linaro.org> Message-id: 1465488181-31977-1-git-send-email-peter.maydell@linaro.org
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由 Shannon Zhao 提交于
Add PMU IRQ number in ACPI table, then we can use PMU in guest through ACPI. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465267577-1808-4-git-send-email-zhaoshenglong@huawei.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Shannon Zhao 提交于
Add a virtual PMU device for virt machine while use PPI 7 for PMU overflow interrupt number. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465267577-1808-3-git-send-email-zhaoshenglong@huawei.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Shannon Zhao 提交于
Check if kvm supports guest PMUv3. If so, set the corresponding feature bit for vcpu. Signed-off-by: NShannon Zhao <shannon.zhao@linaro.org> Reviewed-by: NAndrew Jones <drjones@redhat.com> Message-id: 1465267577-1808-2-git-send-email-zhaoshenglong@huawei.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Clean up includes so that osdep.h is included first and headers which it implies are not included manually. This commit was created with scripts/clean-includes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NStefano Stabellini <sstabellini@kernel.org> Signed-off-by: NStefano Stabellini <sstabellini@kernel.org>
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由 Peter Maydell 提交于
If qdev_try_create() is passed NULL for the bus, it will automatically put the newly created device onto the default system bus. However if the device is not actually a SysBusDevice then this will result in later crashes (for instance when running the monitor "info qtree" command) because code reasonably assumes that all devices on the system bus are system bus devices. Generally the mistake is that the calling code should create the object with object_new(TYPE_FOO) rather than qdev_create(NULL, TYPE_FOO); see commit 6749695e for an example of fixing this bug. Assert in qdev_try_create() if the device isn't suitable to put on the system bus, so that this mistake results in failure earlier and more reliably. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NMarkus Armbruster <armbru@redhat.com>
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由 Peter Maydell 提交于
More s390x patches, this time mostly dealing with channel I/O: Bugfixes and cleanups, and dequeue pending interrupts after machine checks. # gpg: Signature made Tue 14 Jun 2016 13:09:43 BST # gpg: using RSA key 0xDECF6B93C6F02FAF # gpg: Good signature from "Cornelia Huck <huckc@linux.vnet.ibm.com>" # gpg: aka "Cornelia Huck <cornelia.huck@de.ibm.com>" # Primary key fingerprint: C3D0 D66D C362 4FF6 A8C0 18CE DECF 6B93 C6F0 2FAF * remotes/cohuck/tags/s390x-20160614: s390x/kvm: Fixup interrupt type for non-adapter I/O interrupts s390x: Limit s390-ccw machines to 248 CPUs virtio-ccw: Provide traces for indicator changes s390x/css: introduce property type for device ids s390x/css: clear IO irqs when generating IPI CRW s390x/kvm: add interface for clearing IO irqs linux-headers: update Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Christian Borntraeger 提交于
The current algorithm for I/O interrupts would result in a wrong interrupt type for subchannel numbers fffe and ffff. In addition a non adapter interrupt might look like an adapter interrupt for any subchannel number that has the 0x0400 bit set. No kernel has ever used the type outside logging - and the logging was wrong all the time. For everything else the kernel used the interrupt parameters. Let's use the KVM_S390_INT_IO macro as for adapter interrupts. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: NDavid Hildenbrand <dahi@linux.vnet.ibm.com> Acked-by: NCornelia Huck <cornelia.huck@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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由 Christian Borntraeger 提交于
The sclp scp read info call fills in a buffer with information about the system. With more than 248 CPUs we overflow the 4k buffer of the SCCB, leading to random data corruption. Basically ALL guest operating systems call scp read info, so let's limit the machines to 248 CPUs to make it obvious that >=249 does not work. As KVM also limits itself to 248 and TCG on s390 does not support SMP, this should cause no regression for any user as no VMs with more than 248 VCPUs were ever possible. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: NDavid Hildenbrand <dahi@linux.vnet.ibm.com> Reviewed-by: NBoris Fiuczynski <fiuczy@linux.vnet.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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