Remove the OpenBSD workaround for the curses probe. This has not been
necessary for 5 releases now.
Signed-off-by: NBrad Smith <brad@comstyle.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

libcacard is only used by system emulation.
Only define libcacard_libs/cflags once.
Signed-off-by: NPaul Brook <paul@codesourcery.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

QSLIST can be used for a free list, do it.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

The main advantage of circular lists (the fact that the head node
has the same memory layout as any other node) is completely negated
by the implementation in qemu-queue.h.  Not surprisingly, nobody
uses QCIRCLEQ.  While this might change if RCU is ever adopted by
QEMU, the QLIST is also RCU-friendly and in fact it is used in a
RCU-like manner by 9pfs already.  So, just kill QCIRCLEQ.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Based on http://cvsweb.netbsd.org/bsdweb.cgi/src/sys/sys/queue.h?rev=1.53
with only the prefix change.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

Notifiers do not need to access both ends of the list, and using
a QLIST also simplifies the API.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>

* bonzini/nbd-for-anthony:
  nbd: add git tree to MAINTAINERS
  open /dev/nbd in nbd_client_thread
  do not chdir(/) in qemu-nbd before opening all files

* pmaydell/arm-devs.for-upstream: (22 commits)
  hw/pl031: Actually raise interrupt on timer expiry
  MAINTAINERS: Add hw/highbank.c maintainer
  Remove unnecessary includes of primecell.h
  hw/primecell.h: Remove obsolete pl080_init() declaration
  hw/arm_sysctl: Drop legacy init function
  hw/vexpress.c: Add vexpress-a15 machine
  arm_boot: Pass base address of GIC CPU interface, not whole GIC
  hw/vexpress.c: Instantiate the motherboard CLCD
  hw/vexpress.c: Factor out daughterboard-specific initialization
  hw/vexpress.c: Move secondary CPU boot code to SRAM
  hw/vexpress.c: Make motherboard peripheral memory map table-driven
  hw/a15mpcore.c: Add Cortex-A15 private peripheral model
  MAINTAINERS: Add maintainers for Exynos SOC.
  Exynos4210: added display controller implementation
  hw/exynos4210.c: Add LAN support for SMDKC210.
  hw/lan9118: Add basic 16-bit mode support.
  ARM: exynos4210: MCT support.
  ARM: exynos4210: basic Power Management Unit implementation
  ARM: exynos4210: PWM support.
  ARM: exynos4210: UART support
  ...

* stefanha/trivial-patches:
  linux-user: brk() debugging
  virtio: Remove unneeded g_free() check in virtio_cleanup()
  net: remove extra spaces in help messages
  fmopl: Fix typo in function name
  vl.c: Fix typo in variable name
  ide: fix compilation errors when DEBUG_IDE is set
  cpu-exec.c: Correct comment about this file and indentation cleanup
  CODING_STYLE: Clarify style for enum and function type names
  linux-user: fail execve() if env/args too big

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

When qemu-nbd becomes a daemon it calls daemon(3) with
nochdir=0, so daemon(3) changes current directory to /.
But at this time, qemu-nbd did not open any user-specified
files yet, so by changing current directory, all non-absolute
paths becomes wrong.  The solution is to pass nochdir=1 to
daemon(3) function, and to chdir("/") after all init has
been performed, before entering the main loop, -- just like
a good daemon should do.

This patch is applicable for -stable.
Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>

Fix a typo in pl031_interrupt() which meant we were setting a bit
in the interrupt mask rather than the interrupt status register
and thus not actually raising an interrupt. This fix allows the
rtctest program from the kernel's Documentation/rtc.txt to pass
rather than hanging.
Reported-by: NDaniel Forsgren <daniel.forsgren@enea.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Acked-by: NAndreas Färber <afaerber@suse.de>

Signed-off-by: NMark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

The primecell.h header now only has the definitions of constants
indicating the usage of the arm_sysctl GPIO lines; remove obsolete
includes of it from source files which don't care about those GPIO
lines.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Remove an obsolete declaration of pl080_init(), which has been
incorrect since the conversion of pl080 to qdev back in 2009.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Drop the legacy init function arm_sysctl_init(), since it has no
users left any more. This allows us to drop the awkward '1' from
the actual device init function.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Acked-by: NAndreas Färber <afaerber@suse.de>

Add the vexpress-a15 machine, and the A-Series memory map it uses.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>

The arm_boot secondary boot loader code needs the address of
the GIC CPU interface. Obtaining this from the base address
of the private peripheral region was possible for A9 and 11MPcore,
but the A15 puts the GIC CPU interface in a different place.
So make boards pass in the GIC CPU interface address directly.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Instantiate the CLCD on the vexpress motherboard as well as one on
the daughterboard -- the A15 daughterboard does not have a CLCD
and so relies on the motherboard one.

At the moment QEMU doesn't provide infrastructure for selecting
which display device gets to actually show graphics -- the first
one registered is it. Fortunately this works for the major use
case (Linux): if the daughterboard has a CLCD it will come first
and be used, otherwise we fall back to the motherboard CLCD.
So we don't (currently) need to implement the control register
which allows software to tell the mux which video output to pass
through to the outside world.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>

Factor out daughterboard specifics into a data structure and
daughterboard initialization function, in preparation for adding
vexpress-a15 support.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

On real Versatile Express hardware, the boot ROM puts the secondary
CPU bootcode/holding pen in SRAM. We can therefore rely on Linux not
trashing this memory until secondary CPUs have booted up, and can
put our QEMU-specific pen code in the same place. This allows us to
drop the odd "hack" RAM page we were using before.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Pull the addresses used for mapping motherboard peripherals into
memory out into a table. This will allow us to simply provide a
second table to implement the "Cortex-A Series" memory map used by
the A15 variant of Versatile Express, as well as the current
"Legacy" map used by A9.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Reviewed-by: NAndreas Färber <afaerber@suse.de>

Add a model of the Cortex-A15 memory mapped private peripheral
space. This is fairly simple because the only memory mapped
bit of the A15 is the GIC.

Note that we don't currently model a VGIC and therefore don't
map the VGIC related bits of the GIC.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Acked-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and
chroma key blending functions.
Signed-off-by: NMitsyanko Igor <i.mitsyanko@samsung.com>
Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

SMDKC210 uses lan9215 chip, but lan9118 in 16-bit mode seems to
be enough.
Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Patch adds basic model for Exynos4210 SoC PMU.
This model implements PMU registers just as a bulk of memory. Currently,
the only reason this device exists is that secondary CPU boot loader
uses PMU INFORM5 register as a holding pen.
Signed-off-by: NMaksim Kozlov <m.kozlov@samsung.com>
Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Add basic support of exynos4210 UART
Signed-off-by: NMaksim Kozlov <m.kozlov@samsung.com>
Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Add initial support of NURI and SMDKC210 boards
Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Signed-off-by: NEvgeny Voevodin <e.voevodin@samsung.com>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>

Make the "machine" option list use list merging, so that multiple
-machine arguments (and the -enable-kvm argument) all merge together
into a single list. Drop the calls to qemu_opts_reset() which meant
that only the last -machine or -enable-kvm option had any effect.

This fixes the bug where "-enable-kvm -machine foo" would ignore
the '-enable-kvm' option, and "-machine foo -enable-kvm" would
ignore the '-machine foo' option.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

Add support for option lists which are merged together, so that
"-listname foo=bar -listname bar=baz" is equivalent to "-listname
foo=bar,bar=baz" rather than generating two separate lists of options.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

Since target-arm has some CPUState fields for which we take the approach
of baking assumptions about them into translated code and then calling
tb_flush() when the fields change, we must also tb_flush on CPU reset,
because reset is a change of those fields.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

The parameters initrd_size and base are already included
in the info parameter, so there is no need to pass them
separately.
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Signed-off-by: Andrzej Zaborowski <andrew.zaborowski@intel.com>,

Signed-off-by: NVasily Khoruzhick <anarsoul@gmail.com>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>

The correct FPSID for the Cortex-A9 (according to the TRM) is
0x41033090 for the r0p0 that we claim to model.
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>