- 27 7月, 2013 1 次提交
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由 Stefan Weil 提交于
The global variable env was removed some time ago, so this name may be used without any restriction now. Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 25 5月, 2013 1 次提交
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由 Paolo Bonzini 提交于
It is not used anywhere. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 19 12月, 2012 1 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 28 7月, 2012 1 次提交
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由 Jia Liu 提交于
Add OpenRISC target stubs, QOM cpu and basic machine. Signed-off-by: NJia Liu <proljc@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 15 3月, 2012 1 次提交
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由 Andreas Färber 提交于
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 21 7月, 2011 1 次提交
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由 Blue Swirl 提交于
Don't compile virtio.c in hwlib, it depends on memory accesses performed in CPU endianness. Make loads and stores in CPU endianness unavailable to devices and poison them to avoid further bugs. Acked-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 09 5月, 2011 5 次提交
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由 Richard Henderson 提交于
This interrupt name is used by i386, CRIS, and MicroBlaze. Copy the name into each target. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Richard Henderson 提交于
SMI, VIRQ, INIT, SIPI, and MCE are all only used by the i386 port. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Richard Henderson 提交于
This interrupt name was only used by the ARM port. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Richard Henderson 提交于
It is no longer used anywhere. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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由 Richard Henderson 提交于
These defines will be place-holders for cpu-specific functionality. Generic code will, at the end of the patch series, no longer have to concern itself about how SMI, NMI, etc should be handled. Instead, generic code will know only that the interrupt is internal or external. Signed-off-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 07 3月, 2011 1 次提交
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由 Michael Walle 提交于
This patch adds support for the LatticeMico32 softcore processor by Lattice Semiconductor. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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- 10 4月, 2010 1 次提交
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由 Paolo Bonzini 提交于
With more files from outside the hw/ directory being placed into libhw, avoid the need to include hw/hw.h for the sake of targ_phys_addr_t. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 21 5月, 2009 1 次提交
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由 Blue Swirl 提交于
Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 19 5月, 2009 1 次提交
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由 Paul Brook 提交于
The only target dependency for most hardware is sizeof(target_phys_addr_t). Build these files into a convenience library, and use that instead of building for every target. Remove and poison various target specific macros to avoid bogus target dependencies creeping back in. Big/Little endian is not handled because devices should not know or care about this to start with. Signed-off-by: NPaul Brook <paul@codesourcery.com>
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