- 27 3月, 2013 2 次提交
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由 Michael S. Tsirkin 提交于
Reuse common code in pcie_port, override the hardwired-to-0 bits per PCI Express spec. No functional change but makes the code easier to follow. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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由 Alex Williamson 提交于
Each PCI Bridge has a set of implied VGA regions that are enabled when the VGA bit is set in the bridge control register. This allows VGA devices behind bridges. Unfortunately with VGA Enable, which we formerly allowed but didn't back, comes along some required VGA baggage. VGA Palette Snooping is required, along with VGA 16-bit decoding. We don't yet have support for palette snooping. We also don't have support for 10-bit VGA aliases, the default mode, but we enable the register, even on root ports, to avoid confusing guests. Fortunately there's likely nothing from this century that requires these features, so the missing bits are noted with TODOs. Signed-off-by: NAlex Williamson <alex.williamson@redhat.com> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 17 12月, 2012 2 次提交
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由 Michael S. Tsirkin 提交于
Include dependencies from pci core using the correct path. This is required now that it's in the separate directory. Need to check whether they can be minimized, for now, keep the code as is. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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由 Michael S. Tsirkin 提交于
Move files and modify makefiles to pick them at the new location. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 16 3月, 2012 1 次提交
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由 Michael S. Tsirkin 提交于
Now that core sets memory type correctly, remove this code from pcie port implementation. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 21 8月, 2011 1 次提交
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由 Anthony Liguori 提交于
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 22 11月, 2010 1 次提交
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由 Isaku Yamahata 提交于
pci generic layer initialized wmask for bridge control register according to pci spec. pcie deviates slightly from it, so initialize it properly. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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- 20 10月, 2010 1 次提交
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由 Isaku Yamahata 提交于
define struct PCIEPort which represents common part of pci express port.(root, upstream and downstream.) add a helper function for pcie port which can be used commonly by root/upstream/downstream port. define struct PCIESlot which represents common part of pcie slot.(root and downstream.) and helper functions for it. helper functions for chassis, slot -> PCIESlot conversion. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
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