1. 07 2月, 2015 14 次提交
  2. 06 2月, 2015 24 次提交
  3. 05 2月, 2015 2 次提交
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20150205' into staging · cd07b193
      Peter Maydell 提交于
      target-arm queue:
       * refactor/clean up armv7m_init()
       * some initial cleanup in the direction of supporting 64-bit EL3
       * fix broken synchronization of registers between QEMU and KVM
         for 32-bit ARM hosts (which among other things broke memory
         access via gdbstub)
       * fix flush-to-zero handling in FMULX, FRECPS, FRSQRTS and FRECPE
       * don't crash QEMU for UNPREDICTABLE BFI insns in A32 encoding
       * explain why virt board's device-to-transport mapping code is
         the way it is
       * implement mmu_idx values which match the architectural
         distinctions, and introduce the concept of a translation
         regime to get_phys_addr() rather than incorrectly looking
         at the current CPU state
       * update to upstream VIXL 1.7 (gives us correct code addresses
         when dissassembling pc-relative references)
       * sync system register state between KVM and QEMU for 64-bit ARM
       * support virtio on big-endian guests by implementing the
         "which endian is the guest now?" CPU method
      
      # gpg: Signature made Thu 05 Feb 2015 14:02:16 GMT using RSA key ID 14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      
      * remotes/pmaydell/tags/pull-target-arm-20150205: (28 commits)
        target-arm: fix for exponent comparison in recpe_f64
        target-arm: Guest cpu endianness determination for virtio KVM ARM/ARM64
        target-arm: KVM64: Get and Sync up guest register state like kvm32.
        disas/arm-a64.cc: Tell libvixl correct code addresses
        disas/libvixl: Update to upstream VIXL 1.7
        target-arm: Fix brace style in reindented code
        target-arm: Reindent ancient page-table-walk code
        target-arm: Use mmu_idx in get_phys_addr()
        target-arm: Pass mmu_idx to get_phys_addr()
        target-arm: Split AArch64 cases out of ats_write()
        target-arm: Don't define any MMU_MODE*_SUFFIXes
        target-arm: Use correct mmu_idx for unprivileged loads and stores
        target-arm: Define correct mmu_idx values and pass them in TB flags
        target-arm/translate-a64: Fix wrong mmu_idx usage for LDT/STT
        target-arm: Make arm_current_el() return sensible values for M profile
        cpu_ldst.h: Allow NB_MMU_MODES to be 7
        hw/arm/virt: explain device-to-transport mapping in create_virtio_devices()
        target-arm: check that LSB <= MSB in BFI instruction
        target-arm: Squash input denormals in FRECPS and FRSQRTS
        Fix FMULX not squashing denormalized inputs when FZ is set.
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      cd07b193
    • I
      target-arm: fix for exponent comparison in recpe_f64 · fc1792e9
      Ildar Isaev 提交于
      f64 exponent in HELPER(recpe_f64) should be compared to 2045 rather than 1023
      (FPRecipEstimate in ARMV8 spec). This fixes incorrect underflow handling when
      flushing denormals to zero in the FRECPE instructions operating on 64-bit
      values.
      Signed-off-by: NIldar Isaev <ild@inbox.ru>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      fc1792e9