- 27 2月, 2014 15 次提交
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由 Peter Crosthwaite 提交于
These are helpful to anyone trying to debug event sequencing. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: e82a0ad804db3de4f46839e55a9d287735ef870d.1393372019.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
As per current QOM conventions. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: abb137347ea1ee9c31487b544f3d5435fb17f6a4.1393372019.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
Use PRI formats as appropriate rather than raw %x and %d. This fixes debug printfery on some host platforms. Fix types of debug only variables as appropriate. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: dbb5f5fd048b2d4a3cb5c6357577d11211a7a585.1393372019.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
This type really should just be a regular int as no usages rely on it's 32 bitness (it's only meaningful as a bit position and not a bit mask). This also fixes a printf which uses the variable with a regular %d. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 2a99d31f377aee371476d9da8fd0d1b7efa30f63.1393372019.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Crosthwaite 提交于
When using event synchronisation, this particular debug printf floods. Just delete it. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: dd94d19493f97c47497b9d8caf74ca43e70d58fd.1393372019.git.peter.crosthwaite@xilinx.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
To avoid complication in code that otherwise would not need to care about whether EL1 is AArch32 or AArch64, we should store the interrupt mask bits (CPSR.AIF in AArch32 and PSTATE.DAIF in AArch64) in one place consistently regardless of EL1's mode. Since AArch64 has an extra enable bit (D for debug exceptions) which isn't visible in AArch32, this means we need to keep the enables in env->pstate. (This is also consistent with the general approach we're taking that we handle 32 bit CPUs as being like AArch64/ARMv8 CPUs but which only run in 32 bit mode.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Implement the AArch64 TTBR* registers. For v7 these were already 64 bits to handle LPAE, but implemented as two separate uint32_t fields. Combine them into a single uint64_t which can be used for all purposes. Since this requires touching every use, take the opportunity to rename the field to the architectural name. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Christoffer Dall 提交于
Save and restore the ARM KVM VGIC state from the kernel. We rely on QEMU to marshal the GICState data structure and therefore simply synchronize the kernel state with the QEMU emulated state in both directions. We take some care on the restore path to check the VGIC has been configured with enough IRQs and CPU interfaces that we can properly restore the state, and for separate set/clear registers we first fully clear the registers and then set the required bits. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687921-26921-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Christoffer Dall 提交于
Support creating the ARM vgic device through the device control API and setting the base address for the distributor and cpu interfaces in KVM VMs using this API. Because the older KVM_CREATE_IRQCHIP interface needs the irq chip to be created prior to creating the VCPUs, we first test if we can use the device control API in kvm_arch_irqchip_create (using the test flag from the device control API). If we cannot, it means we have to fall back to KVM_CREATE_IRQCHIP and use the older ioctl at this point in time. If however, we can use the device control API, we don't do anything and wait until the arm_gic_kvm driver initializes and let that use the device control API. Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1392687720-26806-5-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Christoffer Dall 提交于
The GIC_SET_LEVEL macro unfortunately overwrote the entire level bitmask instead of just or'ing on the necessary bits, causing active level PPIs on a core to clear PPIs on other cores. Cc: qemu-stable@nongnu.org Reported-by: NRob Herring <rob.herring@linaro.org> Signed-off-by: NChristoffer Dall <christoffer.dall@linaro.org> Message-id: 1393031030-8692-1-git-send-email-christoffer.dall@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The ethernet device in the musicpal only has two tx queues, but we modelled it with four CTDP registers, presumably a cut and paste from the rx queue registers. Since the tx_queue[] array is only 2 entries long this allowed a guest to overrun this buffer. Remove the nonexistent registers. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1392737293-10073-1-git-send-email-peter.maydell@linaro.org Acked-by: NJan Kiszka <jan.kiszka@web.de> Cc: qemu-stable@nongnu.org
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由 Peter Maydell 提交于
The Exynos4210 combiner has IIC_NIRQ inputs and IIC_NGRP outputs; use the correct constant in the loop initializing our output sysbus IRQs so that we don't overrun the output_irq[] array. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1392659611-8439-1-git-send-email-peter.maydell@linaro.org Reviewed-by: NAndreas Färber <afaerber@suse.de> Cc: qemu-stable@nongnu.org
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由 Peter Maydell 提交于
The integrator's timer read/write functions log an error for bad addresses in guest accesses, but were falling through and using an out of bounds array index rather than returning early. Fix this. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-4-git-send-email-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org
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由 Peter Maydell 提交于
Add a cast to avoid an unintended sign extension that would mean we returned 0xffffffff in the high 32 bits for an IA0 read if bit 31 in the MAC address was 1. (This is harmless since we'll only be doing 4 byte reads, but it could be confusing, so best avoided.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-3-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Fix incorrect use of sizeof() rather than ARRAY_SIZE() to guard accesses into the mb_clock[] array, which was allowing a malicious guest to overwrite the end of the array. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Message-id: 1392647854-8067-2-git-send-email-peter.maydell@linaro.org Cc: qemu-stable@nongnu.org
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- 26 2月, 2014 8 次提交
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由 Peter Crosthwaite 提交于
This is now obsolete - remove the header and all its inclusions. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Inline the only usage of each of xilinx_axiethernet_init and xilinx_axidma_init. Converts this init to at least a semi-recent QOM styling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Inline the only usage. Converts this init to at least a semi-recent QOM styling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Inline these usages. Converts these init to at least a semi-recent QOM styling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Inline these usages. Converts these init to at least a semi-recent QOM styling. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Define (missing) macros for the interrupt and memory maps for the sake of self documentation. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Define macros for the interrupt and memory maps for the sake of self documentation. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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由 Peter Crosthwaite 提交于
Define macros for the interrupt map for the sake of self documentation. Signed-off-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
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- 24 2月, 2014 3 次提交
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NLaszlo Ersek <lersek@redhat.com>
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由 Max Filippov 提交于
The following registers control whether MAC can receive frames: - MODER.RXEN bit that enables/disables receiver; - TX_BD_NUM register that specifies number of RX descriptors. Notify QEMU networking core when the MAC is ready to receive frames. Discard frame and raise BUSY interrupt when the frame arrives but the current RX descriptor is not empty. Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Max Filippov 提交于
Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com> Reviewed-by: NAndreas Färber <afaerber@suse.de>
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- 22 2月, 2014 2 次提交
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由 Max Reitz 提交于
Allow bdrv_open() to handle references to existing block devices just as bdrv_file_open() is already capable of. Signed-off-by: NMax Reitz <mreitz@redhat.com> Signed-off-by: NKevin Wolf <kwolf@redhat.com>
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由 Max Reitz 提交于
Make bdrv_open() take a pointer to a BDS pointer, similarly to bdrv_file_open(). If a pointer to a NULL pointer is given, bdrv_open() will create a new BDS with an empty name; if the BDS pointer is not NULL, that existing BDS will be reused (in the same way as bdrv_open() already did). Signed-off-by: NMax Reitz <mreitz@redhat.com> Reviewed-by: NKevin Wolf <kwolf@redhat.com> Signed-off-by: NKevin Wolf <kwolf@redhat.com>
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- 21 2月, 2014 2 次提交
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由 Olaf Hering 提交于
bdrv_acct_done was called unconditional. But in case the ioreq has no segments there is no matching bdrv_acct_start call. This could lead to bogus accounting values. Found by code inspection. Signed-off-by: NOlaf Hering <olaf@aepfle.de> Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com>
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由 Stefano Stabellini 提交于
Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Acked-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 20 2月, 2014 2 次提交
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由 Peter Maydell 提交于
All cpreg read and write functions now return 0, so we can clean up their prototypes: * write functions return void * read functions return the value rather than taking a pointer to write the value to This is a fairly mechanical change which makes only the bare minimum set of changes to the callers of read and write functions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Commit 40d22500 accidentally changed the behaviour of gic_acknowledge_irq() for the NVIC. The NVIC doesn't have SGIs, so this meant we hit an assertion: gic_acknowledge_irq: Assertion `s->sgi_pending[irq][cpu] != 0' failed. Return NVIC acknowledge-irq to its previous behaviour, like 11MPCore. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NChristoffer Dall <christoffer.dall@linaro.org>
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- 18 2月, 2014 8 次提交
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由 Gerd Hoffmann 提交于
So we don't spam stderr with (guest-triggerable) messages by default. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Allow the scheduled transfer time be a bit behind, to compensate for latencies. Without this xhci will wait way to often for the mfindex wraparound, assuming the scheduled time is in the future just because qemu is a bit behind in processing the iso transfer requests. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Frameid specifies frames not microframes, so we need to shift it to get the microframe index. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Found by Coverity. Reported-by: NMarkus Armbruster <armbru@redhat.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Pantelis Koukousoulas 提交于
Replace magic constants in device bmAttributes with symbolic ones from Linux kernel ch9.h Signed-off-by: NPantelis Koukousoulas <pktoss@gmail.com> Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
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由 Markus Armbruster 提交于
error_is_set(&var) is the same as var != NULL, but it takes whole-program analysis to figure that out. Unnecessarily hard for optimizers, static checkers, and human readers. Dumb it down to obvious. Gets rid of several dozen Coverity false positives. Note that the obvious form is already used in many places. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NLuiz Capitulino <lcapitulino@redhat.com>
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