- 29 7月, 2013 24 次提交
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由 Marcel Apfelbaum 提交于
Made small tweaks in code to prevent compilation issues when importing qemu/bitmap.h in qdev-core Signed-off-by: NMarcel Apfelbaum <marcel.a@redhat.com> Message-id: 1375107465-25767-2-git-send-email-marcel.a@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alexey Kardashevskiy 提交于
The driver calculates SOLNT bit from UCSOLNT and SCSOLNT bits from the request. The iu pointer has a type of srp_iu* which points to a union, so cmd and rsp overlap. As the vscsi_send_rsp function calls memset(iu, 0, sizeof(rsp)), it clears first 36 bytes of both cmd and rsp so cmd.sol_not is always zero at the moment of calculating rsp.sol_not. This fixes the bug. Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1375073319-17488-1-git-send-email-aik@ozlabs.ru Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
Basically, in HW the layout of the interrupt network is: - One ICP per processor thread (the "presenter"). This contains the registers to fetch a pending interrupt (ack), EOI, and control the processor priority. - One ICS per logical source of interrupts (ie, one per PCI host bridge, and a few others here or there). This contains the per-interrupt source configuration (target processor(s), priority, mask) and the per-interrupt internal state. Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit oddball what pHyp does here, arguably there are two but we can ignore that distinction). There is no register level access. A pair of firmware (RTAS) calls is used to configure each virtual interrupt. So our model here is somewhat the same. We have one ICS in the emulated XICS which arguably *is* the emulated XICS, there's no point making it a separate "device", that would just be gross, and each VCPU has an associated ICP. Yet we call the "XICS" struct icp_state and then the ICPs 'struct icp_server_state'. It's particularly confusing when all of the functions have xics_prefixes yet take *icp arguments. Rename: struct icp_state -> XICSState struct icp_server_state -> ICPState struct ics_state -> ICSState struct ics_irq_state -> ICSIRQState Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com [aik: added ics_resend() on post_load] Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alexey Kardashevskiy 提交于
At present, the savevm / migration support for the pseries machine will not work when KVM is enabled. That's because KVM manages the guest's hash page table in the host kernel, so qemu has no visibility of it. This patch fixes this by using new kernel interfaces to extract and reinsert the guest's hash table during the migration process. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-id: 1374175984-8930-11-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This adds the necessary support for saving the state of the PAPR virtual PCI host bridge (or host bridges). Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-10-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This adds the necessary pieces to implement savevm / migration for the pseries machine. The most complex part here is migrating the hash table - for the paravirtualized pseries machine the guest's hash page table is not stored within guest memory, but externally and the guest accesses it via hypercalls. This patch uses a hypervisor reserved bit of the HPTE as a dirty bit (tracking changes to the HPTE itself, not the page it references). This is used to implement a live migration style incremental save and restore of the hash table contents. Normally a hash table is 16MB but it can get bigger depending on how much RAM the guest has. Due to its nature, updates to it are random so the live migration style is used for it. In addition it adds VMStateDescription information to save and restore the (few) remaining pieces of state information needed by the pseries machine. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-9-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This patch adds the necessary support for saving the state of the PAPR VIO virtual SCSI device. This also saves and restores active SCSI requests. [aik: implemented vscsi_req save/restore] Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-8-git-send-email-aliguori@us.ibm.com Cc: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Alexey Kardashevskiy 提交于
The patch reimplements handling of indirect requests in order to simplify upcoming live migration support. - all pointers (except SCSIRequest*) were replaces with integer indexes and offsets; - DMA'ed srp_direct_buf kept untouched (ie. BE format); - vscsi_fetch_desc() is added, now it is the only place where descriptors are fetched and byteswapped; - vscsi_req struct fields converted to migration-friendly types; - many dprintf()'s fixed. This also removed an unused field 'lun' from the spapr_vscsi device which is assigned, but never used. So, remove it. [David Gibson: removed unused 'lun'] Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-7-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Anthony Liguori 提交于
Model TCE tables as a device that's hooked up as a child object to the owner. Besides the code cleanup, we get a few nice benefits: 1) free actually works now (it was dead code before) 2) the TCE information is visible in the device tree 3) we can expose table information as properties such that if we change the window_size, we can use globals to keep migration working. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com> Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Message-id: 1374175984-8930-6-git-send-email-aliguori@us.ibm.com [dwg: pseries: savevm support for PAPR TCE tables] Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru> [alexey: ppc kvm: fix to compile] Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This patch adds the necessary VMStateDescription information to support savevm/loadvm for the spapr_tty (PAPR logical serial) device. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-5-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This patch adds the necessary VMStateDescription information to support savevm/loadvm for the spapr_llan (PAPR logical lan) device. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-4-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 David Gibson 提交于
This patch adds helpers to allow PAPR VIO devices to save state common to all VIO devices during savevm. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374175984-8930-3-git-send-email-aliguori@us.ibm.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paul Durrant 提交于
Introduces a new Xen PV PCI device which will act as a binding point for PV drivers for Xen. The device has parameterized vendor-id, device-id and revision to allow to be configured as a binding point for any vendor's PV drivers. Signed-off-by: NPaul Durrant <paul.durrant@citrix.com> Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Reviewed-by: NAndreas Färber <afaerber@suse.de>
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由 Stefano Stabellini 提交于
Support backend option "direct-io-safe". This is documented as follows in the Xen backend specification: * direct-io-safe * Values: 0/1 (boolean) * Default Value: 0 * * The underlying storage is not affected by the direct IO memory * lifetime bug. See: * http://lists.xen.org/archives/html/xen-devel/2012-12/msg01154.html * * Therefore this option gives the backend permission to use * O_DIRECT, notwithstanding that bug. * * That is, if this option is enabled, use of O_DIRECT is safe, * in circumstances where we would normally have avoided it as a * workaround for that bug. This option is not relevant for all * backends, and even not necessarily supported for those for * which it is relevant. A backend which knows that it is not * affected by the bug can ignore this option. * * This option doesn't require a backend to use O_DIRECT, so it * should not be used to try to control the caching behaviour. Also, BDRV_O_NATIVE_AIO is ignored if BDRV_O_NOCACHE, so clarify the default flags passed to the qemu block layer. The original proposal for a "cache" backend option has been dropped because it was believed too wide, especially considering that at the moment the backend doesn't have a way to tell the toolstack that it is capable of supporting it. Signed-off-by: NStefano Stabellini <stefano.stabellini@eu.citrix.com> Signed-off-by: NIan Jackson <Ian.Jackson@eu.citrix.com>
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由 Christian Borntraeger 提交于
The latest ipl code adaptions collided with some of the virtio refactoring rework. This resulted in always booting the first disk. Let's fix booting from a given ID. The new code also checks for command lines without bootindex to avoid random behaviour when accessing dev_st (==0). Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Aurelien Jarno 提交于
Copy the whole 0x1fe000000 region into 0x1fc00000, independently of the loaded BIOS size. This fix the MIPS make check tests. Reported-by: NAndreas Färber <afaerber@suse.de> Tested-by: NAndreas Färber <afaerber@suse.de> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Leon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 James Hogan 提交于
The Linux kernel can be configured to use 64KB pages, but it also requires initrd to be page aligned. Therefore, to be safe, align the initrd to 64KB using a new INITRD_PAGE_MASK rather than TARGET_PAGE_MASK. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
The firmware commonly used with MIPS Malta boards (YAMON) reads the status of the pflash with a 32bit memory access. On real hardware this results in the status byte being mirrored in the upper 16 bits of the read value. For example if the status byte is represented by SS then the hardware reads 0x00SS00SS. The YAMON firmware compares the status against 32bit values expecting the mirrored value and fails without it. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
The malta contains 2 EEPROMs, one containing SPD data for the SDRAM and another containing board information such as serial number and MAC address. These are both exposed via the PIIX4 SMBUS. Generating this data and providing it to smbus_eeprom_init will allow YAMON to read a serial number for the board and prevent it from warning that the EEPROM data is invalid. We already have the contents of the SPD EEPROM which are exposed via FPGA I2C accesses, this is provided as part of the SMBUS EEPROM data too for consistency. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
This preserves the final sector of the pflash which is used by YAMON to hold environment variables. If the endianness of the environment data is swapped then YAMON will fail to load environment variables from pflash. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
The SPD EEPROM specifies the amount of memory present in the system and thus its correct contents can only be known at runtime. Calculating parts of the data on init allows the data to accurately reflect the amount of target memory present and allow YAMON to boot with an arbitrary amount of SDRAM. Where possible the SPD data will favor indicating 2 banks of SDRAM rather than 1. For example the default 128MB of target memory will be represented as 2x64MB banks rather than 1x128MB bank. This allows versions of MIPS BIOS code (such as YAMON 2.22 and older) to boot despite a bug preventing them from handling a single bank of SDRAM with the Galileo GT64120 system controller emulated by QEMU. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
Rather than modifying the BIOS code at its original location, copy it for the 0x1fc00000 region & modify the copy. This means the original ROM code is correctly readable at 0x1e000010 whilst the MIPS revision is readable at 0x1fc00010. Additionally the code previously operated on target memory which would later be overwritten by the BIOS image upon CPU reset if the -bios argument was used to specify the BIOS image. This led to the written MIPS revision being lost. Copying using rom_copy when -bios is used fixes this issue. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Paul Burton 提交于
If the target is little endian (mipsel) then the BIOS image endianness is swapped so that the big endian BIOS binaries commonly produced can be loaded correctly. When using the -bios argument the BIOS is loaded using load_image_targphys, however this doesn't perform the load to target memory immediately. Instead it loads the BIOS file into a struct Rom which will later be written to target memory upon reset. However the endianness conversion was being performed before this, on init, and operating on the target memory which at this point is blank & will later be overwritten by the (big endian) BIOS image. Correct this by operating on the data referenced by struct Rom rather than the target memory when the -bios argument is used. Signed-off-by: NPaul Burton <paul.burton@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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- 27 7月, 2013 6 次提交
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由 Stefan Weil 提交于
The macro g_assert_not_reached is a better self documenting replacement for assert(0) or assert(false). Signed-off-by: NStefan Weil <sw@weilnetz.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
All these typos were found by codespell. sould -> should emperical -> empirical intialization -> initialization successfuly -> successfully gaurantee -> guarantee Fix also another error (before before) in the same context. Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
Fix a number of warnings for 32 bit builds (tested on MingW and Linux): CC hw/ide/macio.o qemu/hw/ide/macio.c: In function 'pmac_ide_atapi_transfer_cb': qemu/hw/ide/macio.c:134:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] qemu/hw/ide/macio.c: In function 'pmac_ide_transfer_cb': qemu/hw/ide/macio.c:215:5: error: format '%ld' expects argument of type 'long int', but argument 5 has type 'int64_t' [-Werror=format] qemu/hw/ide/macio.c:222:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] qemu/hw/ide/macio.c:264:9: error: format '%lx' expects argument of type 'long unsigned int', but argument 3 has type 'hwaddr' [-Werror=format] cc1: all warnings being treated as errors make: *** [hw/ide/macio.o] Error 1 Signed-off-by: NStefan Weil <sw@weilnetz.de> Acked-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
This was dead code. Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Stefan Weil 提交于
The leak was reported by cppcheck. Function proxy_init also calls g_free for ctx->fs_root. Avoid reuse of this memory by setting ctx->fs_root to NULL. Signed-off-by: NStefan Weil <sw@weilnetz.de> Reviewed-by: NM. Mohan Kumar <mohan@in.ibm.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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由 Mark Cave-Ayland 提交于
Currently the graphics resolution for TCX is fixed at 1024x768, however other framebuffers are capable of supporting additional resolutions. Signed-off-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> CC: Anthony Liguori <aliguori@us.ibm.com> CC: Blue Swirl <blauwirbel@gmail.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 25 7月, 2013 10 次提交
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由 Paolo Bonzini 提交于
The ports at 0xe8..0xeb have impl.min/max_access_size == 1, so that memory accesses are split and combined by the memory core. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-29-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
... by making apb a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-21-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
... by making sh_pci a subclass of TYPE_PCI_HOST_BRIDGE. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-20-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
No free MIPS BIOS is available, so it makes little sense to quit. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-19-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
So far the device was only used on little-endian machines. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-18-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This will let us use the testdev to test endianness. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-17-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
It is not used anymore. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-15-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This is untested, because ebus does not have a libqos module. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-14-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This fixes endianness bugs in I/O port access. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-13-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Paolo Bonzini 提交于
This board is little-endian, but still isa_mmio should die. :) Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com> Message-id: 1374501278-31549-12-git-send-email-pbonzini@redhat.com Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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