1. 22 12月, 2012 1 次提交
  2. 19 12月, 2012 5 次提交
  3. 16 12月, 2012 1 次提交
  4. 15 12月, 2012 1 次提交
    • M
      target-xtensa: fix ITLB/DTLB page protection flags · 659f807c
      Max Filippov 提交于
      With MMU option xtensa architecture has two TLBs: ITLB and DTLB. ITLB is
      only used for code access, DTLB is only for data. However TLB entries in
      both TLBs have attribute field controlling write and exec access. These
      bits need to be properly masked off depending on TLB type before being
      used as tlb_set_page prot argument. Otherwise the following happens:
      
      (1) ITLB entry for some PFN gets invalidated
      (2) DTLB entry for the same PFN gets updated, attributes allow code
          execution
      (3) code at the page with that PFN is executed (possible due to step 2),
          entry for the TB is written into the jump cache
      (4) QEMU TLB entry for the PFN gets replaced with an entry for some
          other PFN
      (5) code in the TB from step 3 is executed (possible due to jump cache)
          and it accesses data, for which there's no DTLB entry, causing DTLB
          miss exception
      (6) re-translation of the TB from step 5 is attempted, but there's no
          QEMU TLB entry nor xtensa ITLB entry for that PFN, which causes ITLB
          miss exception at the TB start address
      (7) ITLB miss exception is handled by the guest, but execution is
          resumed from the beginning of the faulting TB (the point where ITLB
          miss occured), not from the point where DTLB miss occured, which is
          wrong.
      
      With that fix the above scenario causes ITLB miss exception (that used
      to be step 7) at step 3, right at the beginning of the TB.
      Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      Cc: qemu-stable@nongnu.org
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      659f807c
  5. 09 12月, 2012 6 次提交
  6. 08 12月, 2012 3 次提交
  7. 17 11月, 2012 2 次提交
  8. 10 11月, 2012 1 次提交
  9. 31 10月, 2012 1 次提交
  10. 28 10月, 2012 1 次提交
  11. 23 10月, 2012 1 次提交
    • A
      Rename target_phys_addr_t to hwaddr · a8170e5e
      Avi Kivity 提交于
      target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are
      reserved) and its purpose doesn't match the name (most target_phys_addr_t
      addresses are not target specific).  Replace it with a finger-friendly,
      standards conformant hwaddr.
      
      Outstanding patchsets can be fixed up with the command
      
        git rebase -i --exec 'find -name "*.[ch]"
                              | xargs s/target_phys_addr_t/hwaddr/g' origin
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      a8170e5e
  12. 06 10月, 2012 1 次提交
  13. 28 9月, 2012 1 次提交
  14. 23 9月, 2012 7 次提交
  15. 21 9月, 2012 2 次提交
  16. 08 9月, 2012 1 次提交
    • M
      target-xtensa: fix missing errno codes for mingw32 · c29b1bee
      Max Filippov 提交于
      Put the following errno value mappings under #ifdef:
      
      xtensa-semi.c: In function 'errno_h2g':
      xtensa-semi.c:113: error: 'ENOTBLK' undeclared (first use in this function)
      xtensa-semi.c:113: error: (Each undeclared identifier is reported only once
      xtensa-semi.c:113: error: for each function it appears in.)
      xtensa-semi.c:113: error: array index in initializer not of integer type
      xtensa-semi.c:113: error: (near initialization for 'guest_errno')
      xtensa-semi.c:124: error: 'ETXTBSY' undeclared (first use in this function)
      xtensa-semi.c:124: error: array index in initializer not of integer type
      xtensa-semi.c:124: error: (near initialization for 'guest_errno')
      xtensa-semi.c:134: error: 'ELOOP' undeclared (first use in this function)
      xtensa-semi.c:134: error: array index in initializer not of integer type
      xtensa-semi.c:134: error: (near initialization for 'guest_errno')
      Signed-off-by: NMax Filippov <jcmvbkbc@gmail.com>
      Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
      c29b1bee
  17. 06 9月, 2012 1 次提交
  18. 01 9月, 2012 1 次提交
  19. 10 8月, 2012 1 次提交
  20. 28 7月, 2012 1 次提交
  21. 25 6月, 2012 1 次提交