- 15 2月, 2019 25 次提交
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由 Alex Bennée 提交于
Userspace programs should (in theory) query the ELF HWCAP before probing these registers. Now we have implemented them all make it public. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20190205190224.2198-6-alex.bennee@linaro.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
There are a whole bunch more registers in the CPUID space which are currently not used but are exposed as RAZ. To avoid too much duplication we expand ARMCPRegUserSpaceInfo to understand glob patterns so we only need one entry to tweak whole ranges of registers. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 20190205190224.2198-5-alex.bennee@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
As this is a single register we could expose it with a simple ifdef but we use the existing modify_arm_cp_regs mechanism for consistency. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 20190205190224.2198-4-alex.bennee@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
A number of CPUID registers are exposed to userspace by modern Linux kernels thanks to the "ARM64 CPU Feature Registers" ABI. For QEMU's user-mode emulation we don't need to emulate the kernels trap but just return the value the trap would have done. To avoid too much #ifdef hackery we process ARMCPRegInfo with a new helper (modify_arm_cp_regs) before defining the registers. The modify routine is driven by a simple data structure which describes which bits are exported and which are fixed. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 20190205190224.2198-3-alex.bennee@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Alex Bennée 提交于
Although technically not visible to userspace the kernel does make them visible via a trap and emulate ABI. We provide a new permission mask (PL0U_R) which maps to PL0_R for CONFIG_USER builds and adjust the minimum permission check accordingly. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 20190205190224.2198-2-alex.bennee@linaro.org Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Catherine Ho 提交于
The lo,hi order is different from the comments. And in commit 1ec182c3 ("target/arm: Convert to HAVE_CMPXCHG128"), it changes the original code logic. So just restore the old code logic before this commit: do_paired_cmpxchg64_be(): cmpv = int128_make128(env->exclusive_high, env->exclusive_val); newv = int128_make128(new_hi, new_lo); This fixes a bug that would only be visible for big-endian AArch64 guest code. Fixes: 1ec182c3 ("target/arm: Convert to HAVE_CMPXCHG128") Signed-off-by: NCatherine Ho <catherine.hecx@gmail.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 1548985244-24523-1-git-send-email-catherine.hecx@gmail.com [PMM: added note that bug only affects BE guests] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
HACR_EL2 is a register with IMPDEF behaviour, which allows implementation specific trapping to EL2. Implement it as RAZ/WI, since QEMU's implementation has no extra traps. This also matches what h/w implementations like Cortex-A53 and A57 do. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Message-id: 20190205181218.8995-1-peter.maydell@linaro.org
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由 Aaron Lindsay OS 提交于
This bug was introduced in: commit 5ecdd3e4 target/arm: Finish implementation of PM[X]EVCNTR and PM[X]EVTYPER Signed-off-by: NAaron Lindsay <aaron@os.amperecomputing.com> Reported-by: NLaurent Desnogues <laurent.desnogues@gmail.com> Reviewed-by: NLaurent Desnogues <laurent.desnogues@gmail.com> Message-id: 20190205135129.19338-1-aaron@os.amperecomputing.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
MIPS queue for February 14th, 2019 # gpg: Signature made Thu 14 Feb 2019 16:48:39 GMT # gpg: using RSA key D4972A8967F75A65 # gpg: Good signature from "Aleksandar Markovic <amarkovic@wavecomp.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8526 FBF1 5DA3 811F 4A01 DD75 D497 2A89 67F7 5A65 * remotes/amarkovic/tags/mips-queue-feb-14-2019: tests/tcg: target/mips: Add tests for MSA logic instructions tests/tcg: target/mips: Add wrappers for MSA logic instructions tests/tcg: target/mips: Add tests for MSA interleave instructions tests/tcg: target/mips: Add wrappers for MSA interleave instructions tests/tcg: target/mips: Add tests for MSA bit counting instructions tests/tcg: target/mips: Add wrappers for MSA bit counting instructions tests/tcg: target/mips: Add a header with test utilities tests/tcg: target/mips: Add a header with test inputs tests/tcg: target/mips: Remove an unnecessary file target/mips: introduce MTTCG-enabled builds hw/mips_cpc: kick a VP when putting it into Run statewq target/mips: hold BQL in mips_vpe_wake() hw/mips_int: hold BQL for all interrupt requests target/mips: reimplement SC instruction emulation and use cmpxchg target/mips: compare virtual addresses in LL/SC sequence Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
- some configure updates (HAX/NetBSD, remove "wav", -Waddress-of-packed-member) - remove deprecated options - some trace and error cleanup - typo fixes # gpg: Signature made Thu 14 Feb 2019 10:46:50 GMT # gpg: using RSA key F30C38BD3F2FBE3C # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C * remotes/vivier2/tags/trivial-branch-pull-request: configure: improve usbfs check hw/sparc64: Explicitly set default_display = "std" hw/dma/i8257: Use qemu_log_mask(UNIMP) instead of fprintf wavcapture: Convert to error_report kvm: Add kvm_set_ioeventfd* traces HMP: Prepend errors with 'Error:' pckbd: Convert DPRINTF->trace configure: Make -Waddress-of-packed-member warnings be errors configure: Add HAX support in NetBSD configure: fix qemu-img name configure: remove handling of "wav" audio driver qemu-options: Remove deprecated option -clock qemu-deprecated: Remove -virtioconsole and -no-frame for good qapi: Fix qcow2 encryption doc typo Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Aleksandar Markovic 提交于
Add tests for MSA logic instructions. This includes following instructions: * AND.V - logical AND * NOR.V - logical NOR * OR.V - logical OR * XOR.V - logical XOR Each test consists of 80 test cases, so altogether there are 320 test cases. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add wrappers for MSA logic instructions. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add tests for MSA interleave instructions. This includes following instructions: * ILVEV.B - interleave even (bytes) * ILVEV.H - interleave even (halfwords) * ILVEV.W - interleave even (words) * ILVEV.D - interleave even (doublewords) * ILVOD.B - interleave odd (bytes) * ILVOD.H - interleave odd (halfwords) * ILVOD.W - interleave odd (words) * ILVOD.D - interleave odd (doublewords) * ILVL.B - interleave left (bytes) * ILVL.H - interleave left (halfwords) * ILVL.W - interleave left (words) * ILVL.D - interleave left (doublewords) * ILVR.B - interleave right (bytes) * ILVR.H - interleave right (halfwords) * ILVR.W - interleave right (words) * ILVR.D - interleave right (doublewords) Each test consists of 80 test cases, so altogether there are 1280 test cases. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add wrappers for MSA interleave instructions. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add tests for MSA bit counting instructions. This includes following instructions: * NLOC.B - number of leading ones (bytes) * NLOC.H - number of leading ones (halfwords) * NLOC.W - number of leading ones (words) * NLOC.D - number of leading ones (doublewords) * NLZC.B - number of leading zeros (bytes) * NLZC.H - number of leading zeros (halfwords) * NLZC.W - number of leading zeros (words) * NLZC.D - number of leading zeros (doublewords) * PCNT.B - population count / number of ones (bytes) * PCNT.H - population count / number of ones (halfwords) * PCNT.W - population count / number of ones (words) * PCNT.D - population count / number of ones (doublewords) Each test consists of 80 test cases, so altogether there are 960 test cases. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add a header that contains wrappers around MSA instructions assembler invocations. For now, only bit counting instructions (NLOC, NLZC, and PCNT; each in four data format flavors) are supported. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Add a header that contains test utilities. For now, it contains only a function for checking and printing test results for bit counting and similar MSA instructions. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
The file tests/tcg/mips/include/test_inputs.h is planned to contain various test inputs. For now, it contains 64 128-bit pattern inputs (alternating groups od ones and zeroes) and 16 128-bit random inputs. Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Remove a file that was added long time ago by mistake. The commit that introduced this file was commit d70080c4 (from 2012). Reviewed-by: NAleksandar Rikalo <arikalo@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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由 Aleksandar Markovic 提交于
Introduce MTTCG-enabled QEMU builds for mips32, mipsn32, and mips64. Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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由 Miodrag Dinic 提交于
While testing mttcg VP0 could get stuck in a loop waiting for other VPs to come up (which never actually happens). To fix this, kick VPs while they are being powered up by Cluster Power Controller in an async task which is triggered once the host thread is being spawned. Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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由 Goran Ferenc 提交于
Hold BQL whenever mips_vpe_wake() is invoked. Without this patch, MIPS MT with MTTCG enabled triggers an abort in tcg_handle_interrupt() due to an unlocked access to cpu_interrupt(). This patch makes sure that the BQL is held in this case. Signed-off-by: NGoran Ferenc <goran.ferenc@imgtec.com> Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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由 Aleksandar Markovic 提交于
Make sure BQL is held for all interrupt requests. For MTTCG-enabled configurations, handling soft and hard interrupts between vCPUs must be properly locked. By acquiring BQL, make sure all paths triggering an IRQ are synchronized. Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
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由 Leon Alrae 提交于
Completely rewrite conditional stores handling. Use cmpxchg. This eliminates need for separate implementations of SC instruction emulation for user and system emulation. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Tested-by: NEmilio G. Cota <cota@braap.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Leon Alrae 提交于
Do only virtual addresses comaprisons in LL/SC sequence emulations. Until this patch, physical addresses had been compared in SC part of LL/SC sequence, even though such comparisons could be avoided. Getting rid of them allows throwing away SC helpers and having common SC implementations in user and system mode, avoiding the need for two separate implementations selected by #ifdef CONFIG_USER_ONLY. Correct guest software should not rely on LL/SC if they accesses the same physical address via different virtual addresses or if page mapping gets changed between LL/SC due to manipulating TLB entries. MIPS Instruction Set Manual clearly says that an RMW sequence must use the same address in the LL and SC (virtual address, physical address, cacheability and coherency attributes must be identical). Otherwise, the result of the SC is not predictable. This patch takes advantage of this fact and removes the virtual->physical address translation from SC helper. lladdr served as Coprocessor 0 LLAddr register which captures physical address of the most recent LL instruction, and also lladdr was used for comparison with following SC physical address. This patch changes the meaning of lladdr - now it will only keep the virtual address of the most recent LL. Additionally, CP0_LLAddr field is introduced which is the actual Coperocessor 0 LLAddr register that guest can access. Signed-off-by: NLeon Alrae <leon.alrae@imgtec.com> Signed-off-by: NMiodrag Dinic <miodrag.dinic@imgtec.com> Signed-off-by: NAleksandar Markovic <amarkovic@wavecomp.com> Acked-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NAleksandar Markovic <amarkovic@wavecomp.com>
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- 14 2月, 2019 15 次提交
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由 Peter Maydell 提交于
Pull request Fix a virtio-blk migration regression. # gpg: Signature made Thu 14 Feb 2019 04:32:55 GMT # gpg: using RSA key 9CA4ABB381AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [full] # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" [full] # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/block-pull-request: virtio-blk: set correct config size for the host driver Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Fix slirp on windows Marc-André Lureau (2): slirp: remove slirp_ prefix for socket wrappers slirp: wrap the remaining socket functions # gpg: Signature made Wed 13 Feb 2019 18:31:21 GMT # gpg: using RSA key E61DBB15D4172BDEC97E92D9DB550E89F0FA54F3 # gpg: Good signature from "Samuel Thibault <samuel.thibault@aquilenet.fr>" [unknown] # gpg: aka "Samuel Thibault <sthibault@debian.org>" [marginal] # gpg: aka "Samuel Thibault <samuel.thibault@gnu.org>" [unknown] # gpg: aka "Samuel Thibault <samuel.thibault@inria.fr>" [marginal] # gpg: aka "Samuel Thibault <samuel.thibault@labri.fr>" [marginal] # gpg: aka "Samuel Thibault <samuel.thibault@ens-lyon.org>" [marginal] # gpg: aka "Samuel Thibault <samuel.thibault@u-bordeaux.fr>" [unknown] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: 900C B024 B679 31D4 0F82 304B D017 8C76 7D06 9EE6 # Subkey fingerprint: E61D BB15 D417 2BDE C97E 92D9 DB55 0E89 F0FA 54F3 * remotes/thibault/tags/samuel-thibault: slirp: wrap the remaining socket functions slirp: remove slirp_ prefix for socket wrappers Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Chardev fixes # gpg: Signature made Wed 13 Feb 2019 16:18:36 GMT # gpg: using RSA key DAE8E10975969CE5 # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5 * remotes/elmarco/tags/chardev-pull-request: (25 commits) char-pty: remove write_lock usage char-pty: remove the check for connection on write chardev: add a note about frontend sources and context switch terminal3270: do not use backend timer sources char: update the mux handlers in class callback chardev/wctablet: Fix a typo char: allow specifying a GMainContext at opening time chardev: ensure termios is fully initialized tests: expand coverage of socket chardev test chardev: fix race with client connections in tcp_chr_wait_connected chardev: disallow TLS/telnet/websocket with tcp_chr_wait_connected chardev: honour the reconnect setting in tcp_chr_wait_connected chardev: use a state machine for socket connection state chardev: split up qmp_chardev_open_socket connection code chardev: split tcp_chr_wait_connected into two methods chardev: remove unused 'sioc' variable & cleanup paths chardev: ensure qemu_chr_parse_compat reports missing driver error chardev: remove many local variables in qemu_chr_parse_socket chardev: forbid 'wait' option with client sockets chardev: forbid 'reconnect' option with server sockets ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
RISC-V Patches for the 4.0 Soft Freeze, Part 1 This patch set contains a handful of patches I've collected over the last few weeks. There's nothing really fundamental, but I thought it would be good to send these out now as there are some other patch sets on the mailing list that are getting ready to go. As far as the actual patches, there's: * A set that cleans up our FS dirty-mode handling. * Support for writing MISA. * The removal of Michael as a maintainer. * A fix to {m,s}counteren handling. * A fix to make sure the kernel's start address is computed correctly on 32-bit targets. This makes my "RISC-V Patches for 3.2, Part 3" pull request defunct, as it contains the same patches but based on a newer master. As usual, I've tested this using a Fedora boot on the latest Linux. This patch set does not include Bastian's decodetree patches because there were some merge conflicts and while I've cleaned them up I want to get a round of review first. # gpg: Signature made Wed 13 Feb 2019 15:37:50 GMT # gpg: using RSA key 00CE76D1834960DFCE886DF8EF4CA1502CCBAB41 # gpg: issuer "palmer@dabbelt.com" # gpg: Good signature from "Palmer Dabbelt <palmer@dabbelt.com>" [unknown] # gpg: aka "Palmer Dabbelt <palmer@sifive.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 00CE 76D1 8349 60DF CE88 6DF8 EF4C A150 2CCB AB41 * remotes/palmer/tags/riscv-for-master-4.0-sf1: riscv: Ensure the kernel start address is correctly cast target/riscv: fix counter-enable checks in ctr() MAINTAINERS: Remove Michael Clark as a RISC-V Maintainer RISC-V: Add misa runtime write support RISC-V: Add misa.MAFD checks to translate RISC-V: Add misa to DisasContext RISC-V: Add priv_ver to DisasContext RISC-V: Use riscv prefix consistently on cpu helpers RISC-V: Implement mstatus.TSR/TW/TVM RISC-V: Mark mstatus.fs dirty RISC-V: Split out mstatus_fs from tb_flags Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Thomas Petazzoni 提交于
The current check to test if usbfs support should be compiled or not solely relies on the presence of <linux/usbdevice_fs.h>, without actually checking that all definition used by Qemu are provided by this header file. With sufficiently old kernel headers, <linux/usbdevice_fs.h> may be present, but some of the definitions needed by Qemu may not be available. This commit improves the check by building a small program that actually tests whether the necessary definitions are available. In addition, it fixes a bug where have_usbfs was set to "yes" regardless of the result of the test. Signed-off-by: NThomas Petazzoni <thomas.petazzoni@bootlin.com> Reviewed-by: NThomas Huth <thuth@redhat.com> Message-Id: <20190213211827.20300-1-thomas.petazzoni@bootlin.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Thomas Huth 提交于
The sun4uv_init() function expects vga_interface_type to be either VGA_STD or VGA_NONE and sets up a stdvga device or no vga card accordingly. However, the code in vl.c prefers the Cirrus VGA card to stdvga if it is available and the user and the machine did not specify anything else. So far this has not been a problem, since the Cirrus VGA was not linked into the sparc64 target. But with the upcoming Kconfig build system, all theoretically possible PCI cards will be enabled by default, so the Cirrus VGA card might become available on the sparc64 target, too. vl.c then picks the wrong card, causing sun4uv_init() to abort. Thus let's make it explicit that we always want stdvga for sparc64 and so set default_display = "std" for these machines. Signed-off-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: NMark Cave-Ayland <mark.cave-ayland@ilande.co.uk> Message-Id: <1550041639-10232-1-git-send-email-thuth@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Philippe Mathieu-Daudé 提交于
Avoid to clutter stdout until explicitly requested (with -d unimp): $ qemu-system-mips64el -M fulong2e -bios pmon_2e.bin dma: command df not supported dma: command df not supported dma: command df not supported dma: command df not supported Signed-off-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NStefano Garzarella <sgarzare@redhat.com> Message-Id: <20190212145322.30974-1-philmd@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Dr. David Alan Gilbert 提交于
Kill off a pile of monitor_printf's and cur_mon usage. The only one left in wavcapture.c is the info case. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NGerd Hoffmann <kraxel@gmail.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Message-Id: <20170320173840.3626-3-dgilbert@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Dr. David Alan Gilbert 提交于
Add a couple of traces around the kvm_set_ioeventfd* calls. Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: NCornelia Huck <cohuck@redhat.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Message-Id: <20190212134758.10514-4-dgilbert@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Dr. David Alan Gilbert 提交于
Always make error messages start with 'Error:' as a fallback to make sure that anything parsing them can tell it failed. Note: Some places don't use hmp_handle_error Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Message-Id: <20190212134758.10514-3-dgilbert@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Dr. David Alan Gilbert 提交于
Signed-off-by: NDr. David Alan Gilbert <dgilbert@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: NStefan Hajnoczi <stefanha@redhat.com> Reviewed-by: NMichael S. Tsirkin <mst@redhat.com> Message-Id: <20181016112232.23241-1-dgilbert@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Peter Maydell 提交于
We have now managed to eradicate all the places in the codebase that triggered clang's -Waddress-of-packed-member warning. Remove the compiler flag that exempted it from our usual -Werror policy. This will prevent any new problematic code being added in future. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NThomas Huth <thuth@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190208132112.31493-1-peter.maydell@linaro.org> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Peter Maydell 提交于
Convert to decodetree. Fix signed overflow conditions. Fix dcor. Add CPU MIE to PCI address space. # gpg: Signature made Tue 12 Feb 2019 21:26:07 GMT # gpg: using RSA key 64DF38E8AF7E215F # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F * remotes/rth/tags/pull-hppa-20190212: (24 commits) hw/hppa: forward requests to CPU HPA target/hppa: fix dcor instruction target/hppa: Fix addition '</<=' conditions target/hppa: Rearrange log conditions target/hppa: move GETPC to HELPER() functions target/hppa: Merge translate_one into hppa_tr_translate_insn target/hppa: Convert fp operate insns target/hppa: Convert fp fused multiply-add insns target/hppa: Convert halt/reset insns target/hppa: Convert fp indexed memory insns target/hppa: Convert offset memory insns target/hppa: Convert arithmetic immediate insns target/hppa: Convert direct and indirect branches target/hppa: Convert shift, extract, deposit insns target/hppa: Convert conditional branches target/hppa: Convert fp multiply-add target/hppa: Convert indexed memory insns target/hppa: Convert arithmetic/logical insns target/hppa: Convert memory management insns target/hppa: Unify specializations of OR ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Kamil Rytarowski 提交于
The NetBSD support in Intel HAXM has beem merged upstream and is functional. Signed-off-by: NKamil Rytarowski <n54@gmx.com> Message-Id: <20190207233704.29978-1-n54@gmx.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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由 Cleber Rosa 提交于
Signed-off-by: NCleber Rosa <crosa@redhat.com> Reviewed-by: NLaurent Vivier <laurent@vivier.eu> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Message-Id: <20190207193605.25676-3-crosa@redhat.com> Signed-off-by: NLaurent Vivier <laurent@vivier.eu>
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