1. 09 1月, 2014 5 次提交
    • P
      softfloat: Only raise Invalid when conversions to int are out of range · 34e1c27b
      Peter Maydell 提交于
      We implement a number of float-to-integer conversions using conversion
      to an integer type with a wider range and then a check against the
      narrower range we are actually converting to. If we find the result to
      be out of range we correctly raise the Invalid exception, but we must
      also suppress other exceptions which might have been raised by the
      conversion function we called.
      
      This won't throw away exceptions we should have preserved, because for
      the 'core' exception flags the IEEE spec mandates that the only valid
      combinations of exception that can be raised by a single operation are
      Inexact + Overflow and Inexact + Underflow. For the non-IEEE softfloat
      flag for input denormals, we can guarantee that that flag won't have
      been set for out of range float-to-int conversions because a squashed
      denormal by definition goes to plus or minus zero, which is always in
      range after conversion to integer zero.
      
      This bug has been fixed for some of the float-to-int conversion routines
      by previous patches; fix it for the remaining functions as well, so
      that they all restore the pre-conversion status flags prior to raising
      Invalid.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      34e1c27b
    • T
      softfloat: Fix float64_to_uint64 · fb3ea83a
      Tom Musta 提交于
      The comment preceding the float64_to_uint64 routine suggests that
      the implementation is broken.  And this is, indeed, the case.
      
      This patch properly implements the conversion of a 64-bit floating
      point number to an unsigned, 64 bit integer.
      
      This contribution can be licensed under either the softfloat-2a or -2b
      license.
      Signed-off-by: NTom Musta <tommusta@gmail.com>
      Reviewed-by: NPeter Maydell <peter.maydell@linaro.org>
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      fb3ea83a
    • P
      softfloat: Make the int-to-float functions take exact-width types · c4850f9e
      Peter Maydell 提交于
      Currently the int-to-float functions take types which are specified
      as "at least X bits wide", rather than "exactly X bits wide". This is
      confusing and unhelpful since it means that the callers have to include
      an explicit cast to [u]intXX_t to ensure the correct behaviour. Fix
      them all to take the exactly-X-bits-wide types instead.
      
      Note that this doesn't change behaviour at all since at the moment
      we happen to define the 'int32' and 'uint32' types as exactly 32 bits
      wide, and the 'int64' and 'uint64' types as exactly 64 bits wide.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      c4850f9e
    • W
      softfloat: Add float to 16bit integer conversions. · f581bf54
      Will Newton 提交于
      ARMv8 requires support for converting 32 and 64bit floating point
      values to signed and unsigned 16bit integers.
      Signed-off-by: NWill Newton <will.newton@linaro.org>
      [PMM: updated not to incorrectly set Inexact for Invalid inputs]
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      f581bf54
    • P
      softfloat: Fix exception flag handling for float32_to_float16() · 38970efa
      Peter Maydell 提交于
      Our float32 to float16 conversion routine was generating the correct
      numerical answers, but not always setting the right set of exception
      flags. Fix this, mostly by rearranging the code to more closely
      resemble RoundAndPackFloat*, and in particular:
       * non-IEEE halfprec always raises Invalid for input NaNs
       * we need to check for the overflow case before underflow
       * we weren't getting the tininess-detected-after-rounding
         case correct (somewhat academic since only ARM uses halfprec
         and it is always tininess-detected-before-rounding)
       * non-IEEE halfprec overflow raises only Invalid, not
         Invalid + Inexact
       * we weren't setting Inexact when we should
      
      Also add some clarifying comments about what the code is doing.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NRichard Henderson <rth@twiddle.net>
      38970efa
  2. 10 12月, 2013 2 次提交
  3. 15 4月, 2013 1 次提交
    • P
      fpu: Correct edgecase in float64_muladd · e3d142d0
      Peter Maydell 提交于
      In handling float64_muladd, if we end up doing a subtraction of the
      product and c, and the 128 bit result of this subtraction happens to
      have its most significant bit in bit 63, we weren't handling this
      correctly when attempting to normalize to put the most significant
      bit into bit 126.  We would end up doing a right shift by a negative
      number (undefined behaviour in C) so at best we would return an
      incorrect result to the guest.  MSB in bit 63 has to be handled as a
      special case separately from MSB in 0..62 and MSB in 63..126.  (MSB
      in 127 is not possible.)
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Reviewed-by: NAurelien Jarno <aurelien@aurel32.net>
      Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
      e3d142d0
  4. 26 1月, 2013 1 次提交
  5. 05 1月, 2013 2 次提交
  6. 19 12月, 2012 1 次提交
  7. 02 10月, 2012 2 次提交
  8. 28 4月, 2012 3 次提交
  9. 21 4月, 2012 1 次提交
  10. 07 4月, 2012 2 次提交
  11. 20 10月, 2011 1 次提交
  12. 01 10月, 2011 1 次提交
  13. 04 9月, 2011 2 次提交
  14. 03 6月, 2011 1 次提交
  15. 24 5月, 2011 1 次提交
  16. 25 4月, 2011 2 次提交
  17. 18 4月, 2011 5 次提交
  18. 03 4月, 2011 1 次提交
  19. 22 3月, 2011 2 次提交
  20. 11 2月, 2011 4 次提交
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