1. 08 9月, 2014 5 次提交
    • G
      spapr_pci: map the MSI window in each PHB · 8c46f7ec
      Greg Kurz 提交于
      On sPAPR, virtio devices are connected to the PCI bus and use MSI-X.
      Commit cc943c36 has modified MSI-X
      so that writes are made using the bus master address space and follow
      the IOMMU path.
      
      Unfortunately, the IOMMU address space address space does not have an
      MSI window: the notification is silently dropped in unassigned_mem_write
      instead of reaching the guest... The most visible effect is that all
      virtio devices are non-functional on sPAPR since then. :(
      
      This patch does the following:
      1) map the MSI window into the IOMMU address space for each PHB
         - since each PHB instantiates its own IOMMU address space, we
           can safely map the window at a fixed address (SPAPR_PCI_MSI_WINDOW)
         - no real need to keep the MSI window setup in a separate function,
           the spapr_pci_msi_init() code moves to spapr_phb_realize().
      
      2) kill the global MSI window as it is not needed in the end
      Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      8c46f7ec
    • B
      spapr: Locate RTAS and device-tree based on real RMA · b7d1f77a
      Benjamin Herrenschmidt 提交于
      We currently calculate the final RTAS and FDT location based on
      the early estimate of the RMA size, cropped to 256M on KVM since
      we only know the real RMA size at reset time which happens much
      later in the boot process.
      
      This means the FDT and RTAS end up right below 256M while they
      could be much higher, using precious RMA space and limiting
      what the OS bootloader can put there which has proved to be
      a problem with some OSes (such as when using very large initrd's)
      
      Fortunately, we do the actual copy of the device-tree into guest
      memory much later, during reset, late enough to be able to do it
      using the final RMA value, we just need to move the calculation
      to the right place.
      
      However, RTAS is still loaded too early, so we change the code to
      load the tiny blob into qemu memory early on, and then copy it into
      guest memory at reset time. It's small enough that the memory usage
      doesn't matter.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      [aik: fixed errors from checkpatch.pl, defined RTAS_MAX_ADDR]
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      [agraf: fix compilation on 32bit hosts]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b7d1f77a
    • B
      loader: Add load_image_size() to replace load_image() · ea87616d
      Benjamin Herrenschmidt 提交于
      A subsequent patch to ppc/spapr needs to load the RTAS blob into
      qemu memory rather than target memory (so it can later be copied
      into the right spot at machine reset time).
      
      I would use load_image() but it is marked deprecated because it
      doesn't take a buffer size as argument, so let's add load_image_size()
      that does.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      [aik: fixed errors from checkpatch.pl]
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      ea87616d
    • A
      PPC: mac99: Move NVRAM to page boundary when necessary · 261265cc
      Alexander Graf 提交于
      When running KVM we have to adhere to host page boundaries for memory slots.
      Unfortunately the NVRAM on mac99 is a 4k RAM hole inside of an MMIO flash
      area.
      
      So if our host is configured with 64k page size, we can't use the mac99 target
      with KVM. This is a real shame, as this limitation is not really an issue - we
      can easily map NVRAM somewhere else and at least Linux and Mac OS X use it
      at their new location.
      
      So in that emergency case when it's about failing to run at all and moving NVRAM
      to a place it shouldn't be at, choose the latter.
      
      This patch enables -M mac99 with KVM on 64k page size hosts.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      261265cc
    • N
      ppc: spapr-rtas - implement os-term rtas call · 2e14072f
      Nikunj A Dadhania 提交于
      PAPR compliant guest calls this in absence of kdump. This finally
      reaches the guest and can be handled according to the policies set by
      higher level tools(like taking dump) for further analysis by tools like
      crash.
      
      Linux kernel calls ibm,os-term when extended property of os-term is set.
      This makes sure that a return to the linux kernel is gauranteed.
      Signed-off-by: NNikunj A Dadhania <nikunj@linux.vnet.ibm.com>
      [agraf: reduce RTAS_TOKEN_MAX]
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      2e14072f
  2. 01 9月, 2014 2 次提交
  3. 29 8月, 2014 5 次提交
  4. 26 8月, 2014 2 次提交
  5. 25 8月, 2014 4 次提交
  6. 20 8月, 2014 2 次提交
  7. 19 8月, 2014 1 次提交
  8. 18 8月, 2014 1 次提交
  9. 15 8月, 2014 1 次提交
  10. 14 8月, 2014 4 次提交
  11. 09 8月, 2014 2 次提交
  12. 01 8月, 2014 1 次提交
  13. 29 7月, 2014 3 次提交
    • P
      scsi-block, scsi-generic: implement parse_cdb · 3e7e180a
      Paolo Bonzini 提交于
      The callback lets the bus provide the direction and transfer count
      for passthrough commands, enabling passthrough of vendor-specific
      commands.
      Reviewed-by: NFam Zheng <famz@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      3e7e180a
    • P
      scsi-bus: introduce parse_cdb in SCSIDeviceClass and SCSIBusInfo · ff34c32c
      Paolo Bonzini 提交于
      These callbacks will let devices do their own request parsing, or
      defer it to the bus.  If the bus does not provide an implementation,
      in turn, fall back to the default parsing routine.
      
      Swap the first two arguments to scsi_req_parse, and rename it to
      scsi_req_parse_cdb, for consistency.
      Reviewed-by: NFam Zheng <famz@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      ff34c32c
    • P
      pc: hack for migration compatibility from QEMU 2.0 · 07fb6176
      Paolo Bonzini 提交于
      Changing the ACPI table size causes migration to break, and the memory
      hotplug work opened our eyes on how horribly we were breaking things in
      2.0 already.
      
      The ACPI table size is rounded to the next 4k, which one would think
      gives some headroom.  In practice this is not the case, because the user
      can control the ACPI table size (each CPU adds 97 bytes to the SSDT and
      8 to the MADT) and so some "-smp" values will break the 4k boundary and
      fail to migrate.  Similarly, PCI bridges add ~1870 bytes to the SSDT.
      
      This patch concerns itself with fixing migration from QEMU 2.0.  It
      computes the payload size of QEMU 2.0 and always uses that one.
      The previous patch shrunk the ACPI tables enough that the QEMU 2.0 size
      should always be enough; non-AML tables can change depending on the
      configuration (especially MADT, SRAT, HPET) but they remain the same
      between QEMU 2.0 and 2.1, so we only compute our padding based on the
      sizes of the SSDT and DSDT.
      
      Migration from QEMU 1.7 should work for guests that have a number of CPUs
      other than 12, 13, 14, 54, 55, 56, 97, 98, 139, 140.  It was already
      broken from QEMU 1.7 to QEMU 2.0 in the same way, though.
      
      Even with this patch, QEMU 1.7 and 2.0 have two different ideas of
      "-M pc-i440fx-2.0" when there are PCI bridges.  Igor sent a patch to
      adopt the QEMU 1.7 definition.  I think distributions should apply
      it if they move directly from QEMU 1.7 to 2.1+ without ever packaging
      version 2.0.
      Reviewed-by: NLaszlo Ersek <lersek@redhat.com>
      Tested-by: NIgor Mammedov <imammedo@redhat.com>
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      07fb6176
  14. 14 7月, 2014 3 次提交
  15. 07 7月, 2014 1 次提交
  16. 06 7月, 2014 1 次提交
  17. 01 7月, 2014 2 次提交