- 04 7月, 2013 1 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 09 4月, 2013 2 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Many of these should be cleaned up with proper qdev-/QOM-ification. Right now there are many catch-all headers in include/hw/ARCH depending on cpu.h, and this makes it necessary to compile these files per-target. However, fixing this does not belong in these patches. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 01 3月, 2013 1 次提交
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由 Paolo Bonzini 提交于
Done with this script: cd hw for i in `find . -name '*.h' | sed 's/^..//'`; do echo '\,^#.*include.*["<]'$i'[">], s,'$i',hw/&,' done | sed -i -f - `find . -type f` This is so that paths remain valid as files are moved. Instead, files in hw/dataplane are referenced with the relative path. We know they are not going to move to include/, and they are the only include files that are in subdirectories _and_ move. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 19 12月, 2012 1 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 23 10月, 2012 1 次提交
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由 Avi Kivity 提交于
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes are reserved) and its purpose doesn't match the name (most target_phys_addr_t addresses are not target specific). Replace it with a finger-friendly, standards conformant hwaddr. Outstanding patchsets can be fixed up with the command git rebase -i --exec 'find -name "*.[ch]" | xargs s/target_phys_addr_t/hwaddr/g' origin Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 04 1月, 2012 1 次提交
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由 Peter Maydell 提交于
When configuring the prefetch engine (and also when resetting from a state where the prefetch engine was enabled) be careful to adhere to the "unmap/change config fields/map" ordering, to avoid trying to delete the wrong MemoryRegions. This fixes an assertion failure in some cases. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reported-by: NAlexander Graf <agraf@suse.de> Tested-by: NAlexander Graf <agraf@suse.de>
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- 10 11月, 2011 1 次提交
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由 Peter Maydell 提交于
Add missing 'break' statements which would have meant that writing to an 8 bit NAND device was broken. Spotted by Coverity (see bug 887883). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 23 9月, 2011 2 次提交
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由 Peter Maydell 提交于
Writing to IRQSTATUS should affect irqst, not irqen -- error spotted by Andrzej Zaborowski. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>
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由 Peter Maydell 提交于
Promote the remark about why we handle FIFOTHRESHOLDSTATUS the way we do from the commit message of de8af7fe to a comment in the code. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NAndrzej Zaborowski <andrew.zaborowski@intel.com>
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- 29 8月, 2011 13 次提交
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由 Peter Maydell 提交于
This commit implements the prefetch engine feature of the GPMC which can be used for NAND devices. This includes both interrupt driven and DMA-filling modes. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Refactor the gpmc state structure so items relating to the prefetch engine are in their own sub-struct and have more useful names. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Juha Riihimäki 提交于
OMAP3630 adds an extra bit of address masking, so a mask of 0xb1111 is valid. Unfortunately the GPMC_REVISION is the same as on the OMAP3430 which only has three bits of address masking, so we have to derive this feature directly from the OMAP revision rather than from the GPMC revision. Signed-off-by: NJuha Riihimäki <juha.riihimaki@nokia.com> [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: NRiku Voipio <riku.voipio@iki.fi> [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Support accesses to NAND devices, both by mapping them into the GPMC address space, and via the NAND_COMMAND, NAND_ADDRESS and NAND_DATA GPMC registers. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Whitespace-only change fixing indentation. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Juha Riihimäki 提交于
Signed-off-by: NJuha Riihimäki <juha.riihimaki@nokia.com> [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: NRiku Voipio <riku.voipio@iki.fi> [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Juha Riihimäki 提交于
Take a pointer to the omap mpu state struct in omap_gpmc_init. Some details of GPMC behaviour depend on the OMAP version we are a part of. Signed-off-by: NJuha Riihimäki <juha.riihimaki@nokia.com> [Riku Voipio: Fixes and restructuring patchset] Signed-off-by: NRiku Voipio <riku.voipio@iki.fi> [Peter Maydell: More fixes and cleanups for upstream submission] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The OMAP3 TRM is inconsistent about whether the GPMC FIFOTHRESHOLDSTATUS bit should be set when FIFOPOINTER > FIFOTHRESHOLD or when it is >= FIFOTHRESHOLD. Apparently the underlying functional spec from which the TRM was created states that the behaviour is ">=", and this also makes more conceptual sense. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
The omap_gpmc wasn't actually wiring up its IRQ, so anything that provoked an interrupt would be using uninitialised data for its IRQ number. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Fix a bug in the handling of writes to GPMC_IRQSTATUS: it behaves as "write one to clear, writing zero is ignored". Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Refactor the omap_gpmc_cs_map/unmap functions: * take the omap_gpmc_s* and a chipselect id rather than the omap_gpmc_cs_file_s*, so they have access to the general gpmc member fields * extract the base and mask from the config registers in the functions rather than at every callsite * check for CSVALID in the functions rather than at every callsite Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Now that all callers of omap_gpmc_attach pass in a MemoryRegion*, we can remove the base_update and unmap function pointer arguments, and the opaque pointer that was passed into these callbacks. We can also remove the base and size fields from omap_gpmc_cs_file_s as these are no longer necessary (you don't need the base/size to unmap a MemoryRegion the way you did to undo a mapping made with cpu_register_physical_memory()). Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 24 8月, 2011 1 次提交
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由 Peter Maydell 提交于
Remove a spurious second map of the OMAP GPMC CS0 region on reset. This fixes an assertion failure when we try to add the region to its container when it was already added. (The old code did not complain about mismatched map/unmap calls, but the new MemoryRegion implementation does.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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- 22 8月, 2011 1 次提交
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由 Avi Kivity 提交于
Somewhat clumsy since it needs a variable sized region. Signed-off-by: NAvi Kivity <avi@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 21 8月, 2011 1 次提交
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由 Anthony Liguori 提交于
qemu_malloc/qemu_free no longer exist after this commit. Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 11 12月, 2010 1 次提交
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由 Alexander Graf 提交于
As stated before, devices can be little, big or native endian. The target endianness is not of their concern, so we need to push things down a level. This patch adds a parameter to cpu_register_io_memory that allows a device to choose its endianness. For now, all devices simply choose native endian, because that's the same behavior as before. Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 01 7月, 2010 1 次提交
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由 cmchao 提交于
Signed-off-by: Ncmchao <cmchao@gmail.com> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
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