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  1. 01 7月, 2016 1 次提交
  2. 27 6月, 2016 1 次提交
  3. 17 6月, 2016 1 次提交
  4. 23 3月, 2016 2 次提交
    • P
      hw: explicitly include qemu-common.h and cpu.h · 4771d756
      Paolo Bonzini 提交于
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      4771d756
    • M
      include/qemu/osdep.h: Don't include qapi/error.h · da34e65c
      Markus Armbruster 提交于
      Commit 57cb38b3 included qapi/error.h into qemu/osdep.h to get the
      Error typedef.  Since then, we've moved to include qemu/osdep.h
      everywhere.  Its file comment explains: "To avoid getting into
      possible circular include dependencies, this file should not include
      any other QEMU headers, with the exceptions of config-host.h,
      compiler.h, os-posix.h and os-win32.h, all of which are doing a
      similar job to this file and are under similar constraints."
      qapi/error.h doesn't do a similar job, and it doesn't adhere to
      similar constraints: it includes qapi-types.h.  That's in excess of
      100KiB of crap most .c files don't actually need.
      
      Add the typedef to qemu/typedefs.h, and include that instead of
      qapi/error.h.  Include qapi/error.h in .c files that need it and don't
      get it now.  Include qapi-types.h in qom/object.h for uint16List.
      
      Update scripts/clean-includes accordingly.  Update it further to match
      reality: replace config.h by config-target.h, add sysemu/os-posix.h,
      sysemu/os-win32.h.  Update the list of includes in the qemu/osdep.h
      comment quoted above similarly.
      
      This reduces the number of objects depending on qapi/error.h from "all
      of them" to less than a third.  Unfortunately, the number depending on
      qapi-types.h shrinks only a little.  More work is needed for that one.
      Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
      [Fix compilation without the spice devel packages. - Paolo]
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      da34e65c
  5. 28 2月, 2016 1 次提交
    • G
      xics: report errors with the QEMU Error API · a005b3ef
      Greg Kurz 提交于
      Using the return value to report errors is error prone:
      - xics_alloc() returns -1 on error but spapr_vio_busdev_realize() errors
        on 0
      - xics_alloc_block() returns the unclear value of ics->offset - 1 on error
        but both rtas_ibm_change_msi() and spapr_phb_realize() error on 0
      
      This patch adds an errp argument to xics_alloc() and xics_alloc_block() to
      report errors. The return value of these functions is a valid IRQ number
      if errp is NULL. It is undefined otherwise.
      
      The corresponding error traces get promotted to error messages. Note that
      the "can't allocate IRQ" error message in spapr_vio_busdev_realize() also
      moves to xics_alloc(). Similar error message consolidation isn't really
      applicable to xics_alloc_block() because callers have extra context (device
      config address, MSI or MSIX).
      
      This fixes the issues mentioned above.
      
      Based on previous work from Brian W. Hart.
      Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      a005b3ef
  6. 09 2月, 2016 2 次提交
    • E
      qom: Swap 'name' next to visitor in ObjectPropertyAccessor · d7bce999
      Eric Blake 提交于
      Similar to the previous patch, it's nice to have all functions
      in the tree that involve a visitor and a name for conversion to
      or from QAPI to consistently stick the 'name' parameter next
      to the Visitor parameter.
      
      Done by manually changing include/qom/object.h and qom/object.c,
      then running this Coccinelle script and touching up the fallout
      (Coccinelle insisted on adding some trailing whitespace).
      
          @ rule1 @
          identifier fn;
          typedef Object, Visitor, Error;
          identifier obj, v, opaque, name, errp;
          @@
           void fn
          - (Object *obj, Visitor *v, void *opaque, const char *name,
          + (Object *obj, Visitor *v, const char *name, void *opaque,
             Error **errp) { ... }
      
          @@
          identifier rule1.fn;
          expression obj, v, opaque, name, errp;
          @@
           fn(obj, v,
          -   opaque, name,
          +   name, opaque,
              errp)
      Signed-off-by: NEric Blake <eblake@redhat.com>
      Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
      Message-Id: <1454075341-13658-20-git-send-email-eblake@redhat.com>
      Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
      d7bce999
    • E
      qapi: Swap visit_* arguments for consistent 'name' placement · 51e72bc1
      Eric Blake 提交于
      JSON uses "name":value, but many of our visitor interfaces were
      called with visit_type_FOO(v, &value, name, errp).  This can be
      a bit confusing to have to mentally swap the parameter order to
      match JSON order.  It's particularly bad for visit_start_struct(),
      where the 'name' parameter is smack in the middle of the
      otherwise-related group of 'obj, kind, size' parameters! It's
      time to do a global swap of the parameter ordering, so that the
      'name' parameter is always immediately after the Visitor argument.
      
      Additional reason in favor of the swap: the existing include/qjson.h
      prefers listing 'name' first in json_prop_*(), and I have plans to
      unify that file with the qapi visitors; listing 'name' first in
      qapi will minimize churn to the (admittedly few) qjson.h clients.
      
      Later patches will then fix docs, object.h, visitor-impl.h, and
      those clients to match.
      
      Done by first patching scripts/qapi*.py by hand to make generated
      files do what I want, then by running the following Coccinelle
      script to affect the rest of the code base:
       $ spatch --sp-file script `git grep -l '\bvisit_' -- '**/*.[ch]'`
      I then had to apply some touchups (Coccinelle insisted on TAB
      indentation in visitor.h, and botched the signature of
      visit_type_enum() by rewriting 'const char *const strings[]' to
      the syntactically invalid 'const char*const[] strings').  The
      movement of parameters is sufficient to provoke compiler errors
      if any callers were missed.
      
          // Part 1: Swap declaration order
          @@
          type TV, TErr, TObj, T1, T2;
          identifier OBJ, ARG1, ARG2;
          @@
           void visit_start_struct
          -(TV v, TObj OBJ, T1 ARG1, const char *name, T2 ARG2, TErr errp)
          +(TV v, const char *name, TObj OBJ, T1 ARG1, T2 ARG2, TErr errp)
           { ... }
      
          @@
          type bool, TV, T1;
          identifier ARG1;
          @@
           bool visit_optional
          -(TV v, T1 ARG1, const char *name)
          +(TV v, const char *name, T1 ARG1)
           { ... }
      
          @@
          type TV, TErr, TObj, T1;
          identifier OBJ, ARG1;
          @@
           void visit_get_next_type
          -(TV v, TObj OBJ, T1 ARG1, const char *name, TErr errp)
          +(TV v, const char *name, TObj OBJ, T1 ARG1, TErr errp)
           { ... }
      
          @@
          type TV, TErr, TObj, T1, T2;
          identifier OBJ, ARG1, ARG2;
          @@
           void visit_type_enum
          -(TV v, TObj OBJ, T1 ARG1, T2 ARG2, const char *name, TErr errp)
          +(TV v, const char *name, TObj OBJ, T1 ARG1, T2 ARG2, TErr errp)
           { ... }
      
          @@
          type TV, TErr, TObj;
          identifier OBJ;
          identifier VISIT_TYPE =~ "^visit_type_";
          @@
           void VISIT_TYPE
          -(TV v, TObj OBJ, const char *name, TErr errp)
          +(TV v, const char *name, TObj OBJ, TErr errp)
           { ... }
      
          // Part 2: swap caller order
          @@
          expression V, NAME, OBJ, ARG1, ARG2, ERR;
          identifier VISIT_TYPE =~ "^visit_type_";
          @@
          (
          -visit_start_struct(V, OBJ, ARG1, NAME, ARG2, ERR)
          +visit_start_struct(V, NAME, OBJ, ARG1, ARG2, ERR)
          |
          -visit_optional(V, ARG1, NAME)
          +visit_optional(V, NAME, ARG1)
          |
          -visit_get_next_type(V, OBJ, ARG1, NAME, ERR)
          +visit_get_next_type(V, NAME, OBJ, ARG1, ERR)
          |
          -visit_type_enum(V, OBJ, ARG1, ARG2, NAME, ERR)
          +visit_type_enum(V, NAME, OBJ, ARG1, ARG2, ERR)
          |
          -VISIT_TYPE(V, OBJ, NAME, ERR)
          +VISIT_TYPE(V, NAME, OBJ, ERR)
          )
      Signed-off-by: NEric Blake <eblake@redhat.com>
      Reviewed-by: NMarc-André Lureau <marcandre.lureau@redhat.com>
      Message-Id: <1454075341-13658-19-git-send-email-eblake@redhat.com>
      Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
      51e72bc1
  7. 29 1月, 2016 1 次提交
    • P
      ppc: Clean up includes · 0d75590d
      Peter Maydell 提交于
      Clean up includes so that osdep.h is included first and headers
      which it implies are not included manually.
      
      This commit was created with scripts/clean-includes.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1453832250-766-6-git-send-email-peter.maydell@linaro.org
      0d75590d
  8. 09 10月, 2015 1 次提交
  9. 11 9月, 2015 1 次提交
  10. 07 7月, 2015 1 次提交
    • D
      spapr: Merge sPAPREnvironment into sPAPRMachineState · 28e02042
      David Gibson 提交于
      The code for -machine pseries maintains a global sPAPREnvironment structure
      which keeps track of general state information about the guest platform.
      This predates the existence of the MachineState structure, but performs
      basically the same function.
      
      Now that we have the generic MachineState, fold sPAPREnvironment into
      sPAPRMachineState, the pseries specific subclass of MachineState.
      
      This is mostly a matter of search and replace, although a few places which
      relied on the global spapr variable are changed to find the structure via
      qdev_get_machine().
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      28e02042
  11. 27 6月, 2014 6 次提交
    • A
      xics: Implement xics_ics_free() · 51bba713
      Alexey Kardashevskiy 提交于
      This implements interrupt release function so IRQs can be returned back
      to the pool for reuse in cases such as PCI hot plug.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      51bba713
    • A
      spapr: Move interrupt allocator to xics · bee763db
      Alexey Kardashevskiy 提交于
      The current allocator returns IRQ numbers from a pool and does not
      support IRQs reuse in any form as it did not keep track of what it
      previously returned, it only keeps the last returned IRQ. Some use
      cases such as PCI hot(un)plug may require IRQ release and reallocation.
      
      This moves an allocator from SPAPR to XICS.
      
      This switches IRQ users to use new API.
      
      This uses LSI/MSI flags to know if interrupt is allocated.
      
      The interrupt release function will be posted as a separate patch.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      bee763db
    • A
      xics: Disable flags reset on xics reset · a7e519a8
      Alexey Kardashevskiy 提交于
      Since islsi[] array has been merged into the ICSState struct,
      we must not reset flags as they tell if the interrupt is in use.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a7e519a8
    • A
      xics: Add xics_find_source() · 641c3493
      Alexey Kardashevskiy 提交于
      PAPR allows having multiple interrupt sources such as PHB.
      
      This adds a source lookup function and makes use of it.
      
      Since at the moment QEMU only supports a single source,
      no change in behaviour is expected.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      641c3493
    • A
      xics: Add flags for interrupts · 4af88944
      Alexey Kardashevskiy 提交于
      The existing interrupt allocation scheme in SPAPR assumes that
      interrupts are allocated at the start time, continously and the config
      will not change. However, there are cases when this is not going to work
      such as:
      
      1. migration - we will have to have an ability to choose interrupt
      numbers for devices in the command line and this will create gaps in
      interrupt space.
      
      2. PCI hotplug - interrupts from unplugged device need to be returned
      back to interrupt pool, otherwise we will quickly run out of interrupts.
      
      This replaces a separate lslsi[] array with a byte in the ICSIRQState
      struct and defines "LSI" and "MSI" flags. Neither of these flags set
      signals that the descriptor is not allocated and not in use.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4af88944
    • A
      spapr: Fix RTAS token numbers · 3a3b8502
      Alexey Kardashevskiy 提交于
      At the moment spapr_rtas_register() allocates a new token number for every
      new RTAS callback so numbers are not fixed and depend on the number of
      supported RTAS handlers and the exact order of spapr_rtas_register() calls.
      These tokens are copied into the device tree and remain the same during
      the guest lifetime.
      
      When we start another guest to receive a migration, it calls
      spapr_rtas_register() as well. If the number of RTAS handlers or their
      order is different in QEMU on source and destination sides, the "/rtas"
      node in the device tree will differ. Since migration overwrites the device
      tree (as it overwrites the entire RAM), the actual RTAS config on
      the destination side gets broken.
      
      This defines global contant values for every RTAS token which QEMU
      is using today.
      
      This changes spapr_rtas_register() to accept a token number instead of
      allocating one. This changes all users of spapr_rtas_register().
      
      This changes XICS-KVM not to cache tokens registered with KVM as they
      constant now.
      
      This makes TOKEN_BASE global as RTAS_XXX use TOKEN_BASE as
      a base. TOKEN_MAX is moved and renamed too and its value is changed
      to the last token + 1. Boundary checks for token values are adjusted.
      
      This reserves token numbers for "os-term" handlers and PCI hotplug
      which we are working on.
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      3a3b8502
  12. 16 6月, 2014 1 次提交
  13. 05 3月, 2014 1 次提交
  14. 20 12月, 2013 1 次提交
  15. 26 10月, 2013 9 次提交
  16. 02 9月, 2013 1 次提交
  17. 31 8月, 2013 1 次提交
  18. 29 7月, 2013 1 次提交
    • A
      xics: rename types to be sane and follow coding style · c04d6cfa
      Anthony Liguori 提交于
          Basically, in HW the layout of the interrupt network is:
      
           - One ICP per processor thread (the "presenter"). This contains the
          registers to fetch a pending interrupt (ack), EOI, and control the
          processor priority.
      
           - One ICS per logical source of interrupts (ie, one per PCI host
          bridge, and a few others here or there). This contains the per-interrupt
          source configuration (target processor(s), priority, mask) and the
          per-interrupt internal state.
      
          Under PAPR, there is a single "virtual" ICS ... somewhat (it's a bit
          oddball what pHyp does here, arguably there are two but we can ignore
          that distinction). There is no register level access. A pair of firmware
          (RTAS) calls is used to configure each virtual interrupt.
      
          So our model here is somewhat the same. We have one ICS in the emulated
          XICS which arguably *is* the emulated XICS, there's no point making it a
          separate "device", that would just be gross, and each VCPU has an
          associated ICP.
      
      Yet we call the "XICS" struct icp_state and then the ICPs
      'struct icp_server_state'.  It's particularly confusing when all of the
      functions have xics_prefixes yet take *icp arguments.
      
      Rename:
      
        struct icp_state -> XICSState
        struct icp_server_state -> ICPState
        struct ics_state -> ICSState
        struct ics_irq_state -> ICSIRQState
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Message-id: 1374175984-8930-12-git-send-email-aliguori@us.ibm.com
      [aik: added ics_resend() on post_load]
      Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      c04d6cfa
  19. 12 7月, 2013 1 次提交
  20. 01 7月, 2013 1 次提交
    • A
      spapr-rtas: add CPU argument to RTAS calls · 210b580b
      Anthony Liguori 提交于
      RTAS is a hypervisor provided binary blob that a guest loads and
      calls into to execute certain functions.  It's similar to the
      vsyscall page in Linux or the short lived VMCI paravirt interface
      from VMware.
      
      The QEMU implementation of the RTAS blob is simply a passthrough
      that proxies all RTAS calls to the hypervisor via an hypercall.
      
      While we pass a CPU argument for hypercall handling in QEMU, we
      don't pass it for RTAS calls.  Since some RTAs calls require
      making hypercalls (normally RTAS is implemented as guest code) we
      have nasty hacks to allow that.
      
      Add a CPU argument to RTAS call handling so we can more easily
      invoke hypercalls just as guest code would.
      Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      210b580b
  21. 27 4月, 2013 1 次提交
  22. 09 4月, 2013 1 次提交
    • P
      hw: move headers to include/ · 0d09e41a
      Paolo Bonzini 提交于
      Many of these should be cleaned up with proper qdev-/QOM-ification.
      Right now there are many catch-all headers in include/hw/ARCH depending
      on cpu.h, and this makes it necessary to compile these files per-target.
      However, fixing this does not belong in these patches.
      Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0d09e41a
  23. 22 3月, 2013 1 次提交
  24. 01 3月, 2013 2 次提交