- 26 1月, 2015 3 次提交
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由 Eduardo Habkost 提交于
All Haswell CPUs and some Broadwell CPUs were updated by Intel to have the HLE and RTM features disabled. This will prevent "-cpu Haswell,enforce" and "-cpu Broadwell,enforce" from running out of the box on those CPUs. Disable those features by default on Broadwell and Haswell CPU models, starting on pc-*-2.3. Users who want to use those features can enable them explicitly on the command-line. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Right now, the AVX512 registers are split in many different fields: xmm_regs for the low 128 bits of the first 16 registers, ymmh_regs for the next 128 bits of the same first 16 registers, zmmh_regs for the next 256 bits of the same first 16 registers, and finally hi16_zmm_regs for the full 512 bits of the second 16 bit registers. This makes it simple to move data in and out of the xsave region, but would be a nightmare for a hypothetical TCG implementation and leads to a proliferation of [XYZ]MM_[BWLSQD] macros. Instead, this patch marshals data manually from the xsave region to a single 32x512-bit array, simplifying the macro jungle and clarifying which bits are in which vmstate subsection. The migration format is unaffected. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
After the next patch, each vmstate field will extract parts of a larger (32x512-bit) array, so we cannot check the vmstate field against the type of the array. While changing this, change the macros to accept the index of the first element (which will not be 0 for Hi16_ZMM_REGS) instead of the number of elements (which is always CPU_NB_REGS). Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 20 1月, 2015 2 次提交
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由 Peter Maydell 提交于
Use inline functions rather than macros for cpu_ld/st accessors for the *-user configurations, as we already do for softmmu. This has a two advantages: * we can actually typecheck our arguments * we don't need to leak the _raw macros everywhere Since the _kernel functions were only used by target-i386/seg_helper.c, put the definitions for them in that file too. (It already has the similar template include code to define them for the softmmu case, so it makes sense to have it deal with defining them for user-only.) Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Reviewed-by: NPaolo Bonzini <pbonzini@redhat.com> Reviewed-by: NAlex Bennée <alex.bennee@linaro.org> Message-id: 1421334118-3287-12-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
The TARGET_HAS_ICE #define is intended to indicate whether a target-* guest CPU implementation supports the breakpoint handling. However, all our guest CPUs have that support (the only two which do not define TARGET_HAS_ICE are unicore32 and openrisc, and in both those cases the bp support is present and the lack of the #define is just a bug). So remove the #define entirely: all new guest CPU support should include breakpoint handling as part of the basic implementation. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1420484960-32365-1-git-send-email-peter.maydell@linaro.org
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- 14 1月, 2015 2 次提交
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由 Paolo Bonzini 提交于
After the next patch, we will move the high parts of AVX and AVX512 registers in the same array as the SSE registers. This will make it impossible to memcpy an array of 128-bit values in and out of xmm_regs in one swoop. Use a for loop instead. Similarly, always use XMM_Q in translate.c. This avoids introducing bugs such as the one fixed in the previous patch. Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
This was accessing an XMM register's low half without going through XMM_Q. Cc: qemu-stable@nongnu.org Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 12 1月, 2015 1 次提交
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由 Frank Blaschka 提交于
on s390 MSI-X irqs are presented as thin or adapter interrupts for this we have to reorganize the routing entry to contain valid information for the adapter interrupt code on s390. To minimize impact on existing code we introduce an architecture function to fixup the routing entry. Signed-off-by: NFrank Blaschka <frank.blaschka@de.ibm.com> Signed-off-by: NCornelia Huck <cornelia.huck@de.ibm.com>
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- 03 1月, 2015 2 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NPavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NPavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 17 12月, 2014 1 次提交
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由 Antony Pavlov 提交于
Running barebox on qemu-system-mips* with '-d unimp' overloads stderr by very very many mips_cpu_handle_mmu_fault() messages: mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 00000000180003fd prot 3 mips_cpu_handle_mmu_fault address=a0800884 ret 0 physical 0000000000800884 prot 3 mips_cpu_handle_mmu_fault pc a080cd80 ad b80003fd rw 0 mmu_idx 0 So it's very difficult to find LOG_UNIMP message. The mips_cpu_handle_mmu_fault() messages appear on enabling ANY logging! It's not very handy. Adding separate log category for *_cpu_handle_mmu_fault() logging fixes the problem. Signed-off-by: NAntony Pavlov <antonynpavlov@gmail.com> Acked-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NRichard Henderson <rth@twiddle.net> Message-id: 1418489298-1184-1-git-send-email-antonynpavlov@gmail.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 15 12月, 2014 18 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
Both were added in Ivy Bridge (for which we do not have a CPU model yet!). Reviewed-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
vm86 mode extensions date back to the 486. All models should have them. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Pavel Dovgalyuk 提交于
This patch denies crossing the boundary of the pages in the replay mode, because it can cause an exception. Do it only when boundary is crossed by the first instruction in the block. If current instruction already crossed the bound - it's ok, because an exception hasn't stopped this code. Signed-off-by: NPavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Markus Armbruster 提交于
g_new(T, n) is neater than g_malloc(sizeof(T) * n). It's also safer, for two reasons. One, it catches multiplication overflowing size_t. Two, it returns T * rather than void *, which lets the compiler catch more type errors. This commit only touches allocations with size arguments of the form sizeof(T). Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Markus Armbruster 提交于
Coccinelle semantic patch: @@ expression LHS, SZ; @@ - LHS = g_malloc(SZ); - memset(LHS, 0, SZ); + LHS = g_malloc0(SZ); Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Wanpeng Li 提交于
Add xsaves related definition, it also adds corresponding part to kvm_get/put, and vmstate. Signed-off-by: NWanpeng Li <wanpeng.li@linux.intel.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Paolo Bonzini 提交于
These represent xsave-related capabilities of the processor, and KVM may or may not support them. Add feature bits so that they are considered by "-cpu ...,enforce", and use the new feature work instead of calling kvm_arch_get_supported_cpuid. Bit 3 (XSAVES) is not migratables because it requires saving MSR_IA32_XSS. Neither KVM nor any commonly available hardware supports it anyway. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Christian Borntraeger 提交于
struct kvm_vcpu_events contains reserved fields. Let's use a designated initializer to avoid false positives in valgrind. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Christian Borntraeger 提交于
struct kvm_msrs contains a pad field. Let's use a designated initializer on the info part to avoid false positives from valgrind/memcheck. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Christian Borntraeger 提交于
struct kvm_msrs contains padding bytes. Let's use a designated initializer on the info part to avoid false positives from valgrind/memcheck. Do the same for generic MSRS, the TSC and feature control. We also need to zero out the reserved fields in the entries. We do this in kvm_msr_entry_set as suggested by Paolo. This avoids a big memset that a designated initializer on the full structure would do. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Christian Borntraeger 提交于
struct kvm_xcrs contains padding bytes. Let's use a designated initializer to avoid false positives from valgrind/memcheck. Signed-off-by: NChristian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Eric Auger 提交于
Compute kvm_irqfds_allowed by checking the KVM_CAP_IRQFD extension. Remove direct settings in architecture specific files. Add a new kvm_resamplefds_allowed variable, initialized by checking the KVM_CAP_IRQFD_RESAMPLE extension. Add a corresponding kvm_resamplefds_enabled() function. A special notice for s390 where KVM_CAP_IRQFD was not immediatly advirtised when irqfd capability was introduced in the kernel. KVM_CAP_IRQ_ROUTING was advertised instead. This was fixed in "KVM: s390: announce irqfd capability", ebc3226202d5956a5963185222982d435378b899 whereas irqfd support was brought in 84223598778ba08041f4297fda485df83414d57e, "KVM: s390: irq routing for adapter interrupts". Both commits first appear in 3.15 so there should not be any kernel version impacted by this QEMU modification. Signed-off-by: NEric Auger <eric.auger@linaro.org> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Aurelien Jarno 提交于
This patch simplifies the AES code, by directly accessing the newly added S-Box, InvS-Box and InvMixColumns tables instead of recreating them by using the AES_Te and AES_Td tables. Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Reviewed-by: NRichard Henderson <rth@twiddle.net> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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由 Pavel Dovgalyuk 提交于
TCG generates optimized code for i386 repz instructions in single step mode. It means that when ecx becomes 0, execution of the string instruction breaks immediately without an additional iteration for ecx==0 (which will only check ecx and set the flags). Omitting this iteration leads to different instructions counting in singlestep mode and in normal execution. This patch disables optimization of this last iteration for icount mode which should be deterministic. v2: inverted the condition and formatted the comment Signed-off-by: NPavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Dmitry Poletaev 提交于
Signed-off-by: NDmitry Poletaev <poletaev-qemu@yandex.ru> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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由 Dmitry Poletaev 提交于
Signed-off-by: NDmitry Poletaev <poletaev-qemu@yandex.ru> Signed-off-by: NRichard Henderson <rth@twiddle.net>
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- 24 11月, 2014 1 次提交
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由 Paolo Bonzini 提交于
After the next patch, if a masked PIC interrupts causes CPU_INTERRUPT_POLL to be set, the CPU will spuriously get out of halted state. While this is technically valid, we should avoid that. Make CPU_INTERRUPT_POLL run apic_update_irq in the right thread and then look at CPU_INTERRUPT_HARD. If CPU_INTERRUPT_HARD does not get set, do not report the CPU as having work. Also move the handling of software-disabled APIC from apic_update_irq to apic_irq_pending, and always trigger CPU_INTERRUPT_POLL. This will be important once we will add a case that resets CPU_INTERRUPT_HARD from apic_update_irq. We want to run it even if we go through CPU_INTERRUPT_POLL, and even if the local APIC is software disabled. Reported-by: NRichard Bilson <rbilson@qnx.com> Tested-by: NRichard Bilson <rbilson@qnx.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 13 11月, 2014 1 次提交
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由 Paolo Bonzini 提交于
sipi_vector is an int; it is shifted by 12 and passed as a 64-bit value, which makes Coverity think that we wanted (uint64_t)sipi_vector << 12. But actually it must be between 0 and 255. Make this explicit. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 12 11月, 2014 1 次提交
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由 Paolo Bonzini 提交于
ist != 0 is checked in the first "if", so it cannot be true in the "else if" part. While at it, simplify the code and move the ESP alignment out of the conditionals. Reported by Coverity. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 11 11月, 2014 1 次提交
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由 Chen Fan 提交于
Signed-off-by: NChen Fan <chen.fan.fnst@cn.fujitsu.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 04 11月, 2014 5 次提交
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由 Eduardo Habkost 提交于
Make SVM be disabled by default on all CPU models when in KVM mode. Nested SVM is enabled by default in the KVM kernel module, but it is probably less stable than nested VMX (which is already disabled by default). Add a new compat function, x86_cpu_compat_kvm_no_autodisable(), to keep compatibility on previous machine-types. Suggested-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Eduardo Habkost 提交于
TCG doesn't support VMX, and nested VMX is not enabled by default in the KVM kernel module. So, there's no reason to have VMX enabled by default on the core2duo and coreduo CPU models, today. Even the newer Intel CPU model definitions don't have it enabled. In this case, we need machine-type compat code, as people may be running the older machine-types on hosts that had VMX nesting enabled. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Eduardo Habkost 提交于
The following CPU features were never supported by neither TCG or KVM, so they are useless on the CPU model definitions, today: * CPUID_DTS (DS) * CPUID_HT * CPUID_TM * CPUID_PBE * CPUID_EXT_DTES64 * CPUID_EXT_DSCPL * CPUID_EXT_EST * CPUID_EXT_TM2 * CPUID_EXT_XTPR * CPUID_EXT_PDCM * CPUID_SVM_LBRV As using "enforce" mode is the only way to ensure guest ABI doesn't change when moving to a different host, we should make "enforce" mode the default or at least encourage management software to always use it. In turn, to make "enforce" usable, we need CPU models that work without always requiring some features to be explicitly disabled. This patch removes the above features from all CPU model definitions. We won't need any machine-type compat code for those changes, because it is impossible to have existing VMs with those features enabled. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Cc: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Eduardo Habkost 提交于
KVM never supported the CPUID_ACPI flag, so it doesn't make sense to have it enabled by default when KVM is enabled. The motivation here is exactly the same we had for the MONITOR flag (disabled by commit 136a7e9a). And like in the MONITOR flag case, we don't need machine-type compat code because it is currently impossible to run a KVM VM with the ACPI flag set. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Eduardo Habkost 提交于
The x86_cpu_compat_disable_kvm_features() name was a bit confusing, as it won't forcibly disable the feature for all CPU models (i.e. add it to kvm_default_unset_features), but it will instead turn off the KVM auto-enabling of the feature (i.e. remove it from kvm_default_features), meaning the feature may still be enabled by default in some CPU models). Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 02 11月, 2014 1 次提交
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由 Eduardo Habkost 提交于
The struct is not used anymore and can be removed. Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
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- 31 10月, 2014 1 次提交
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由 Pavel Dovgalyuk 提交于
This patch fixes instructions counting when execution is stopped on breakpoint (e.g. set from gdb). Without a patch extra instruction is translated and icount is incremented by invalid value (which equals to number of executed instructions + 1). Signed-off-by: NPavel Dovgalyuk <pavel.dovgaluk@ispras.ru> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NPavel Dovgalyuk <Pavel.Dovgaluk@ispras.ru>
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