提交 · 110f6c703bb6d99419196c3c5e369880c994d0bd · openeuler / qemu

25 10月, 2017 7 次提交

arm: Support Capstone in disas_set_info · 110f6c70

由 Richard Henderson 提交于 9月 14, 2017

Tested-by: NAlex Bennée <alex.bennee@linaro.org>
Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

110f6c70

i386: Support Capstone in disas_set_info · b666d2a4

由 Richard Henderson 提交于 9月 14, 2017

Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

b666d2a4

disas: Remove unused flags arguments · 1d48474d

由 Richard Henderson 提交于 9月 14, 2017

Now that every target is using the disas_set_info hook,
the flags argument is unused.  Remove it.
Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

1d48474d

target/arm: Don't set INSN_ARM_BE32 for CONFIG_USER_ONLY · 7bcdbf51

由 Richard Henderson 提交于 10月 19, 2017

This matches translator behaviour in arm_lduw_code.

Fixes: https://bugs.launchpad.net/qemu/+bug/1724485Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

7bcdbf51

target/arm: Move BE32 disassembler fixup · 6cd61517

由 Richard Henderson 提交于 10月 19, 2017

The Capstone disassembler has its own big-endian fixup.
Doing this twice does not work, of course.  Move our current
fixup from target/arm/cpu.c to disas/arm.c.

This makes read_memory_inner_func unused and can be removed.
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

6cd61517

target/ppc: Convert to disas_set_info hook · 0eea8cdd

由 Richard Henderson 提交于 9月 14, 2017

Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

0eea8cdd

target/i386: Convert to disas_set_info hook · f50f3dd5

由 Richard Henderson 提交于 9月 14, 2017

Tested-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NPhilippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: NAlex Bennée <alex.bennee@linaro.org>
Signed-off-by: NRichard Henderson <richard.henderson@linaro.org>

f50f3dd5

21 10月, 2017 2 次提交

openrisc/cputimer: Perparation for Multicore · 6b4bbd6a

由 Stafford Horne 提交于 8月 22, 2017

In order to support multicore system we move some of the previously
static state variables into the state of each core.

On the other hand in order to allow timers to be synced between each
code the ttcr (tick timer count register) is moved out of the core.
This is not as per real hardware spec which has a separate timer counter
per core, but it seems the most simple way to keep each clock in sync.
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NStafford Horne <shorne@gmail.com>

6b4bbd6a

target/openrisc: Make coreid and numcores variable · 8c949951

由 Stafford Horne 提交于 6月 18, 2017

Previously coreid and numcores were hard coded as 0 and 1 respectively
as OpenRISC QEMU did not have multicore support.

Multicore support is now being added so these registers need to have
configured values.
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NStafford Horne <shorne@gmail.com>

8c949951

20 10月, 2017 31 次提交

s390x/tcg: low-address protection support · 2bcf0183

由 David Hildenbrand 提交于 10月 16, 2017

This is a neat way to implement low address protection, whereby
only the first 512 bytes of the first two pages (each 4096 bytes) of
every address space are protected.

Store a tec of 0 for the access exception, this is what is defined by
Enhanced Suppression on Protection in case of a low address protection
(Bit 61 set to 0, rest undefined).

We have to make sure to to pass the access address, not the masked page
address into mmu_translate*().

Drop the check from testblock. So we can properly test this via
kvm-unit-tests.

This will check every access going through one of the MMUs.
Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
Signed-off-by: NDavid Hildenbrand <david@redhat.com>
Message-Id: <20171016202358.3633-3-david@redhat.com>
[CH: restored error message for access register mode]
Signed-off-by: NCornelia Huck <cohuck@redhat.com>

2bcf0183

s390x: refactor error handling for MSCH handler · 6bb6f194