- 24 2月, 2014 5 次提交
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由 Markus Armbruster 提交于
qmp_guest_file_seek() allocates memory for a GuestFileRead object instead of the GuestFileSeek object it actually uses. Harmless, because the GuestFileRead is slightly larger. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Michal Privoznik 提交于
As the description to the guest-set-time states, the command is there to ease time synchronization after resume. If guest was suspended for longer period of time, its system time can go off so badly, that even NTP refuses to set it. That's why the command was invented: to give users chance to set the time (not necessarily 100% correct). However, there's is no real need for us to require users to pass an arbitrary time. Especially if we can read the correct value from RTC (boiling down to reading host's time). Hence this commit enables logic: guest-set-time() == guest-set-time($now_from_rtc) Signed-off-by: NMichal Privoznik <mprivozn@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Tomoki Sekiyama 提交于
When a VSS requester such as vshadow.exe or diskshadow.exe requests to delete snapshots, qemu-ga VSS provider's DeleteSnapshots() is also called and returns E_NOTIMPL, that makes the deletion fail. To avoid this issue, return S_OK and set values that represent no snapshots are deleted by qemu-ga VSS provider. Signed-off-by: NTomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: NGal Hammer <ghammer@redhat.com> Reviewed-by: NYan Vugenfirer <yvugenfi@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Tomoki Sekiyama 提交于
When a VSS requester such as vshadow.exe or diskshadow.exe requests to create disk snapshots, Windows may choose qemu-ga VSS provider if it is only provider registered on the system. However, because it provides only a function to freeze the filesystem, the snapshotting fails. This patch adds a check into CQGAVssProvider::IsVolumeSupported() to reject the request from other VSS requesters, so that the other provider is chosen. The check of requester is done by confirming event channels between qemu-ga's requester and provider established. To ensure that the events are initialized when CQGAVssProvider::IsVolumeSupported() is called, it moves the initialization earlier. Signed-off-by: NTomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: NGal Hammer <ghammer@redhat.com> Reviewed-by: NYan Vugenfirer <yvugenfi@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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由 Tomoki Sekiyama 提交于
OpenEvent and CreateEvent WinAPI return NULL when failed to open/create events handles, instead of INVALID_HANDLE_VALUE (although their return types are HANDLE). This replaces INVALID_HANDLE_VALUE related to event handles with NULL. Signed-off-by: NTomoki Sekiyama <tomoki.sekiyama@hds.com> Reviewed-by: NGal Hammer <ghammer@redhat.com> Reviewed-by: NYan Vugenfirer <yvugenfi@redhat.com> Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
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- 21 2月, 2014 6 次提交
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由 Peter Maydell 提交于
target-arm queue: * Fix a bug causing an assertion in the NVIC on ARMv7M models * More A64 Neon instructions * Refactor cpreg API to separate out access check functions, as groundwork for AArch64 system mode * Fix bug in linux-user A64 store-exclusive of XZR # gpg: Signature made Thu 20 Feb 2014 11:12:57 GMT using RSA key ID 14360CDE # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" * remotes/pmaydell/tags/pull-target-arm-20140220: (30 commits) linux-user: AArch64: Fix exclusive store of the zero register target-arm: A64: Implement unprivileged load/store target-arm: A64: Implement narrowing three-reg-diff operations target-arm: A64: Implement the wide 3-reg-different operations target-arm: A64: Add most remaining three-reg-diff widening ops target-arm: A64: Add opcode comments to disas_simd_three_reg_diff target-arm: A64: Implement store-exclusive for system mode target-arm: Fix incorrect type for value argument to write_raw_cp_reg target-arm: Remove failure status return from read/write_raw_cp_reg target-arm: Remove unnecessary code now read/write fns can't fail target-arm: Drop success/fail return from cpreg read and write functions target-arm: Convert miscellaneous reginfo structs to accessfn target-arm: Convert generic timer reginfo to accessfn target-arm: Convert performance monitor reginfo to accessfn target-arm: Split cpreg access checks out from read/write functions target-arm: Stop underdecoding ARM946 PRBS registers target-arm: Log bad system register accesses with LOG_UNIMP target-arm: Remove unused ARMCPUState sr substruct target-arm: Restrict check_ap() use of S and R bits to v6 and earlier target-arm: Define names for SCTLR bits ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Merge remote-tracking branch 'remotes/stefanha/tags/qtest-monitor-process-pull-request' into staging qtest resource cleanup pull request # gpg: Signature made Wed 19 Feb 2014 14:46:34 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/qtest-monitor-process-pull-request: qtest: kill QEMU process on g_assert() failure qtest: make QEMU our direct child process qtest: drop unused child_pid field Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Tracing pull request # gpg: Signature made Wed 19 Feb 2014 15:42:20 GMT using RSA key ID 81AB73C8 # gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" # gpg: aka "Stefan Hajnoczi <stefanha@gmail.com>" # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35 775A 9CA4 ABB3 81AB 73C8 * remotes/stefanha/tags/tracing-pull-request: trace-events: Fix typo in "offset" Add ust generated files to .gitignore Update documentation for LTTng ust tracing Adapt Makefiles to the new LTTng ust interface Modified the tracetool framework for LTTng 2.x Fix configure script for LTTng 2.x Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
This fixes a target-i386 emulation regression # gpg: Signature made Wed 19 Feb 2014 15:42:12 GMT using RSA key ID C88F2FD6 # gpg: Good signature from "Kevin Wolf <kwolf@redhat.com>" * remotes/kevin/tags/for-upstream: target-i386: Fix I/O bitmap checks for in/out Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
* remotes/riku/linux-user-for-upstream: linux-user: Fix error handling in target_to_host_semarray() linux-user: Implement BLKPG ioctl linux-user: Fix error handling in lock_iovec() linux-user/signal.c: Don't pass sigaction uninitialised sa_flags linux-user/elfload.c: Avoid calling g_free() on uninitialized data linux-user: sync syscall numbers upto 3.13 Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Win32 doesn't have a cpuid.h, and MacOSX may have one but without the __cpuid() function we use, which means that commit 9d2eec20 broke the build for those platforms. Fix this by tightening up our configure cpuid.h check to test that the functions we need are present, and adding some missing #ifdef guards in tcg/i386/tcg-target.c. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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- 20 2月, 2014 29 次提交
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由 Peter Maydell 提交于
- xhci improvements and fixes. - uhci bugfix. - cleanups. # gpg: Signature made Tue 18 Feb 2014 15:48:10 GMT using RSA key ID D3E87138 # gpg: Good signature from "Gerd Hoffmann (work) <kraxel@redhat.com>" # gpg: aka "Gerd Hoffmann <gerd@kraxel.org>" # gpg: aka "Gerd Hoffmann (private) <kraxel@gmail.com>" * remotes/kraxel/tags/pull-usb-3: xhci: use DPRINTF() instead of fprintf(stderr, ...) xhci: switch debug printf to tracepoint xhci iso: allow for some latency xhci iso: fix time calculation uhci: invalidate queue on device address changes xhci: fix overflow in usb_xhci_post_load usb: Remove magic constants from device bmAttributes Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
* remotes/rth/tcg-next: tcg/i386: Use SHLX/SHRX/SARX instructions tcg/i386: Use ANDN instruction tcg/i386: Add tcg_out_vex_modrm tcg/i386: Move TCG_CT_CONST_* to tcg-target.c disas/i386: Disassemble ANDN/SHLX/SHRX/SHAX tcg/optimize: Add more identity simplifications tcg/optimize: Optmize ANDC X,Y,Y to MOV X,0 tcg/optimize: Simply some logical ops to NOT tcg/optimize: Handle known-zeros masks for ANDC tcg/optimize: add known-zero bits compute for load ops tcg/optimize: improve known-zero bits for 32-bit ops tcg/optimize: fix known-zero bits optimization tcg/optimize: fix known-zero bits for right shift ops tcg-arm: The shift count of op_rotl_i32 is in args[2] not args[1]. TCG: Fix 32-bit host allocation typo Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
QOM infrastructure fixes and device conversions * QTest cleanups and test cases for PCI NICs * NAND fix for "info qtree" * Cleanup and extension of QOM machine tests * IndustryPack test cases and conversion to QOM realize * I2C cleanups * Cleanups of legacy qdev properties # gpg: Signature made Mon 17 Feb 2014 22:15:37 GMT using RSA key ID 3E7E013F # gpg: Good signature from "Andreas Färber <afaerber@suse.de>" # gpg: aka "Andreas Färber <afaerber@suse.com>" * remotes/afaerber/tags/qom-devices-for-peter: (49 commits) qtest: Include system headers before user headers qapi: Refine human printing of sizes qdev: Use QAPI type names for properties qdev: Add enum property types to QAPI schema block: Handle "rechs" and "large" translation options qdev: Remove hex8/32/64 property types qdev: Remove most legacy printers qdev: Use human mode in "info qtree" qapi: Add human mode to StringOutputVisitor qdev: Inline qdev_prop_parse() qdev: Legacy properties are just strings qdev: Legacy properties are now read-only qdev: Remove legacy parsers for hex8/32/64 qdev: Sizes are now parsed by StringInputVisitor qapi: Add size parser to StringInputVisitor qtest: Don't segfault with invalid -qtest option ipack: Move IndustryPack out of hw/char/ ipoctal232: QOM parent field cleanup ipack: QOM parent field cleanup for IPackDevice ipack: QOM parent field cleanup for IPackBus ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
* remotes/qmp-unstable/queue/qmp: monitor: Add object_add class argument completion. monitor: Add object_del id argument completion. monitor: Add device_add device argument completion. monitor: Add device_del id argument completion. qmp: expose list of supported character device backends Use error_is_set() only when necessary QMP: allow JSON dict arguments in qmp-shell hmp: migrate command (without -d) now blocks correctly Conflicts: blockdev.c [PMM: resolved trivial conflict in blockdev.c] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Janne Grunau 提交于
Signed-off-by: NJanne Grunau <j@jannau.net> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Implement the unprivileged load and store instructions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
Implement the narrowing three-reg-diff operations: ADDHN, RADDHN, SUBHN and RSUBHN. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
Implement the wide three-reg-different operations: SADDW, UADDW, SSUBW and USUBW. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
Add the remainder of the 64x64->128 operations in the three-reg-diff category except for PMULL, PMULL2. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
The opcode switch in disas_simd_three_reg_diff() is missing the customary comments indicating which cases correspond to which instructions. Add them. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
System mode store-exclusive use a different code path to usermode ones; implement this missing code, in a similar way to the 32 bit version. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
The write_raw_cp_reg's value argument should be a uint64_t, since that's what all its callers hand it and what all the functions it calls take. A (harmless) typo meant we were accidentally declaring it as int64_t. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
The read_raw_cp_reg and write_raw_cp_reg functions can now never fail (in fact they should never have failed previously unless there was a bug in a reginfo that meant no raw accessor was provided for a might-trap register). This allows us to clean up their prototypes so the write function returns void and the read function returns the value read, which in turn lets us simplify the callers. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Now that cpreg read and write functions can't fail and throw an exception, we can remove the code from the translator that synchronises the guest PC in case an exception is thrown. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
All cpreg read and write functions now return 0, so we can clean up their prototypes: * write functions return void * read functions return the value rather than taking a pointer to write the value to This is a fairly mechanical change which makes only the bare minimum set of changes to the callers of read and write functions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Convert the remaining miscellaneous cases of reginfo read/write functions returning EXCP_UDEF to use an accessfn instead: TEEHBR, and the ATS address-translation operations. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Convert the reginfo structs for the generic timer registers to use access functions rather than returning EXCP_UDEF from their read handlers. In some cases this allows us to remove a read handler completely. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Convert the performance monitor reginfo definitions to use an accessfn rather than returning EXCP_UDEF from read and write functions. This also allows us to fix a couple of XXX cases where we weren't imposing the access restrictions on RAZ/WI or constant registers. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Several of the system registers handled via the ARMCPRegInfo mechanism have access trap control bits controlling whether the registers are accessible to lower privilege levels. Replace the existing mechanism (allowing the read and write functions to return EXCP_UDEF if access is denied) with a dedicated "check access rights" function pointer in the ARMCPRegInfo. This will allow us to simplify some of the register definitions, which no longer need read/write functions purely to handle the access checks. We take the opportunity to define the return value from the access checking function in a way that allows us to set the correct exception syndrome information for exceptions taken to AArch64 (which may need to distinguish access failures due to a configurable trap or enable from other kinds of access failure). This commit defines the new mechanism but does not move any of the registers across to use it. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
The ARM946 has 8 PRBS (protection region base and size) registers. Currently we implement these with a CP_ANY reginfo; however this underdecodes (since there are 16 possible values of CRm but only 8 registers) and we catch the invalid values in the read and write functions. However this causes issues with migration since we only migrate the first of a wildcard register set, so we only migrate c6_region[0]. It also makes it awkward to pull reginfo access checks out into their own function. Avoid all these problems by just defining separate reginfo structs for each of the 8 registers; this also lets us avoid having any read or write functions and will result in more efficient direct field accesses from generated code. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Log guest attempts to access unimplemented system registers via the LOG_UNIMP reporting mechanism (for both the 32 bit and 64 bit instruction sets). This is particularly useful for debugging problems where the guest is trying to use a system register that QEMU doesn't implement. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
Remove the 'struct sr' from ARMCPUState -- it isn't actually used and is a hangover from the original separate system register implementation used by the SuSE linux-user-mode-only AArch64 target. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
The SCTLR bits S and R (8 and 9) only exist in ARMv6 and earlier. In ARMv7 these bits RAZ, and in ARMv8 they are reassigned. Guard the use of them in check_ap() so that we don't get incorrect results for ARMv8 CPUs. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NPeter Crosthwaite <peter.crosthwaite@xilinx.com>
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由 Peter Maydell 提交于
The SCTLR is full of bits for enabling or disabling various things, and so there are many places in the code which check if certain bits are set. Define some named constants for the SCTLR bits so these checks are easier to read. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Extend the set of CPUs for which we provide a QEMU_KVM_ARM_TARGET_* constant to include all the ones currently supported by the kernel headers we are using. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Implement the remaining instructions in the SIMD 3-reg-same and scalar-3-reg-same groups: FMULX, FRECPS, FRSQRTS, FACGE, FACGT, FMLA and FMLS. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Peter Maydell 提交于
The ARMv8 instruction set includes a fused floating point reciprocal square root step instruction which demands an "(x * y + z) / 2" fused operation. Support this by adding a flag to the softfloat muladd operations which requests that the result is halved before rounding. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Alex Bennée 提交于
Add support for the floating-point pairwise operations FADDP, FMAXP, FMAXNMP, FMINP and FMINNMP. To do this we use the code which was previously handling only integer pairwise operations, and push the integer-specific decode and handling of unallocated cases up one level in the call tree, so we can also call it from the floating-point section of the decoder. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Alex Bennée 提交于
This adds all forms of the SIMD floating point and set instructions: FCM(GT|GE|EQ|LE|LT) Most of the heavy lifting is done by either the existing neon helpers or some new helpers for the 64bit double cases. Most of the code paths are common although the 2misc versions are a little special as they compare against zero. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> [PMM: fixed some minor bugs, added the 2-misc-scalar encoding] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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