1. 16 8月, 2012 9 次提交
  2. 28 6月, 2012 1 次提交
  3. 24 6月, 2012 2 次提交
    • B
      spapr: Add "memop" hypercall · c73e3771
      Benjamin Herrenschmidt 提交于
      This adds a qemu-specific hypervisor call to the pseries machine
      which allows to do what amounts to memmove, memcpy and xor over
      regions of physical memory such as the framebuffer.
      
      This is the simplest way to get usable framebuffer speed from
      SLOF since the framebuffer isn't mapped in the VRMA and so would
      otherwise require an hcall per 8 bytes access.
      
      The performance is still not great but usable, and can be improved
      with a more complex implementation of the hcall itself if needed.
      
      This also adds some documentation for the qemu-specific hypercalls
      that we add to PAPR along with a new qemu,hypertas-functions property
      that mirrors ibm,hypertas-functions and provides some discoverability
      for the new calls.
      
      Note: I chose note to advertise H_RTAS to the guest via that mechanism.
      This is done on purpose, the guest uses the normal RTAS interfaces
      provided by qemu (including SLOF) which internally calls H_RTAS.
      
      We might in the future implement part (or even all) of RTAS inside the
      guest like IBM's firmware does and replace H_RTAS with some finer grained
      set of private hypercalls.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      c73e3771
    • B
      pseries: Correctly create ibm,segment-page-sizes property · 5af9873d
      Benjamin Herrenschmidt 提交于
      The core tcg/kvm code for ppc64 now has at least the outline
      capability to support pagesizes beyond the standard 4k and 16MB.  The
      CPUState is initialized with information advertising the available
      pagesizes and their correct encodings, and under the right KVM setup
      this will be populated with page sizes beyond the standard.
      
      Obviously guests can't use the extra page sizes unless they know
      they're present.  For the pseries machine, at least, there is a
      defined method for conveying exactly this information, the
      "ibm-segment-page-sizes" property in the guest device tree.
      
      This patch generates this property using the supported page size
      information that's already in the CPUState.
      Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      5af9873d
  4. 05 6月, 2012 2 次提交
  5. 02 5月, 2012 1 次提交
    • D
      pseries: Implement automatic PAPR VIO address allocation · d601fac4
      David Gibson 提交于
      PAPR virtual IO (VIO) devices require a unique, but otherwise arbitrary,
      "address" used as a token to the hypercalls which manipulate them.
      
      Currently the pseries machine code does an ok job of allocating these
      addresses when the legacy -net nic / -serial and so forth options are used
      but will fail to allocate them properly when using -device.
      
      Specifically, you can use -device if all addresses are explicitly assigned.
      Without explicit assignment, only one VIO device of each type (network,
      console, SCSI) will be assigned properly, any further ones will attempt
      to take the same address leading to a fatal error.
      
      This patch fixes the situation by adding a proper address allocator to the
      VIO "bus" code.  This is used both by -device and the legacy options and
      default devices.  Addresses can still be explicitly assigned with -device
      options if desired.
      
      This patch changes the (guest visible) numbering of VIO devices, but since
      their addresses are discovered using the device tree and already differ
      from the numbering found on existing PowerVM systems, this does not break
      compatibility.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d601fac4
  6. 15 3月, 2012 3 次提交
    • D
      pseries: Add support for level interrupts to XICS · d07fee7e
      David Gibson 提交于
      The pseries "xics" interrupt controller, like most interrupt
      controllers can support both message (i.e. edge sensitive) interrupts
      and level sensitive interrupts, but it needs to know which are which.
      
      When I implemented the xics emulation for qemu, the only devices we
      supported were the PAPR virtual IO devices.  These devices only use
      message interrupts, so they were the only ones I implemented in xics.
      
      Since then, however, we have added support for PCI devices, which use
      level sensitive interrupts.  It turns out the message interrupt logic
      still actually works most of the time for these, but there are
      circumstances where we can lost interrupts due to the incorrect
      interrupt logic.
      
      This patch, therefore, implements the correct xics level-sensitive
      interrupt logic.  The type of the interrupt is set when a device
      allocates a new xics interrupt.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d07fee7e
    • A
      ppc hw/: Don't use CPUState · e2684c0b
      Andreas Färber 提交于
      Scripted conversion:
        for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do
          sed -i "s/CPUState/CPUPPCState/g" $file
        done
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      Acked-by: NAnthony Liguori <aliguori@us.ibm.com>
      e2684c0b
    • A
      Rename cpu_reset() to cpu_state_reset() · 1bba0dc9
      Andreas Färber 提交于
      Frees the identifier cpu_reset for QOM CPUs (manual rename).
      
      Don't hide the parameter type behind explicit casts, use static
      functions with strongly typed argument to indirect.
      Signed-off-by: NAndreas Färber <afaerber@suse.de>
      Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com>
      1bba0dc9
  7. 22 1月, 2012 1 次提交
  8. 21 1月, 2012 1 次提交
    • B
      pseries: SLOF PCI flag day · 4d8d5467
      Benjamin Herrenschmidt 提交于
      Currently on the pseries machine the SLOF firmware is used normally,
      but we bypass it when -kernel is specified.  Having these two
      
      different boot paths can cause some confusion.
      
      In particular at present we need to "probe" the (emulated) PCI bus and
      produce device tree nodes for the PCI devices in qemu, for the -kernel
      case.  In the SLOF case, it takes the device tree from qemu adds some
      stuff to it then passes it on to the kernel.
      
      It's been decided that a better approach is to always boot through
      SLOF, even when using -kernel.  WIth this approach we can leave PCI
      probing and device node creation to SLOF in all cases which removes a
      bunch of code in qemu, and avoids iterating the PCI devices from the
      machine specific init code which we're not supposed to do.
      
      This patch changes qemu to always boot through SLOF, and not to create
      PCI nodes.  Simultaneously it updates the included version of SLOF
      (submodule and binary image) to one which supports (and requires) the
      new approach.
      
      The new SLOF version also includes a number of unrelated enhancements:
      support for booting from virtio-pci devices and e1000, greatly
      improved FCode support and many bugfixes.  It also makes SLOF ready to
      be used even when specifying a kernel on the qemu command line.
      Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4d8d5467
  9. 04 1月, 2012 1 次提交
    • A
      vmstate, memory: decouple vmstate from memory API · c5705a77
      Avi Kivity 提交于
      Currently creating a memory region automatically registers it for
      live migration.  This differs from other state (which is enumerated
      in a VMStateDescription structure) and ties the live migration code
      into the memory core.
      
      Decouple the two by introducing a separate API, vmstate_register_ram(),
      for registering a RAM block for migration.  Currently the same
      implementation is reused, but later it can be moved into a separate list,
      and registrations can be moved to VMStateDescription blocks.
      Signed-off-by: NAvi Kivity <avi@redhat.com>
      c5705a77
  10. 03 1月, 2012 2 次提交
  11. 18 11月, 2011 1 次提交
    • D
      pseries: Correct RAM size check for SLOF · 92c93a81
      David Gibson 提交于
      The SLOF firmware used on the pseries machine needs a reasonable amount of
      (guest) RAM in order to run, so we have a check in the machine init
      function to check that this is available.  However, SLOF runs in real mode
      (MMU off) which means it can only actually access the RMA (Real Mode Area),
      not all of RAM.  In many cases the RMA is the same as all RAM, but when
      running with Book3S HV KVM on PowerPC 970, the RMA must be especially
      allocated to be (host) physically contiguous.  In this case, the RMA size
      is determined by what the host admin allocated at boot time, and will
      usually be less than the whole guest RAM size.
      
      This patch corrects the test to see if SLOF has enough memory for this
      case.
      
      In addition, more recent versions of SLOF that were committed earlier don't
      need quite as much memory as earlier versions.  Therefore, this patch also
      reduces the amount of RAM we require to run SLOF.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      92c93a81
  12. 12 11月, 2011 1 次提交
    • D
      pseries: Fix initialization of sPAPREnvironment structure · d43b45e2
      David Gibson 提交于
      Since we added PCI support to the pseries machine, we include a qlist of
      PCI host bridges in the sPAPREnvironment structure.  However this list
      was never properly initialized it.  Somehow we got away with this until
      some other recent change broke it, and we now segfault immediately on
      startup.
      
      This patch adds the required QLIST_INIT(), and while we're at it makes sure
      we initialize the rest of the sPAPREnvironment structure to 0, to avoid
      future nasty surprises.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      d43b45e2
  13. 31 10月, 2011 6 次提交
    • D
      pseries: Add partial support for PCI · 3384f95c
      David Gibson 提交于
      This patch adds a PCI bus to the pseries machine.  This instantiates
      the qemu generic PCI bus code, advertises a PCI host bridge in the
      guest's device tree and implements the RTAS methods specified by PAPR
      to access PCI config space.  It also sets up the memory regions we
      need to provide windows into the PCI memory and IO space, and
      advertises those to the guest.
      
      However, because qemu can't yet emulate an IOMMU, which is mandatory on
      pseries, PCI devices which use DMA (i.e. most of them) will not work with
      this code alone.  Still, this is enough to support the virtio_pci device
      (which probably _should_ use emulated PCI DMA, but is specced to use
      direct hypervisor access to guest physical memory instead).
      
      [agraf] remove typedef which could cause compile errors
      Signed-off-by: NAlexey Kardashevskiy <aik@au1.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      3384f95c
    • D
      pseries: Correct vmx/dfp handling in both KVM and TCG cases · a7342588
      David Gibson 提交于
      Currently, when KVM is enabled, the pseries machine checks if the host
      CPU supports VMX, VSX and/or DFP instructions and advertises
      accordingly in the guest device tree.  It does this regardless of what
      CPU is selected on the command line.  On the other hand, when in TCG
      mode, it never advertises any of these facilities, even basic VMX
      (Altivec) which is supported in TCG.
      
      Now that we have a -cpu host option for ppc, it is fairly
      straightforward to fix both problems.  This patch changes the -cpu
      host code to override the basic cpu spec derived from the PVR with
      information queried from the host avout VMX, VSX and DFP capability.
      The pseries code then uses the instruction availability advertised in
      the cpu state to set the guest device tree correctly for both the KVM
      and TCG cases.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a7342588
    • D
      pseries: Under kvm use guest cpu = host cpu by default · 6b7a2cf6
      David Gibson 提交于
      Now that we've implemented -cpu host for ppc, this patch updates the
      pseries machine to use the host cpu as the guest cpu by default when
      running under KVM.  This is important because under KVM Book3S-HV the guest
      cpu _cannot_ be of a different type to the host cpu (at the moment
      KVM Book3S-HV will silently virtualize the host cpu instead of whatever was
      requested, but in future it is likely to simply refuse to run the VM if
      a cpu model other than the host's is requested).
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      6b7a2cf6
    • D
      pseries: Add device tree properties for VMX/VSX and DFP under kvm · 6659394f
      David Gibson 提交于
      Sufficiently recent PAPR specifications define properties "ibm,vmx"
      and "ibm,dfp" on the CPU node which advertise whether the VMX vector
      extensions (or the later VSX version) and/or the Decimal Floating
      Point operations from IBM's recent POWER CPUs are available.
      
      Currently we do not put these in the guest device tree and the guest
      kernel will consequently assume they are not available.  This is good,
      because they are not supported under TCG.  VMX is similar enough to
      Altivec that it might be trivial to support, but VSX and DFP would
      both require significant work to support in TCG.
      
      However, when running under kvm on a host which supports these
      instructions, there's no reason not to let the guest use them.  This
      patch, therefore, checks for the relevant support on the host CPU
      and, if present, advertises them to the guest as well.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      6659394f
    • D
      pseries: Allow KVM Book3S-HV on PPC970 CPUS · 354ac20a
      David Gibson 提交于
      At present, using the hypervisor aware Book3S-HV KVM will only work
      with qemu on POWER7 CPUs.  PPC970 CPUs also have hypervisor
      capability, but they lack the VRMA feature which makes assigning guest
      memory easier.
      
      In order to allow KVM Book3S-HV on PPC970, we need to specially
      allocate the first chunk of guest memory (the "Real Mode Area" or
      RMA), so that it is physically contiguous.
      
      Sufficiently recent host kernels allow such contiguous RMAs to be
      allocated, with a kvm capability advertising whether the feature is
      available and/or necessary on this hardware.  This patch enables qemu
      to use this support, thus allowing kvm acceleration of pseries qemu
      machines on PPC970 hardware.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      
      ---
      
      agraf: fix to use memory api
      354ac20a
    • D
      pseries: Support SMT systems for KVM Book3S-HV · e97c3636
      David Gibson 提交于
      Alex Graf has already made qemu support KVM for the pseries machine
      when using the Book3S-PR KVM variant (which runs the guest in
      usermode, emulating supervisor operations).  This code allows gets us
      very close to also working with KVM Book3S-HV (using the hypervisor
      capabilities of recent POWER CPUs).
      
      This patch moves us another step towards Book3S-HV support by
      correctly handling SMT (multithreaded) POWER CPUs.  There are two
      parts to this:
      
       * Querying KVM to check SMT capability, and if present, adjusting the
         cpu numbers that qemu assigns to cause KVM to assign guest threads
         to cores in the right way (this isn't automatic, because the POWER
         HV support has a limitation that different threads on a single core
         cannot be in different guests at the same time).
      
       * Correctly informing the guest OS of the SMT thread to core mappings
         via the device tree.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      e97c3636
  14. 17 10月, 2011 1 次提交
  15. 06 10月, 2011 8 次提交
    • D
      pseries: Refactor spapr irq allocation · e6c866d4
      David Gibson 提交于
      Paulo Bonzini changed the original spapr code, which manually assigned irq
      numbers for each virtual device, to allocate them automatically from the
      device initialization. That allowed spapr virtual devices to be constructed
      with -device, which is a good start.  However, the way that patch worked
      doesn't extend nicely for the future when we want to support devices other
      than sPAPR VIO devices (e.g. virtio and PCI).
      
      This patch rearranges the irq allocation to be global across the sPAPR
      environment, so it can be used by other bus types as well.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      e6c866d4
    • D
      pseries: Implement hcall-bulk hypervisor interface · a3d0abae
      David Gibson 提交于
      This patch adds support for the H_REMOVE_BULK hypercall on the pseries
      machine.  Strictly speaking this isn't necessarym since the kernel will
      only attempt to use this if hcall-bulk is advertised in the device tree,
      which previously it was not.
      
      Adding this support may give a marginal performance increase, but more
      importantly it reduces the differences between the emulated machine and
      an existing PowerVM or kvm system, both of which already implement
      hcall-bulk.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a3d0abae
    • N
      pseries: use macro for firmware filename · 68722054
      Nishanth Aravamudan 提交于
      For some time we've had a nicely defined macro with the filename for our
      firmware image.  However we didn't actually use it in the place we're
      supposed to.  This patch fixes it.
      Signed-off-by: NNishanth Aravamudan <nacc@us.ibm.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      68722054
    • D
      pseries: More complete WIMG validation in H_ENTER code · f73a2575
      David Gibson 提交于
      Currently our implementation of the H_ENTER hypercall, which inserts a
      mapping in the hash page table assumes that only ordinary memory is ever
      mapped, and only permits mapping attribute bits accordingly (WIMG==0010).
      
      However, we intend to start adding emulated IO to the pseries platform
      (and real IO with PCI passthrough on kvm) which means this simple test
      will no longer suffice.
      
      This patch extends the h_enter validation code to check if the given
      address is a RAM address.  If it is it enforces WIMG==0010, otherwise
      it assumes that it is an IO mapping and instead enforces WIMG=010x.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      f73a2575
    • D
      pseries: interrupt controller should not have a 'reg' property · 9dfef5aa
      David Gibson 提交于
      The interrupt controller presented in the device tree for the pseries
      machine is manipulated by the guest only through hypervisor calls.  It
      has no real or emulated registers for the guest to access.
      
      However, it currently has a bogus 'reg' property advertising a register
      window.  Moreover, this property has an invalid format, being a 32-bit
      zero, when the #address-cells property on the root bus indicates that it
      needs a 64-bit address.  Since the guest never attempts to manipulate
      the node directly, it works, but it is ugly and can cause warnings when
      manipulating the device tree in other tools (such as future firmware
      versions).
      
      This patch, therefore, corrects the problem by entirely removing the
      interrupt-controller node's 'reg' property.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9dfef5aa
    • D
      pseries: Add a phandle to the xicp interrupt controller device tree node · 0c103f8e
      David Gibson 提交于
      Future devices we will be adding to the pseries machine (e.g. PCI) will
      need nodes in the device tree which explicitly reference the top-level
      interrupt controller via interrupt-parent or interrupt-map properties.
      
      In order to do this, the interrupt controller node needs an assigned
      phandle.  This patch adds the appropriate property, in preparation.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      0c103f8e
    • A
      PPC: SPAPR: Use KVM function for time info · 0a8b2938
      Alexander Graf 提交于
      One of the things we can't fake on PPC is the timer speed. So
      we need to extract the frequency information from the host and
      put it back into the guest device tree.
      
      Luckily, we already have functions for that from the non-pseries
      targets, so all we need to do is to connect the dots and the guest
      suddenly gets to know its real timer speeds.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      0a8b2938
    • A
      PPC: Enable to use PAPR with PR style KVM · f61b4bed
      Alexander Graf 提交于
      When running PR style KVM, we need to tell the kernel that we want
      to run in PAPR mode now. This means that we need to pass some more
      register information down and enable papr mode. We also need to align
      the HTAB to htab_size boundary.
      
      Using this patch, -M pseries works with kvm even on non-hv kvm
      implementations, as long as the preceding kernel patches are in.
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      
      ---
      
      v1 -> v2:
      
        - match on CONFIG_PSERIES
      
      v2 -> v3:
      
        - remove HIOR pieces from PAPR patch (ABI breakage)
      f61b4bed