1. 07 6月, 2016 3 次提交
    • F
      blockdev-backup: Use bdrv_lookup_bs on target · 0d978913
      Fam Zheng 提交于
      This allows backing up to a BDS that has not been attached to any BB.
      Signed-off-by: NFam Zheng <famz@redhat.com>
      Message-id: 1463969978-24970-2-git-send-email-famz@redhat.com
      Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
      0d978913
    • S
      tests: avoid coroutine pool test crash · 271b385e
      Stefan Hajnoczi 提交于
      Skip the test_co_queue test case if the coroutine pool is not enabled.
      The test case does not work without the pool because it touches memory
      belonging to a freed coroutine (on purpose).
      Reported-by: NEduardo Habkost <ehabkost@redhat.com>
      Signed-off-by: NStefan Hajnoczi <stefanha@redhat.com>
      Reviewed-by: NFam Zheng <famz@redhat.com>
      Message-id: 1463767231-13379-1-git-send-email-stefanha@redhat.com
      271b385e
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160606-1' into staging · 76462405
      Peter Maydell 提交于
      target-arm queue:
       * support instruction syndrome info for data aborts from A64 to EL2
       * add HSTR_EL2 register
       * fix incorrect ESR IL bits in various syndrome register cases
       * virt: fix limit of 64-bit ACPI/ECAM PCI MMIO range
       * gicv2: RAZ/WI non-sec access to sec interrupts
       * i2c: add aspeed i2c controller
       * virt: Reject gic-version=host for non-KVM (don't segv on aarch64 host)
       * xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions
       * xlnx-zynqmp: Support KVM on AArch64 hosts
       * ptimer: Various fixes for awkward corner cases
       * char: QOMify various ARM UART models
       * char: get rid of qemu_char_get_next_serial
       * target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation
       * zynqmp: Add the ZCU102 board
      
      # gpg: Signature made Mon 06 Jun 2016 17:01:11 BST
      # gpg:                using RSA key 0x3C2525ED14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
      
      * remotes/pmaydell/tags/pull-target-arm-20160606-1: (25 commits)
        zynqmp: Add the ZCU102 board
        target-arm: Fix TTBR selecting logic on AArch32 Stage 2 translation
        char: get rid of qemu_char_get_next_serial
        hw/char: QOM'ify xilinx_uartlite model
        hw/char: QOM'ify stm32f2xx_usart model
        hw/char: QOM'ify digic-uart model
        hw/char: QOM'ify cadence_uart model
        hw/char: QOM'ify pl011 model
        hw/ptimer: Introduce ptimer_get_limit
        hw/ptimer: Support "on the fly" timer mode switch
        hw/ptimer: Update .delta on period/freq change
        hw/ptimer: Perform counter wrap around if timer already expired
        hw/ptimer: Fix issues caused by the adjusted timer limit value
        xlnx-zynqmp: Use the in kernel GIC model for KVM runs
        xlnx-zynqmp: Delay realization of GIC until post CPU realization
        xlnx-zynqmp: Make the RPU subsystem optional
        xlnx-zynqmp: Add a secure prop to en/disable ARM Security Extensions
        hw/arm/virt: Reject gic-version=host for non-KVM
        i2c: add aspeed i2c controller
        hw/intc/gic: RAZ/WI non-sec access to sec interrupts
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      76462405
  2. 06 6月, 2016 37 次提交