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  1. 05 3月, 2014 6 次提交
  3. 14 2月, 2014 1 次提交
  5. 20 12月, 2013 2 次提交
    • A
      powerpc: add PVR mask support · 3bc9ccc0
      由 Alexey Kardashevskiy 提交于 
      IBM POWERPC processors encode PVR as a CPU family in higher 16 bits and
a CPU version in lower 16 bits. Since there is no significant change
in behavior between versions, there is no point to add every single CPU
version in QEMU's CPU list. Also, new CPU versions of already supported
CPU won't break the existing code.

This adds PVR value/mask support for KVM, i.e. for -cpu host option.

As CPU family class name for POWER7 is "POWER7-family", there is no need
to touch aliases.
Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
Reviewed-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      3bc9ccc0
    • G
      target-ppc: add stubs for KVM breakpoints · c65f9a07
      由 Greg Kurz 提交于 
      The latest update to v3.13-rc3 (bf63839f) breaks the
ppc build with KVM:

kvm-all.o: In function `kvm_update_guest_debug':
kvm-all.c:1910: undefined reference to `kvm_arch_update_guest_debug'
kvm-all.o: In function `kvm_insert_breakpoint':
kvm-all.c:1937: undefined reference to `kvm_arch_insert_sw_breakpoint'
kvm-all.c:1945: undefined reference to `kvm_arch_insert_hw_breakpoint'
kvm-all.o: In function `kvm_remove_breakpoint':
kvm-all.c:1977: undefined reference to `kvm_arch_remove_sw_breakpoint'
kvm-all.c:1985: undefined reference to `kvm_arch_remove_hw_breakpoint'
kvm-all.o: In function `kvm_remove_all_breakpoints':
kvm-all.c:2009: undefined reference to `kvm_arch_remove_sw_breakpoint'
kvm-all.c:2006: undefined reference to `kvm_arch_remove_sw_breakpoint'
kvm-all.c:2017: undefined reference to `kvm_arch_remove_all_hw_breakpoints'

We need stubs until something gets implemented.
Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
Reviewed-by: NAlexander Graf <agraf@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      c65f9a07
  7. 26 10月, 2013 3 次提交
  9. 23 8月, 2013 1 次提交
  11. 30 7月, 2013 1 次提交
  13. 29 7月, 2013 2 次提交
  15. 10 7月, 2013 1 次提交
  17. 04 7月, 2013 1 次提交
  19. 01 7月, 2013 1 次提交
  21. 12 6月, 2013 1 次提交
    • S
      KVM: PPC: Add dummy kvm_arch_init_irq_routing() · 82169660
      由 Scott Wood 提交于 
      The common KVM code insists on calling kvm_arch_init_irq_routing()
as soon as it sees kernel header support for it (regardless of whether
QEMU supports it).  Provide a dummy function to satisfy this.

Unlike x86, PPC does not have one default irqchip, so there's no common
code that we'd stick here.  Even if you ignore the routes themselves,
which even on x86 are not set up in this function, the initial XICS
kernel implementation will not support IRQ routing, so it's best to
leave even the general feature flags up to the specific irqchip code.
Signed-off-by: NScott Wood <scottwood@freescale.com>
Signed-off-by: NAlexey Kardashevskiy <aik@ozlabs.ru>
Signed-off-by: NMichael Tokarev <mjt@tls.msk.ru>
      82169660
  23. 18 5月, 2013 1 次提交
  25. 27 4月, 2013 5 次提交
    • D
      target-ppc: Synchronize VPA state with KVM · 9b00ea49
      由 David Gibson 提交于 
      For PAPR guests, KVM tracks the various areas registered with the
H_REGISTER_VPA hypercall.  For full emulation, of course, these are tracked
within qemu.  At present these values are not synchronized.  This is a
problem for reset (qemu's reset of the VPA address is not pushed to KVM)
and will also be a problem for savevm / migration.

The kernel now supports accessing the VPA state via the ONE_REG interface,
this patch adds code to qemu to use that interface to keep the qemu and
KVM ideas of the VPA state synchronized.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      9b00ea49
    • D
      pseries: Fixes and enhancements to L1 cache properties · 0cbad81f
      由 David Gibson 提交于 
      PAPR requires that the device tree's CPU nodes have several properties
with information about the L1 cache.  We already create two of these
properties, but with incorrect names - "[id]cache-block-size" instead
of "[id]-cache-block-size" (note the extra hyphen).

We were also missing some of the required cache properties.  This
patch adds the [id]-cache-line-size properties (which have the same
values as the block size properties in all current cases).  We also
add the [id]-cache-size properties.

Adding the cache sizes requires some extra infrastructure in the
general target-ppc code to (optionally) set the cache sizes for
various CPUs.  The CPU family descriptions in translate_init.c can set
these sizes - this patch adds correct information for POWER7, I'm
leaving other CPU types to people who have a physical example to
verify against.  In addition, for -cpu host we take the values
advertised by the host (if available) and use those to override the
information based on PVR.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      0cbad81f
    • D
      pseries: Fix incorrect calculation of RMA size in certain configurations · f36951c1
      由 David Gibson 提交于 
      For the pseries machine, we need to advertise to the guest the size of its
RMA - that is the amount of memory it can access with the MMU off.  For HV
KVM, this is constrained by the hardware limitations on the virtual RMA of
one hash PTE per PTE group in the hash page table.  We already had code to
calculate this, but it was assuming the VRMA page size was the same as the
(host) backing page size for guest RAM.

In the case of a host kernel configured for 64k base page size, but running
on hardware (or firmware) which only allows 4k pages, the hose will do all
its allocations with a 64k page size, but still use 4k hardware pages for
actual mappings.  Usually that's transparent to things running under the
host, but in the case of the maximum VRMA size it's not.

This patch refines the RMA size calculation to instead use the largest
available hardware page size (as reported by the SMMU_INFO call) which is
less than or equal to the backing page size.  This now gives the correct
RMA size in all cases I've tested.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      f36951c1
    • B
      Enable kvm emulated watchdog · 31f2cb8f
      由 Bharat Bhushan 提交于 
      Enable the KVM emulated watchdog if KVM supports (use the
capability enablement in watchdog handler). Also watchdog exit
(KVM_EXIT_WATCHDOG) handling is added.
Watchdog state machine is cleared whenever VM state changes to running.
This is to handle the cases like return from debug halt etc.
Signed-off-by: NBharat Bhushan <bharat.bhushan@freescale.com>
[agraf: rebase to current code base, fix non-kvm cases]
Signed-off-by: NAlexander Graf <agraf@suse.de>
      31f2cb8f
    • S
      PPC: e500: advertise 4.2 MPIC only if KVM supports EPR · 3b961124
      由 Stuart Yoder 提交于 
      Older KVM versions don't support EPR which breaks guests when we announce
MPIC variants that support EPR.

Catch that case and expose only MPIC version 2.0 which tells the guest that
we don't support the EPR capability yet.
Signed-off-by: NStuart Yoder <stuart.yoder@freescale.com>
[agraf: Add comment, route cap check through kvm_ppc.c]
Signed-off-by: NAlexander Graf <agraf@suse.de>
      3b961124
  27. 09 4月, 2013 1 次提交
    • P
      hw: move headers to include/ · 0d09e41a
      由 Paolo Bonzini 提交于 
      Many of these should be cleaned up with proper qdev-/QOM-ification.
Right now there are many catch-all headers in include/hw/ARCH depending
on cpu.h, and this makes it necessary to compile these files per-target.
However, fixing this does not belong in these patches.
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
      0d09e41a
  29. 22 3月, 2013 2 次提交
    • D
      mmu-hash*: Add header file for definitions · d5aea6f3
      由 David Gibson 提交于 
      Currently cpu.h contains a number of definitions relating to the 64-bit
hash MMU.  Some are used in the MMU emulation code, but some are only used
in the spapr MMU management hcall implementations.

This patch moves these definitions (except for a few that are needed
more widely) into mmu-hash64.h header, shared between the MMU emulation
code and the spapr hcall code.  The MMU emulation code is also updated to
actually use a number of those definitions in place of hard coded
constants.

Similarly, we add new analogous definitions to mmu-hash32.h and use those
in place of many hard-coded constants in mmu-hash32.c
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
[agraf: fix 32-bit hosts]
Signed-off-by: NAlexander Graf <agraf@suse.de>
      d5aea6f3
    • D
      target-ppc: Remove CONFIG_PSERIES dependency in kvm.c · c6304a4a
      由 David Gibson 提交于 
      target-ppc/kvm.c has an #ifdef on CONFIG_PSERIES, for the handling of
KVM exits due to a PAPR hypercall from the guest.  However, since commit
e4c8b28c "ppc: express FDT dependency of
pSeries and e500 boards via default-configs/", this hasn't worked properly.
That patch altered the configuration setup so that although CONFIG_PSERIES
is visible from the Makefiles, it is not visible from C files.  This broke
the pseries machine when KVM is in use.

This patch makes a quick and dirty fix, by removing the CONFIG_PSERIES
dependency, replacing it with TARGET_PPC64 (since removing it entirely
leads to type mismatch errors).  Technically this breaks the build when
configured with --disable-fdt, since that disables CONFIG_PSERIES on
TARGET_PPC64.  However, it turns out the build was already broken in that
case, so this fixes pseries kvm without breaking anything extra.  I'm
looking into how to fix that build breakage, but I don't think that need
delay applying this patch.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      c6304a4a
  31. 12 3月, 2013 1 次提交
  33. 09 3月, 2013 4 次提交
    • A
      target-ppc: Make host CPU a subclass of the host's CPU model · 5ba4576b
      由 Andreas Färber 提交于 
      This avoids assigning individual class fields and contributors
forgetting to add field assignments in KVM-only code.

ppc_cpu_class_find_by_pvr() requires the CPU model classes to be
registered, so defer host CPU type registration to kvm_arch_init().

Only register the host CPU type if there is a class with matching PVR.
This lets us drop error handling from instance_init.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      5ba4576b
    • D
      target-ppc: Synchronize FPU state with KVM · 70b79849
      由 David Gibson 提交于 
      Currently qemu does not get and put the state of the floating point and
vector registers to KVM.  This is obviously a problem for savevm, as well
as possibly being problematic for debugging of FP-using guests.

This patch fixes this by using new extensions to the ONE_REG interface to
synchronize the qemu floating point state with KVM.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      70b79849
    • D
      target-ppc: Add mechanism for synchronizing SPRs with KVM · d67d40ea
      由 David Gibson 提交于 
      Currently when runing under KVM on ppc, we synchronize a certain number of
vital SPRs to KVM through the SET_SREGS call.  This leaves out quite a lot
of important SPRs which are maintained in KVM.  It would be helpful to
have their contents in qemu for debugging purposes, and when we implement
migration it will be vital, since they include important guest state that
will need to be restored on the target.

This patch sets up for synchronization of any registers supported by the
KVM ONE_REG calls.  A new variant on spr_register() allows a ONE_REG id to
be stored with the SPR information.  When we set/get information to KVM
we also synchronize any SPRs so registered.

For now we set this mechanism up to synchronize a handful of important
registers that already have ONE_REG IDs, notably the DAR and DSISR.
Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      d67d40ea
    • A
      target-ppc: Convert CPU definitions · cfe34f44
      由 Andreas Färber 提交于 
      Turn the array of model definitions into a set of self-registering QOM
types with their own class_init. Unique identifiers are obtained from
the combination of PVR, SVR and family identifiers; this requires all
alias #defines to be removed from the list. Possibly there are some more
left after this commit that are not currently being compiled.

Prepares for introducing abstract intermediate CPU types for families.

Keep the right-aligned macro line breaks within 78 chars to aid
three-way merges.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      cfe34f44
  35. 24 2月, 2013 1 次提交
  37. 27 1月, 2013 1 次提交
  39. 19 1月, 2013 1 次提交
  41. 15 1月, 2013 1 次提交
    • A
      cpu: Move cpu_index field to CPUState · 55e5c285
      由 Andreas Färber 提交于 
      Note that target-alpha accesses this field from TCG, now using a
negative offset. Therefore the field is placed last in CPUState.

Pass PowerPCCPU to [kvm]ppc_fixup_cpu() to facilitate this change.

Move common parts of mips cpu_state_reset() to mips_cpu_reset().

Acked-by: Richard Henderson <rth@twiddle.net> (for alpha)
[AF: Rebased onto ppc CPU subclasses and openpic changes]
Signed-off-by: NAndreas Färber <afaerber@suse.de>
      55e5c285
  43. 08 1月, 2013 2 次提交
    • A
      target-ppc: Error out for -cpu host on unknown PVR · 1b7ce68f
      由 Andreas Färber 提交于 
      Previously we silently exited, with subclasses we got an opcode warning.
Instead, explicitly tell the user what's wrong.

An indication for this is -cpu ? showing "host" with an all-zero PVR.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      1b7ce68f
    • A
      target-ppc: Slim conversion of model definitions to QOM subclasses · 2985b86b
      由 Andreas Färber 提交于 
      Since the model list is highly macrofied, keep ppc_def_t for now and
save a pointer to it in PowerPCCPUClass. This results in a flat list of
subclasses including aliases, to be refined later.

Move cpu_ppc_init() to translate_init.c and drop helper.c.
Long-term the idea is to turn translate_init.c into a standalone cpu.c.

Inline cpu_ppc_usable() into type registration.

Split cpu_ppc_register() in two by code movement into the initfn and
by turning the remaining part into a realizefn.
Move qemu_init_vcpu() call into the new realizefn and adapt
create_ppc_opcodes() to return an Error.

Change ppc_find_by_pvr() -> ppc_cpu_class_by_pvr().
Change ppc_find_by_name() -> ppc_cpu_class_by_name().

Turn -cpu host into its own subclass. This requires to move the
kvm_enabled() check in ppc_cpu_class_by_name() to avoid the class being
found via the normal name lookup in the !kvm_enabled() case.
Turn kvmppc_host_cpu_def() into the class_init and add an initfn that
asserts KVM is in fact enabled.

Implement -cpu ? and the QMP equivalent in terms of subclasses.
This newly exposes -cpu host to the user, ordered last for -cpu ?.
Signed-off-by: NAndreas Färber <afaerber@suse.de>
Signed-off-by: NAlexander Graf <agraf@suse.de>
      2985b86b