1. 03 7月, 2020 1 次提交
  2. 16 6月, 2020 2 次提交
  3. 27 2月, 2020 1 次提交
  4. 18 12月, 2019 1 次提交
  5. 30 10月, 2019 2 次提交
  6. 21 9月, 2019 1 次提交
  7. 16 8月, 2019 1 次提交
    • M
      Include hw/qdev-properties.h less · a27bd6c7
      Markus Armbruster 提交于
      In my "build everything" tree, changing hw/qdev-properties.h triggers
      a recompile of some 2700 out of 6600 objects (not counting tests and
      objects that don't depend on qemu/osdep.h).
      
      Many places including hw/qdev-properties.h (directly or via hw/qdev.h)
      actually need only hw/qdev-core.h.  Include hw/qdev-core.h there
      instead.
      
      hw/qdev.h is actually pointless: all it does is include hw/qdev-core.h
      and hw/qdev-properties.h, which in turn includes hw/qdev-core.h.
      Replace the remaining uses of hw/qdev.h by hw/qdev-properties.h.
      
      While there, delete a few superfluous inclusions of hw/qdev-core.h.
      
      Touching hw/qdev-properties.h now recompiles some 1200 objects.
      
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Cc: "Daniel P. Berrangé" <berrange@redhat.com>
      Cc: Eduardo Habkost <ehabkost@redhat.com>
      Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
      Reviewed-by: NEduardo Habkost <ehabkost@redhat.com>
      Message-Id: <20190812052359.30071-22-armbru@redhat.com>
      a27bd6c7
  8. 05 7月, 2019 1 次提交
    • P
      virtio-pci: Proxy for virtio-pmem · adf0748a
      Pankaj Gupta 提交于
      We need a proxy device for virtio-pmem, and this device has to be the
      actual memory device so we can cleanly hotplug it.
      
      Forward memory device class functions either to the actual device or use
      properties of the virtio-pmem device to implement these in the proxy.
      
      virtio-pmem will only be compiled for selected, supported architectures
      (that can deal with virtio/pci devices being memory devices). An
      architecture that is prepared for that can simply enable
      CONFIG_VIRTIO_PMEM to make it work.
      
      As not all architectures support memory devices (and CONFIG_VIRTIO_PMEM
      will be enabled per supported architecture), we have to move the PCI proxy
      to a separate file.
      Signed-off-by: NPankaj Gupta <pagupta@redhat.com>
      [ split up patches, memory-device changes, move pci proxy]
      Signed-off-by: NDavid Hildenbrand <david@redhat.com>
      Message-Id: <20190619094907.10131-5-pagupta@redhat.com>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      adf0748a
  9. 30 5月, 2019 2 次提交
    • D
      pci: Make is_bridge a bool · 91f4c995
      David Gibson 提交于
      The is_bridge field in PCIDevice acts as a bool, but is declared as an int.
      Declare it as a bool for clarity, and change everything that writes it to
      use true/false instead of 0/1 to match.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NGreg Kurz <groug@kaod.org>
      Message-Id: <20190513061939.3464-5-david@gibson.dropbear.id.au>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      91f4c995
    • D
      pcie: Simplify pci_adjust_config_limit() · 2f57db8a
      David Gibson 提交于
      Since c2077e2c "pci: Adjust PCI config limit based on bus topology",
      pci_adjust_config_limit() has been used in the config space read and write
      paths to only permit access to extended config space on buses which permit
      it.  Specifically it prevents access on devices below a vanilla-PCI bus via
      some combination of bridges, even if both the host bridge and the device
      itself are PCI-E.
      
      It accomplishes this with a somewhat complex call up the chain of bridges
      to see if any of them prohibit extended config space access.  This is
      overly complex, since we can always know if the bus will support such
      access at the point it is constructed.
      
      This patch simplifies the test by using a flag in the PCIBus instance
      indicating whether extended configuration space is accessible.  It is
      false for vanilla PCI buses.  For PCI-E buses, it is true for root
      buses and equal to the parent bus's's capability otherwise.
      
      For the special case of sPAPR's paravirtualized PCI root bus, which
      acts mostly like vanilla PCI, but does allow extended config space
      access, we override the default value of the flag from the host bridge
      code.
      
      This should cause no behavioural change.
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Reviewed-by: NGreg Kurz <groug@kaod.org>
      Message-Id: <20190513061939.3464-4-david@gibson.dropbear.id.au>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      2f57db8a
  10. 21 5月, 2019 1 次提交
  11. 26 4月, 2019 1 次提交
    • G
      spapr: Drop duplicate PCI swizzle code · e8ec4adf
      Greg Kurz 提交于
      LSI mapping in spapr currently open-codes standard PCI swizzling. It thus
      duplicates the code of pci_swizzle_map_irq_fn().
      
      Expose the swizzling formula so that it can be used with a slot number
      when building the device tree. Simply drop pci_spapr_map_irq() and call
      pci_swizzle_map_irq_fn() instead.
      Signed-off-by: NGreg Kurz <groug@kaod.org>
      Message-Id: <155448184841.8446.13959787238854054119.stgit@bahia.lan>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      e8ec4adf
  12. 09 4月, 2019 1 次提交
  13. 09 1月, 2019 1 次提交
    • M
      pci: allow cleanup/unregistration of PCI root buses · c13ee169
      Michael Roth 提交于
      This adds cleanup counterparts to pci_register_root_bus(),
      pci_root_bus_new(), and pci_bus_irqs().
      
      These cleanup routines are needed in the case of hotpluggable
      PCIHostBridge implementations. Currently we can rely on the
      object_unparent()'ing of the PCIHostState recursively unparenting
      and cleaning up it's child buses, but we need explicit calls
      to also:
      
        1) remove the PCIHostState from pci_host_bridges global list.
           otherwise, we risk accessing freed memory when we access
           the list later
        2) clean up memory allocated in pci_bus_irqs()
      
      Both are handled outside the context of any particular bus or
      host bridge's init/realize functions, making it difficult to
      avoid the need for explicit cleanup functions without remodeling
      how PCIHostBridges are created. So keep it simple and just add
      them for now.
      
      Cc: Michael S. Tsirkin <mst@redhat.com>
      Cc: Paolo Bonzini <pbonzini@redhat.com>
      Signed-off-by: NMichael Roth <mdroth@linux.vnet.ibm.com>
      Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au>
      Signed-off-by: NGreg Kurz <groug@kaod.org>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      c13ee169
  14. 20 12月, 2018 1 次提交
    • A
      pci: Sync PCIe downstream port LNKSTA on read · 727b4866
      Alex Williamson 提交于
      The PCIe link speed and width between a downstream device and its
      upstream port is negotiated on real hardware and susceptible to
      dynamic changes due to signal issues and power management.  In the
      emulated device case there is no real hardware link, but we still
      might wish to have some consistency between endpoint and downstream
      port via a virtual negotiation.  There is of course a real link for
      assigned devices and this same virtual negotiation allows the
      downstream port to match the endpoint, synchronizing on every read
      to support underlying physical hardware dynamically adjusting the
      link.
      
      This negotiation is intentionally unidirectional for compatibility.
      If the endpoint exceeds the capabilities of the downstream port or
      there is no endpoint device, the downstream port reports negotiation
      to its maximum speed and width, matching the previous case where
      negotiation was absent.  De-tuning the endpoint to match a virtual
      link doesn't seem to benefit anyone and is a condition we've thus
      far reported without functional issues.
      
      Note that PCI_EXP_LNKSTA is already ignored for migration
      compatibility via pcie_cap_v1_fill().
      
      Cc: Marcel Apfelbaum <marcel.apfelbaum@gmail.com>
      Tested-by: NGeoffrey McRae <geoff@hostfission.com>
      Reviewed-by: NEric Auger <eric.auger@redhat.com>
      Signed-off-by: NAlex Williamson <alex.williamson@redhat.com>
      Reviewed-by: NMichael S. Tsirkin <mst@redhat.com>
      Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
      727b4866
  15. 25 9月, 2018 2 次提交
  16. 23 5月, 2018 1 次提交
  17. 20 3月, 2018 1 次提交
  18. 18 3月, 2018 1 次提交
  19. 09 2月, 2018 1 次提交
  20. 06 12月, 2017 4 次提交
  21. 20 11月, 2017 1 次提交
  22. 13 11月, 2017 1 次提交
  23. 15 10月, 2017 1 次提交
  24. 08 9月, 2017 1 次提交
  25. 31 8月, 2017 1 次提交
  26. 04 7月, 2017 2 次提交
  27. 16 3月, 2017 2 次提交
  28. 01 3月, 2017 1 次提交
    • G
      spapr/pci: populate PCI DT in reverse order · a8eeafda
      Greg Kurz 提交于
      Since commit 1d2d9742 "spapr_pci: enumerate and add PCI device tree", QEMU
      populates the PCI device tree in the opposite order compared to SLOF.
      
      Before 1d2d9742:
      
      Populating /pci@800000020000000
                           00 0000 (D) : 1af4 1000    virtio [ net ]
                           00 0800 (D) : 1af4 1001    virtio [ block ]
                           00 1000 (D) : 1af4 1009    virtio [ network ]
      Populating /pci@800000020000000/unknown-legacy-device@2
      
      7e5294b8 :  /pci@800000020000000
      7e52b998 :  |-- ethernet@0
      7e52c0c8 :  |-- scsi@1
      7e52c7e8 :  +-- unknown-legacy-device@2 ok
      
      Since 1d2d9742:
      
      Populating /pci@800000020000000
                           00 1000 (D) : 1af4 1009    virtio [ network ]
      Populating /pci@800000020000000/unknown-legacy-device@2
                           00 0800 (D) : 1af4 1001    virtio [ block ]
                           00 0000 (D) : 1af4 1000    virtio [ net ]
      
      7e5e8118 :  /pci@800000020000000
      7e5ea6a0 :  |-- unknown-legacy-device@2
      7e5eadb8 :  |-- scsi@1
      7e5eb4d8 :  +-- ethernet@0 ok
      
      This behaviour change is not actually a bug since no assumptions should be
      made on DT ordering. But it has no real justification either, other than
      being the consequence of the way fdt_add_subnode() inserts new elements
      to the front of the FDT rather than adding them to the tail.
      
      This patch reverts to the historical SLOF ordering by walking PCI devices
      in reverse order. This reconciles pseries with x86 machine types behavior.
      It is expected to make things easier when porting existing applications to
      power.
      Signed-off-by: NGreg Kurz <gkurz@linux.vnet.ibm.com>
      Tested-by: NThomas Huth <thuth@redhat.com>
      Reviewed-by: NNikunj A Dadhania <nikunj@linux.vnet.ibm.com>
      (slight update to the changelog)
      Signed-off-by: NGreg Kurz <groug@kaod.org>
      Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
      a8eeafda
  29. 21 2月, 2017 2 次提交
    • M
      hw: Deprecate -drive if=scsi with non-onboard HBAs · a64aa578
      Markus Armbruster 提交于
      Block backends defined with "-drive if=T" with T other than "none" are
      meant to be picked up by machine initialization code: a suitable
      frontend gets created and wired up automatically.
      
      Drives defined with if=scsi are also picked up by SCSI HBAs added with
      -device, unlike other interface types.  Deprecate this usage, as follows.
      
      Create the frontends for onboard HBAs in machine initialization code,
      exactly like we do for if=ide and other interface types.  Change
      scsi_legacy_handle_cmdline() to create a frontend only when it's still
      missing, and warn that this usage is deprecated.
      Signed-off-by: NMarkus Armbruster <armbru@redhat.com>
      Message-Id: <1487161136-9018-3-git-send-email-armbru@redhat.com>
      a64aa578
    • G
      xhci: add qemu xhci controller · 72a810f4
      Gerd Hoffmann 提交于
      Turn existing TYPE_XHCI into an abstract base class.
      Create two child classes, TYPE_NEC_XHCI (same name as old xhci
      controller) and TYPE_QEMU_XHCI (using an ID from our namespace).
      Signed-off-by: NGerd Hoffmann <kraxel@redhat.com>
      Reviewed-by: NMarcel Apfelbaum <marcel@redhat.com>
      Message-id: 1486382139-30630-3-git-send-email-kraxel@redhat.com
      72a810f4
  30. 01 2月, 2017 1 次提交