- 02 4月, 2011 30 次提交
-
-
由 Stefan Weil 提交于
Load an optional QEMU icon file. If there is no icon file named qemu.bmp in QEMU's default search path, QEMU will run with the usual system default icon. A matching icon file will be loaded and used by X Windows managers or MS Windows while a QEMU instance is running. SDL requires icon files in 32x32x4 bmp format. Cc: Anthony Liguori <aliguori@us.ibm.com> Signed-off-by: NStefan Weil <weil@mail.berlios.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 Aurelien Jarno 提交于
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
-
由 David Gibson 提交于
Currently, the emulated pSeries machine requires the use of the -kernel parameter in order to explicitly load a guest kernel. This means booting from the virtual disk, cdrom or network is not possible. This patch addresses this limitation by inserting a within-partition firmware image (derived from the "SLOF" free Open Firmware project). If -kernel is not specified, qemu will now load the SLOF image, which has access to the qemu boot device list through the device tree, and can boot from any of the usual virtual devices. In order to support the new firmware, an extension to the emulated machine/hypervisor is necessary. Unlike Linux, which expects multi-CPU entry to be handled kexec() style, the SLOF firmware expects only one CPU to be active at entry, and to use a hypervisor RTAS method to enable the other CPUs one by one. This patch also implements this 'start-cpu' method, so that SLOF can start the secondary CPUs and marshal them into the kexec() holding pattern ready for entry into the guest OS. Linux should, and in the future might directly use the start-cpu method to enable initially disabled CPUs, but for now it does require kexec() entry. Signed-off-by: NBenjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Shared-processor partitions are those where a CPU is time-sliced between partitions, rather than being permanently dedicated to a single partition. qemu emulated partitions, since they are just scheduled with the qemu user process, behave mostly like shared processor partitions. In order to better support shared processor partitions (splpar), PAPR defines the "VPA" (Virtual Processor Area), a shared memory communication channel between the hypervisor and partitions. There are also two additional shared memory communication areas for specialized purposes associated with the VPA. A VPA is not essential for operating an splpar, though it can be necessary for obtaining accurate performance measurements in the presence of runtime partition switching. Most importantly, however, the VPA is a prerequisite for PAPR's H_CEDE, hypercall, which allows a partition OS to give up it's shared processor timeslices to other partitions when idle. This patch implements the VPA and H_CEDE hypercalls in qemu. We don't implement any of the more advanced statistics which can be communicated through the VPA. However, this is enough to make normal pSeries kernels do an effective power-save idle on an emulated pSeries, significantly reducing the host load of a qemu emulated pSeries running an idle guest OS. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Ben Herrenschmidt 提交于
Usually, PAPR virtual IO devices use a virtual IOMMU mechanism, TCEs, to mediate all DMA transfers. While this is necessary for some sorts of operation, it can be complex to program and slow for others. This patch implements a mechanism for bypassing TCE translation, treating "IO" addresses as plain (guest) physical memory addresses. This has two main uses: * Simple, but 64-bit aware programs like firmwares can use the VIO devices without the complexity of TCE setup. * The guest OS can optionally use the TCE bypass to improve performance in suitable situations. The mechanism used is a per-device flag which disables TCE translation. The flag is toggled with some (hypervisor-implemented) RTAS methods. Signed-off-by: NBen Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Ben Herrenschmidt 提交于
This patch implements the infrastructure and hypercalls necessary for the PAPR specified Virtual SCSI interface. This is the normal method for providing (virtual) disks to PAPR partitions. Signed-off-by: NBen Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Ben Herrenschmidt 提交于
This patch implements the infrastructure and hypercalls necessary for the PAPR specified CRQ (Command Request Queue) mechanism. This general request queueing system is used by many of the PAPR virtual IO devices, including the virtual scsi adapter. Signed-off-by: NBen Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This patch implements the PAPR specified Inter Virtual Machine Logical LAN; that is the virtual hardware used by the Linux ibmveth driver. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This patch implements the necessary infrastructure and hypercalls for sPAPR's TCE (Translation Control Entry) IOMMU mechanism. This is necessary for all virtual IO devices which do DMA (i.e. nearly all of them). Signed-off-by: NBen Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Now that we have implemented the PAPR "xics" virtualized interrupt controller, we can add interrupts in PAPR VIO devices. This patch adds interrupt support to the PAPR virtual tty/console device. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This patch adds infrastructure to support interrupts from PAPR virtual IO devices. This includes correctly advertising those interrupts in the device tree, and implementing the H_VIO_SIGNAL hypercall, used to enable and disable individual device interrupts. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
PAPR defines an interrupt control architecture which is logically divided into ICS (Interrupt Control Presentation, each unit is responsible for presenting interrupts to a particular "interrupt server", i.e. CPU) and ICS (Interrupt Control Source, each unit responsible for one or more hardware interrupts as numbered globally across the system). All PAPR virtual IO devices expect to deliver interrupts via this mechanism. In Linux, this interrupt controller system is handled by the "xics" driver. On pSeries systems, access to the interrupt controller is virtualized via hypercalls and RTAS methods. However, the virtualized interface is very similar to the underlying interrupt controller hardware, and similar PICs exist un-virtualized in some other systems. This patch implements both the ICP and ICS sides of the PAPR interrupt controller. For now, only the hypercall virtualized interface is provided, however it would be relatively straightforward to graft an emulated register interface onto the underlying interrupt logic if we want to add a machine with a hardware ICS/ICP system in the future. There are some limitations in this implementation: it is assumed for now that only one instance of the ICS exists, although a full xics system can have several, each responsible for a different group of hardware irqs. ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI) interrupt inputs. For now, this implementation supports only MSI interrupts, since that is used by PAPR virtual IO devices. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This patch adds several small utility hypercalls and RTAS methods to the pSeries platform emulation. Specifically: * 'display-character' rtas call This just prints a character to the console, it's occasionally used for early debug of the OS. The support includes a hack to make this RTAS call respond on the normal token value present on real hardware, since some early debugging tools just assume this value without checking the device tree. * 'get-time-of-day' rtas call This one just takes the host real time, converts to the PAPR described format and returns it to the guest. * 'power-off' rtas call This one shuts down the emulated system. * H_DABR hypercall On pSeries, the DABR debug register is usually a hypervisor resource and virtualized through this hypercall. If the hypercall is not present, Linux will under some circumstances attempt to manipulate the DABR directly which will fail on this emulated machine. This stub implementation is enough to stop that behaviour, although it doesn't actually implement the requested DABR operations as yet. Signed-off-by: NPaul Mackerras <paulus@samba.org> Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
On pSeries machines, operating systems can instantiate "RTAS" (Run-Time Abstraction Services), a runtime component of the firmware which implements a number of low-level, infrequently used operations. On logical partitions under a hypervisor, many of the RTAS functions require hypervisor privilege. For simplicity, therefore, hypervisor systems typically implement the in-partition RTAS as just a tiny wrapper around a hypercall which actually implements the various RTAS functions. This patch implements such a hypercall based RTAS for our emulated pSeries machine. A tiny in-partition "firmware" calls a new hypercall, which looks up available RTAS services in a table. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
On pSeries logical partitions, excepting the old POWER4-style full system partitions, the guest does not have direct access to the hardware page table. Instead, the pagetable exists in hypervisor memory, and the guest must manipulate it with hypercalls. However, our current pSeries emulation more closely resembles the old style where the guest must set up and handle the pagetables itself. This patch converts it to act like a modern partition. This involves two things: first, the hash translation path is modified to permit the has table to be stored externally to the emulated machine's RAM. The pSeries machine init code configures the CPUs to use this mode. Secondly, we emulate the PAPR hypercalls for manipulating the external hashed page table. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This extends the "pseries" (PAPR) machine to include a virtual IO bus supporting the PAPR defined hypercall based virtual IO mechanisms. So far only one VIO device is provided, the vty / vterm, providing a full console (polled only, for now). Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This patch adds a "pseries" machine to qemu. This aims to emulate a logical partition on an IBM pSeries machine, compliant to the "PowerPC Architecture Platform Requirements" (PAPR) document. This initial version is quite limited, it implements a basic machine and PAPR hypercall emulation. So far only one hypercall is present - H_PUT_TERM_CHAR - so that a (write-only) console is available. Multiple CPUs are permitted, with SMP entry handled kexec() style. The machine so far more resembles an old POWER4 style "full system partition" rather than a modern LPAR, in that the guest manages the page tables directly, rather than via hypercalls. The machine requires qemu to be configured with --enable-fdt. The machine can (so far) only be booted with -kernel - i.e. no partition firmware is provided. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
This adds emulation support for the recent POWER7 cpu to qemu. It's far from perfect - it's missing a number of POWER7 features so far, including any support for VSX or decimal floating point instructions. However, it's close enough to boot a kernel with the POWER7 PVR. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Traditionally, the "segments" used for the two-stage translation used on powerpc MMUs were 256MB in size. This was the only option on all hash page table based 32-bit powerpc cpus, and on the earlier 64-bit hash page table based cpus. However, newer 64-bit cpus also permit 1TB segments This patch adds support for 1TB segment translation to the qemu code. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Currently the path handling hash page table translation in get_segment() has a mix of common and 32 or 64 bit specific code. However the division is not done terribly well which results in a lot of messy code flipping between common and divided paths. This patch improves the organization, consolidating several divided paths into one. This in turn allows simplification of some code in get_segment(), removing a number of ugly interim variables. This new factorization will also make it easier to add support for the 1T segments added in newer CPUs. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Currently, get_segment() has a variable called hash. However it doesn't (quite) get the hash value for the ppc hashed page table. Instead it gets the hash shifted - effectively the offset of the hash bucket within the hash page table. As well, as being different to the normal use of plain "hash" in the architecture documentation, this usage necessitates some awkward 32/64 dependent masks and shifts which clutter up the path in get_segment(). This patch alters the code to use raw hash values through get_segment() including storing raw hashes instead of pte group offsets in the ctx structure. This cleans up the path noticeably. This does necessitate 32/64 dependent shifts when the hash values are taken out of the ctx structure and used, but those paths already have 32/64 bit variants so this is less awkward than it was in get_segment(). Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
On ppc machines with hash table MMUs, the special purpose register SDR1 contains both the base address of the encoded size (hashed) page tables. At present, we interpret the SDR1 value within the address translation path. But because the encodings of the size for 32-bit and 64-bit are different this makes for a confusing branch on the MMU type with a bunch of curly shifts and masks in the middle of the translate path. This patch cleans things up by moving the interpretation on SDR1 into the helper function handling the write to the register. This leaves a simple pre-sanitized base address and mask for the hash table in the CPUState structure which is easier to work with in the translation path. This makes the translation path more readable. It addresses the FIXME comment currently in the mtsdr1 helper, by validating the SDR1 value during interpretation. Finally it opens the way for emulating a pSeries-style partition where the hash table used for translation is not mapped into the guests's RAM. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
The slb_lookup() function, used in the ppc translation path returns a number of slb entry fields in reference parameters. However, only one of the two callers of slb_lookup() actually wants this information. This patch, therefore, makes slb_lookup() return a simple pointer to the located SLB entry (or NULL), and the caller which needs the fields can extract them itself. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
qemu already includes support for the popcntb instruction introduced in POWER5 (although it doesn't actually allow you to choose POWER5). However, the logic is slightly incorrect: it will generate results truncated to 32-bits when the CPU is in 32-bit mode. This is not normal for powerpc - generally arithmetic instructions on a 64-bit powerpc cpu will generate full 64 bit results, it's just that only the low 32 bits will be significant for condition codes. This patch corrects this nit, which actually simplifies the code slightly. In addition, this patch implements the popcntw and popcntd instructions added in POWER7, in preparation for allowing POWER7 as an emulated CPU. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
The PURR (Processor Utilization Resource Register) is a register found on recent POWER CPUs. The guts of implementing it at least enough to get by are already present in qemu, however some of the helper functions needed to actually wire it up are missing. This patch adds the necessary glue, so that the PURR can be wired up when we implement newer POWER CPU targets which include it. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
For a 64-bit PowerPC target, qemu correctly implements translation through the segment lookaside buffer. Likewise it supports the slbmte instruction which is used to load entries into the SLB. However, it does not emulate the slbmfee and slbmfev instructions which read SLB entries back into registers. Because these are only occasionally used in guests (mostly for debugging) we get away with it. However, given the recent SLB cleanups, it becomes quite easy to implement these, and thereby allow, amongst other things, a guest Linux to use xmon's command to dump the SLB. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
PowerPC and POWER chips since the POWER4 and 970 have a special hypervisor mode, and a corresponding form of the system call instruction which traps to the hypervisor. qemu currently has stub implementations of hypervisor mode. That is, the outline is there to allow qemu to run a PowerPC hypervisor under emulation. There are a number of details missing so this won't actually work at present, but the idea is there. What there is no provision at all, is for qemu to instead emulate the hypervisor itself. That is to have hypercalls trap into qemu and their result be emulated from qemu, rather than running hypervisor code within the emulated system. Hypervisor hardware aware KVM implementations are in the works and it would be useful for debugging and development to also allow full emulation of the same para-virtualized guests as such a KVM. Therefore, this patch adds a hook which will allow a machine to set up emulation of hypervisor calls. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Currently qemu_devtree_setprop() expects the new property value to be given as a uint32_t *. While property values consisting of u32s are common, in general they can have any bytestring value. Therefore, this patch alters the function to take a void * instead, allowing callers to easily give anything as the property value. Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 David Gibson 提交于
Currently the SLB information when emulating a PowerPC 970 is storeed in a structure with the unhelpfully named fields 'tmp' and 'tmp64'. While the layout in these fields does match the description of the SLB in the architecture document, it is not convenient either for looking up the SLB, or for emulating the slbmte instruction. This patch, therefore, reorganizes the SLB entry structure to be divided in the the "ESID related" and "VSID related" fields as they are divided in instructions accessing the SLB. In addition to making the code smaller and more readable, this will make it easier to implement for the 1TB segments used in more recent PowerPC chips. Signed-off-by: NDavid Gibson <dwg@au1.ibm.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
由 Aurelien Jarno 提交于
Cc: Alexander Graf <agraf@suse.de> Signed-off-by: NAurelien Jarno <aurelien@aurel32.net> Signed-off-by: NAlexander Graf <agraf@suse.de>
-
- 31 3月, 2011 2 次提交
-
-
由 Michael Walle 提交于
Instead of a for loop use a faster lookup table. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
-
由 Michael Walle 提交于
To be consistent with the new reference manual. Signed-off-by: NMichael Walle <michael@walle.cc> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
-
- 29 3月, 2011 8 次提交
-
-
由 Paolo Bonzini 提交于
SLIRP -smb support wants to fork a process and forget about reaping it. To please it, add a generic service to register a process id and let QEMU reap it. In the future it could be enhanced to pass a status, but this would be unused. With this in place, the SIGCHLD signal handler would not stomp on pclose anymore. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
-
由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
-
由 Michael S. Tsirkin 提交于
vhost was passing a physical address to cpu_physical_memory_set_dirty, which is wrong: we need to translate to ram address first. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Note: this lead to crashes during migration, so the patch is needed on the stable branch too.
-
由 Michael S. Tsirkin 提交于
Fix crash on invalid input in virtio-serial. Discovered by code review, untested. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-
由 Michael S. Tsirkin 提交于
Reduce spurious packet drops on RX ring empty by verifying that we have at least 1 buffer ahead of the time. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-
由 Michael S. Tsirkin 提交于
Commit c81131db detects old guests by comparing virtio and PCI status. It attempts to do this on load, as well, but load_config callback in a binding is invoked too early and so the virtio status isn't set yet. We could add yet another callback to the binding, to invoke after load, but it seems easier to reuse the existing vmstate callback. Signed-off-by: NMichael S. Tsirkin <mst@redhat.com> Cc: Alexander Graf <agraf@suse.de>
-
由 Isaku Yamahata 提交于
use uint8_t for devfn_min instead of int. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-
由 Isaku Yamahata 提交于
Replace hardcoded logic by a common macro. Signed-off-by: NIsaku Yamahata <yamahata@valinux.co.jp> Signed-off-by: NMichael S. Tsirkin <mst@redhat.com>
-