1. 24 10月, 2016 3 次提交
  2. 23 10月, 2016 2 次提交
  3. 21 10月, 2016 22 次提交
  4. 20 10月, 2016 2 次提交
    • P
      Merge remote-tracking branch 'remotes/berrange/tags/pull-qcrypto-2016-10-20-1' into staging · da158a86
      Peter Maydell 提交于
      Merge qcrypto 2016/10/20 v1
      
      # gpg: Signature made Thu 20 Oct 2016 12:58:41 BST
      # gpg:                using RSA key 0xBE86EBB415104FDF
      # gpg: Good signature from "Daniel P. Berrange <dan@berrange.com>"
      # gpg:                 aka "Daniel P. Berrange <berrange@redhat.com>"
      # Primary key fingerprint: DAF3 A6FD B26B 6291 2D0E  8E3F BE86 EBB4 1510 4FDF
      
      * remotes/berrange/tags/pull-qcrypto-2016-10-20-1:
        crypto: fix initialization of gcrypt threading
        crypto: fix initialization of crypto in tests
        qtest: fix make check complaint in crypto module
        crypto: add mode check in qcrypto_cipher_new() for cipher-builtin
        crypto: add CTR mode support
        crypto: extend mode as a parameter in qcrypto_cipher_supports()
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      da158a86
    • D
      crypto: fix initialization of gcrypt threading · 37316663
      Daniel P. Berrange 提交于
      The gcrypt threads implementation must be set before calling
      any other gcrypt APIs, especially gcry_check_version(),
      since that triggers initialization of the random pool. After
      that is initialized, changes to the threads impl won't be
      honoured by the random pool code. This means that gcrypt
      will think thread locking is needed and so try to acquire
      the random pool mutex, but this is NULL as no threads impl
      was set originally. This results in a crash in the random
      pool code.
      
      For the same reasons, we must set the gcrypt threads impl
      before calling gnutls_init, since that will also trigger
      gcry_check_version
      Reviewed-by: NEric Blake <eblake@redhat.com>
      Signed-off-by: NDaniel P. Berrange <berrange@redhat.com>
      37316663
  5. 19 10月, 2016 5 次提交
  6. 18 10月, 2016 6 次提交
    • P
      Merge remote-tracking branch 'remotes/awilliam/tags/vfio-updates-20161017.0' into staging · 1b0d3845
      Peter Maydell 提交于
      VFIO updates 2016-10-17
      
       - Convert to realize & improve error reporting (Eric Auger)
       - RTL quirk bug fix (Thorsten Kohfeldt)
       - Skip duplicate pre/post reset (Cao jin)
      
      # gpg: Signature made Mon 17 Oct 2016 20:42:44 BST
      # gpg:                using RSA key 0x239B9B6E3BB08B22
      # gpg: Good signature from "Alex Williamson <alex.williamson@redhat.com>"
      # gpg:                 aka "Alex Williamson <alex@shazbot.org>"
      # gpg:                 aka "Alex Williamson <alwillia@redhat.com>"
      # gpg:                 aka "Alex Williamson <alex.l.williamson@gmail.com>"
      # Primary key fingerprint: 42F6 C04E 540B D1A9 9E7B  8A90 239B 9B6E 3BB0 8B22
      
      * remotes/awilliam/tags/vfio-updates-20161017.0:
        vfio: fix duplicate function call
        vfio/pci: Fix vfio_rtl8168_quirk_data_read address offset
        vfio/pci: Handle host oversight
        vfio/pci: Remove vfio_populate_device returned value
        vfio/pci: Remove vfio_msix_early_setup returned value
        vfio/pci: Conversion to realize
        vfio/platform: Pass an error object to vfio_base_device_init
        vfio/platform: fix a wrong returned value in vfio_populate_device
        vfio/platform: Pass an error object to vfio_populate_device
        vfio: Pass an error object to vfio_get_device
        vfio: Pass an error object to vfio_get_group
        vfio: Pass an Error object to vfio_connect_container
        vfio/pci: Pass an error object to vfio_pci_igd_opregion_init
        vfio/pci: Pass an error object to vfio_add_capabilities
        vfio/pci: Pass an error object to vfio_intx_enable
        vfio/pci: Pass an error object to vfio_msix_early_setup
        vfio/pci: Pass an error object to vfio_populate_device
        vfio/pci: Pass an error object to vfio_populate_vga
        vfio/pci: Use local error object in vfio_initfn
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      1b0d3845
    • P
      Merge remote-tracking branch 'remotes/ehabkost/tags/machine-pull-request' into staging · f525c8a6
      Peter Maydell 提交于
      machine + memory backend queue, 2016-10-17
      
      # gpg: Signature made Mon 17 Oct 2016 18:54:57 BST
      # gpg:                using RSA key 0x2807936F984DC5A6
      # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
      # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6
      
      * remotes/ehabkost/tags/machine-pull-request:
        hostmem-file: Register TYPE_MEMORY_BACKEND_FILE properties as class properties
        hostmem: Register TYPE_MEMORY_BACKEND properties as class properties
        pc: Register TYPE_PC_MACHINE properties as class properties
        machine: Register TYPE_MACHINE properties as class properties
        machine: Fix replacement of '_' by '-' in machine property names
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      f525c8a6
    • P
      Merge remote-tracking branch 'remotes/ehabkost/tags/x86-pull-request' into staging · e8ddc2ea
      Peter Maydell 提交于
      x86 queue, 2016-10-17
      
      # gpg: Signature made Mon 17 Oct 2016 18:51:07 BST
      # gpg:                using RSA key 0x2807936F984DC5A6
      # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>"
      # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6
      
      * remotes/ehabkost/tags/x86-pull-request: (21 commits)
        target-i386: Don't use cpu->migratable when filtering features
        target-i386: Return runnability information on query-cpu-definitions
        target-i386: x86_cpu_load_features() function
        target-i386: Unset cannot_destroy_with_object_finalize_yet
        target-i386/kvm: cache the return value of kvm_enable_x2apic()
        intel_iommu: reject broken EIM
        intel_iommu: add OnOffAuto intr_eim as "eim" property
        intel_iommu: redo configuraton check in realize
        intel_iommu: pass whole remapped addresses to apic
        apic: add send_msi() to APICCommonClass
        apic: add global apic_get_class()
        target-i386: Move warning code outside x86_cpu_filter_features()
        qmp: Add runnability information to query-cpu-definitions
        target-i386: xsave: Add FP and SSE bits to x86_ext_save_areas
        target-i386: Register properties for feature aliases manually
        target-i386: Remove underscores from feat_names arrays
        target-i386: Make plus_features/minus_features QOM-based
        target-i386: Register aliases for feature names with underscores
        target-i386: Disable VME by default with TCG
        target-i386: List CPU models using subclass list
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      e8ddc2ea
    • P
      Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20161017' into staging · 2d02ac10
      Peter Maydell 提交于
      target-arm:
       * target-arm: kvm: use AddressSpace-specific listener
       * aspeed: add SMC controllers
       * hw/arm/boot: allow using a command line specified dtb without a kernel
       * hw/dma/pl080: Fix bad bit mask
       * hw/intc/arm_gic_kvm: Fix build on aarch64 with some compilers
       * hw/arm/virt: fix ACPI tables for ITS
       * tests: add a m25p80 test
       * tests: cleanup ptimer-test
       * pxa2xx: Auto-assign name for i2c bus in i2c_init_bus
       * target-arm: handle tagged addresses in A64 code
       * target-arm: Fix masking of PC lower bits when doing exception returns
       * target-arm: Implement dummy MDCCINT_EL1
       * target-arm: Add trace events for the generic timers
       * hw/intc/arm_gicv3: Fix ICC register tracepoints
       * hw/char/pl011: Add trace events
      
      # gpg: Signature made Mon 17 Oct 2016 19:39:42 BST
      # gpg:                using RSA key 0x3C2525ED14360CDE
      # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
      # gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
      # gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
      # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE
      
      * remotes/pmaydell/tags/pull-target-arm-20161017: (25 commits)
        hw/char/pl011: Add trace events
        hw/intc/arm_gicv3: Fix ICC register tracepoints
        target-arm: Add trace events for the generic timers
        target-arm: Implement dummy MDCCINT_EL1
        Fix masking of PC lower bits when doing exception returns
        target-arm: Comments added to identify cases in a switch
        target-arm: Code changes to implement overwrite of tag field on PC load
        target-arm: Infrastucture changes to enable handling of tagged address loading into PC
        pxa2xx: Auto-assign name for i2c bus in i2c_init_bus.
        tests: cleanup ptimer-test
        tests: add a m25p80 test
        hw/arm/virt: no ITS on older machine types
        hw/arm/virt-acpi-build: fix MADT generation
        hw/intc/arm_gic_kvm: Fix build on aarch64
        hw/dma/pl080: Fix bad bit mask (PL080_CONF_M1 | PL080_CONF_M1)
        hw/arm/boot: allow using a command line specified dtb without a kernel
        aspeed: add support for the SMC segment registers
        aspeed: create mapping regions for the maximum number of slaves
        aspeed: add support for the AST2500 SoC SMC controllers
        aspeed: extend the number of host SPI controllers
        ...
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      2d02ac10
    • P
      hw/char/pl011: Add trace events · 041ac056
      Peter Maydell 提交于
      Add some trace events for the pl011 UART model.
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Message-id: 1476294876-12340-5-git-send-email-peter.maydell@linaro.org
      041ac056
    • P
      hw/intc/arm_gicv3: Fix ICC register tracepoints · 081b1b98
      Peter Maydell 提交于
      Fix some problems with the tracepoints for ICC register reads
      and writes:
       * tracepoints for ICC_BPR<n>, ICC_AP<n>R<x>, ICC_IGRPEN<n>,
         ICC_EIOR<n> were not printing the <n> that indicated whether
         the access was to the group 0 or 1 register
       * the ICC_IGREPEN1_EL3 read function was not actually calling
         the associated tracepoint
       * the ICC_BPR<n> write function was incorrectly calling the
         tracepoint for ICC_PMR writes
      Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
      Acked-by: NEdgar E. Iglesias <edgar.iglesias@xilinx.com>
      Message-id: 1476294876-12340-4-git-send-email-peter.maydell@linaro.org
      081b1b98