1. 13 7月, 2011 1 次提交
  2. 08 4月, 2011 1 次提交
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      Delay creation of pseries device tree until reset · a3467baa
      David Gibson 提交于
      At present, the 'pseries' machine creates a flattened device tree in the
      machine->init function to pass to either the guest kernel or to firmware.
      
      However, the machine->init function runs before processing of -device
      command line options, which means that the device tree so created will
      be (incorrectly) missing devices specified that way.
      
      Supplying a correct device tree is, in any case, part of the required
      platform entry conditions.  Therefore, this patch moves the creation and
      loading of the device tree from machine->init to a reset callback.  The
      setup of entry point address and initial register state moves with it,
      which leads to a slight cleanup.
      
      This is not, alas, quite enough to make a fully working reset for pseries.
      For that we would need to reload the firmware images, which on this
      machine are loaded into RAM.  It's a step in the right direction, though.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      a3467baa
  3. 02 4月, 2011 4 次提交
    • D
      Implement the PAPR (pSeries) virtualized interrupt controller (xics) · b5cec4c5
      David Gibson 提交于
      PAPR defines an interrupt control architecture which is logically divided
      into ICS (Interrupt Control Presentation, each unit is responsible for
      presenting interrupts to a particular "interrupt server", i.e. CPU) and
      ICS (Interrupt Control Source, each unit responsible for one or more
      hardware interrupts as numbered globally across the system).  All PAPR
      virtual IO devices expect to deliver interrupts via this mechanism.  In
      Linux, this interrupt controller system is handled by the "xics" driver.
      
      On pSeries systems, access to the interrupt controller is virtualized via
      hypercalls and RTAS methods.  However, the virtualized interface is very
      similar to the underlying interrupt controller hardware, and similar PICs
      exist un-virtualized in some other systems.
      
      This patch implements both the ICP and ICS sides of the PAPR interrupt
      controller.  For now, only the hypercall virtualized interface is provided,
      however it would be relatively straightforward to graft an emulated
      register interface onto the underlying interrupt logic if we want to add
      a machine with a hardware ICS/ICP system in the future.
      
      There are some limitations in this implementation: it is assumed for now
      that only one instance of the ICS exists, although a full xics system can
      have several, each responsible for a different group of hardware irqs.
      ICP/ICS can handle both level-sensitve (LSI) and message signalled (MSI)
      interrupt inputs.  For now, this implementation supports only MSI
      interrupts, since that is used by PAPR virtual IO devices.
      Signed-off-by: NPaul Mackerras <paulus@samba.org>
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      b5cec4c5
    • D
      Implement hcall based RTAS for pSeries machines · 39ac8455
      David Gibson 提交于
      On pSeries machines, operating systems can instantiate "RTAS" (Run-Time
      Abstraction Services), a runtime component of the firmware which implements
      a number of low-level, infrequently used operations.  On logical partitions
      under a hypervisor, many of the RTAS functions require hypervisor
      privilege.  For simplicity, therefore, hypervisor systems typically
      implement the in-partition RTAS as just a tiny wrapper around a hypercall
      which actually implements the various RTAS functions.
      
      This patch implements such a hypercall based RTAS for our emulated pSeries
      machine.  A tiny in-partition "firmware" calls a new hypercall, which
      looks up available RTAS services in a table.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      39ac8455
    • D
      Implement the bus structure for PAPR virtual IO · 4040ab72
      David Gibson 提交于
      This extends the "pseries" (PAPR) machine to include a virtual IO bus
      supporting the PAPR defined hypercall based virtual IO mechanisms.
      
      So far only one VIO device is provided, the vty / vterm, providing
      a full console (polled only, for now).
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      4040ab72
    • D
      Start implementing pSeries logical partition machine · 9fdf0c29
      David Gibson 提交于
      This patch adds a "pseries" machine to qemu.  This aims to emulate a
      logical partition on an IBM pSeries machine, compliant to the
      "PowerPC Architecture Platform Requirements" (PAPR) document.
      
      This initial version is quite limited, it implements a basic machine
      and PAPR hypercall emulation.  So far only one hypercall is present -
      H_PUT_TERM_CHAR - so that a (write-only) console is available.
      
      Multiple CPUs are permitted, with SMP entry handled kexec() style.
      
      The machine so far more resembles an old POWER4 style "full system
      partition" rather than a modern LPAR, in that the guest manages the
      page tables directly, rather than via hypercalls.
      
      The machine requires qemu to be configured with --enable-fdt.  The
      machine can (so far) only be booted with -kernel - i.e. no partition
      firmware is provided.
      Signed-off-by: NDavid Gibson <dwg@au1.ibm.com>
      Signed-off-by: NAlexander Graf <agraf@suse.de>
      9fdf0c29