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  1. 05 11月, 2008 1 次提交
  3. 29 9月, 2008 1 次提交
    • P
      My core2duo patch introduced a vague statement of "missing features" in · 558fa836
      由 pbrook 提交于 
      the CPUID specification. This patch addresses this by specifying exactly 
what is missing.
While going along the missing CPUID entries I also stumbled across 
invalid and missing CPUID #defines while comparing them to the Intel 
Documentation. This patch also addresses these. I found them too minor 
to split them up in a separate patch.

Furthermore I looked through CPUID functions > 5 and realized that it 
should be safe to bump the level to 10. I tried booting Linux with that 
and it worked fine.
Signed-off-by: NAlexander Graf <agraf@suse.de>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5350 c046a42c-6fe2-441c-8c8c-71466251a162
      558fa836
  5. 27 9月, 2008 1 次提交
  7. 26 9月, 2008 3 次提交
  9. 02 7月, 2008 1 次提交
  11. 01 7月, 2008 1 次提交
  13. 29 6月, 2008 1 次提交
  15. 05 6月, 2008 3 次提交
  17. 04 6月, 2008 2 次提交
  19. 31 5月, 2008 2 次提交
  21. 29 5月, 2008 3 次提交
  23. 28 5月, 2008 1 次提交
  25. 26 5月, 2008 1 次提交
  27. 17 5月, 2008 1 次提交
  29. 13 5月, 2008 1 次提交
  31. 23 4月, 2008 1 次提交
    • A
      x86/x86-64 MMU PAE fixes · 0ba5f006
      由 aurel32 提交于 
      This patch fixes MMU emulation in PAE mode for > 4GB physical addresses:
- a20_mask should have the correct size to not clear the high part of
  the addresses.
- PHYS_ADDR_MASK should not clear the high part of the addresses.
- pdpe, pde and pte could be located anywhere in memory on x86-64, but
  only in the first 4GB on x86, define their pointer to as target_ulong.
- pml4e_addr could be located anywhere in memory, define its pointer
  as uint64_t.
- paddr represents a physical address and thus should be of type
  target_phys_addr_t.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4239 c046a42c-6fe2-441c-8c8c-71466251a162
      0ba5f006
  33. 14 4月, 2008 1 次提交
  35. 09 4月, 2008 1 次提交
  37. 03 2月, 2008 1 次提交
  39. 15 11月, 2007 1 次提交
  41. 12 11月, 2007 1 次提交
  43. 10 11月, 2007 1 次提交
  45. 08 11月, 2007 2 次提交
  47. 14 10月, 2007 1 次提交
    • J
      Replace is_user variable with mmu_idx in softmmu core, · 6ebbf390
      由 j_mayer 提交于 
        allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
  and #ifdef TARGET_xxx in softmmu core functions.
Implement per target mmu modes definitions. As an example, add PowerPC
  hypervisor mode definition and Alpha executive and kernel modes definitions.
Optimize PowerPC case, precomputing mmu_idx when MSR register changes
  and using the same definition in code translation code.


git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3384 c046a42c-6fe2-441c-8c8c-71466251a162
      6ebbf390
  49. 28 9月, 2007 1 次提交
  51. 27 9月, 2007 1 次提交
  53. 23 9月, 2007 1 次提交
  55. 17 9月, 2007 2 次提交
  57. 12 7月, 2007 1 次提交
  59. 04 6月, 2007 1 次提交