- 17 6月, 2014 1 次提交
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由 Craig Heffner 提交于
In user mode Linux, Qemu currently refuses to load ELF files that do not contain section headers (ehdr->e_shentsize == 0). Since section headers are not required in order to load an ELF file, simply removing the e_shentsize check in elf_check_ehdr() allows ELF binaries with no section headers to be run properly in user mode: Signed-off-by: NCraig Heffner <cheffner@tacnetsol.com> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 16 6月, 2014 3 次提交
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由 Alexander Graf 提交于
We tell the guest its page size via AUX vectors. The guest process then uses this page size as information on which boundaries it can mmap() things. However, if the host has a bigger page size granularity than the guest, it can not fulfill these mmap() requests - which falls apart when MAP_FIXED is passed to mmap. So in that case, let the guest know that we're running on a bigger page size granularity than the target would require. This fixes running qemu-ppc (TARGET_PAGE_SIZE=4k) on a 64k page size ppc64 host for me. Signed-off-by: NAlexander Graf <agraf@suse.de> Reviewed-by: NRichard Henderson <rth@twiddle.net>
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由 Tom Musta 提交于
The existing code does a check to ensure that a .bss region is properly mmap'd. When additional mmap is required, the (guest) pages are also validated. However, this code has a bug: when host page size is larger than target page size, it is possible for the .bss pages to already be (host) mapped but the guest .bss pages may not be valid. The check to mmap additional space is separated from the flagging of the target (guest) pages, thus ensuring that both aspects are done properly. Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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由 Doug Kwan 提交于
Look at ELF header to determine ABI version on PPC64. This is required for executing the first instruction correctly. Also print correct machine name in uname() system call. Signed-off-by: NDoug Kwan <dougkwan@google.com> Signed-off-by: NTom Musta <tommusta@gmail.com> Signed-off-by: NAlexander Graf <agraf@suse.de>
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- 09 6月, 2014 6 次提交
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由 Peter Maydell 提交于
Implement the two-register SHA instruction group from the optional Crypto Extensions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-10-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the AES instructions from the optional Crypto Extensions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-8-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Implement the optional A64 CRC instructions. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401458125-27977-6-git-send-email-peter.maydell@linaro.org
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由 Peter Maydell 提交于
Now that we have a separate ARM_FEATURE_V8_PMULL bit, use it for the A64 PMULL, not the AES feature bit. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Peter Maydell 提交于
Add support for the VMULL.P64 polynomial 64x64 to 128 bit multiplication instruction in the A32/T32 instruction sets; this is part of the v8 Crypto Extensions. To do this we have to move the neon_pmull_64_{lo,hi} helpers from helper-a64.c into neon_helper.c so they can be used by the AArch32 translator. Inspired-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-4-git-send-email-peter.maydell@linaro.org
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由 Ard Biesheuvel 提交于
This adds support for the SHA1 and SHA256 instructions that are available on some v8 implementations of Aarch32. Signed-off-by: NArd Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1401386724-26529-2-git-send-email-peter.maydell@linaro.org [PMM: * rebase * fix bad indent * add a missing UNDEF check for Q!=1 in the 3-reg SHA1/SHA256 case * use g_assert_not_reached() * don't re-extract bit 6 for the 2-reg-misc encodings * set the ELF HWCAP2 bits for the new features ] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 03 5月, 2014 5 次提交
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由 Peter Maydell 提交于
The ARM kernel has chosen to spill into the HWCAP2 ELF feature bit flags early, even though it hasn't yet exhausted all 32 bits of the HWCAP word. Add support for setting this in the same way we do for HWCAP. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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由 Peter Maydell 提交于
The ARM target-specific code in elfload.c was incorrectly allowing the 64-bit ARM target to use most of the existing 32-bit definitions: most noticably this meant that our HWCAP bits passed to the guest were wrong, and register handling when dumping core was totally broken. Fix this by properly separating the 64 and 32 bit code, since they have more differences than similarities. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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由 Peter Maydell 提交于
The kernel has added support for a number of new ARM HWCAP bits; add them to QEMU, including support for setting them where we have a corresponding CPU feature bit. We were also incorrectly setting the VFPv3D16 HWCAP -- this means "only 16 D registers", not "supports 16-bit floating point format"; since QEMU always has 32 D registers for VFPv3, we can just remove the line that incorrectly set this bit. The kernel does not set the HWCAP_FPA even if it is providing FPA emulation via nwfpe, so don't set this bit in QEMU either. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Cc: qemu-stable@nongnu.org Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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由 Peter Maydell 提交于
The ELF HWCAP bits for ARM features THUMBEE, NEON, VFPv3 and VFPv3D16 are all off by one compared to the kernel definitions. Fix this discrepancy and add in the missing CRUNCH bit which was the cause of the off-by-one error. (We don't emulate any of the CPUs which have that weird hardware, so it's otherwise uninteresting to us.) Cc: qemu-stable@nongnu.org Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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由 James Hogan 提交于
Assert that the amount of stack space used for auxvec, envp & argv exactly matches the amount allocated. This catches if DLINFO_ITEMS isn't updated when another NEW_AUX_ENT is added. Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 26 3月, 2014 1 次提交
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由 James Hogan 提交于
Commit a07c67df (Implement AT_CLKTCK.) back in March 2008 added a new auxvec entry but didn't increment DLINFO_ITEMS, so it's been out of sync ever since. Bump it up to 14 so that it matches the number of NEW_AUX_ENT's that need to be counted in create_elf_tables(). Signed-off-by: NJames Hogan <james.hogan@imgtec.com> Cc: Riku Voipio <riku.voipio@iki.fi> Cc: Paul Brook <paul@codesourcery.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 17 3月, 2014 1 次提交
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由 Peter Maydell 提交于
AArch64 Linux, unlike AArch32, doesn't use a commpage. This means we should not be reserving room in the guest address space for one. Fixes LP:1287195. Reported-by: NAmanieu d'Antras <amanieu@gmail.com> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 14 3月, 2014 1 次提交
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 18 2月, 2014 1 次提交
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由 Peter Maydell 提交于
Avoid calling g_free() on unintialized data in the error-handling paths in elf_core_dump() by splitting the initialization of the elf_note_info struct out of fill_note_info() so that it's always valid to call free_note_info() whether we got to the point of being able to fill_note_info() or not. Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 10 1月, 2014 1 次提交
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由 Will Newton 提交于
The regs parameter is not used anywhere, so remove it. Signed-off-by: NWill Newton <will.newton@linaro.org> Reviewed-by: NErik de Castro Lopo <erikd@mega-nerd.com> Reviewed-by: NAndreas Färber <afaerber@suse.de> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 11 9月, 2013 1 次提交
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由 Alexander Graf 提交于
This patch adds support for AArch64 in all the small corners of linux-user (primarily in image loading and startup code). Signed-off-by: NAlexander Graf <agraf@suse.de> Signed-off-by: NJohn Rigby <john.rigby@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Message-id: 1378235544-22290-22-git-send-email-peter.maydell@linaro.org Message-id: 1368505980-17151-11-git-send-email-john.rigby@linaro.org [PMM: * removed some unnecessary #defines from syscall.h * catch attempts to use a 32 bit only cpu with aarch64-linux-user * termios stuff moved into its own patch * we specify our minimum uname version here now ] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 03 9月, 2013 1 次提交
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由 Andreas Färber 提交于
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthand macros. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 10 7月, 2013 2 次提交
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由 Andreas Färber 提交于
Signed-off-by: NAndreas Färber <afaerber@suse.de>
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由 Andreas Färber 提交于
Move next_cpu from CPU_COMMON to CPUState. Move first_cpu variable to qom/cpu.h. gdbstub needs to use CPUState::env_ptr for now. cpu_copy() no longer needs to save and restore cpu_next. Acked-by: NPaolo Bonzini <pbonzini@redhat.com> [AF: Rebased, simplified cpu_copy()] Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 02 5月, 2013 1 次提交
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由 Eduardo Habkost 提交于
This replaces the feature-bit fields on both X86CPU and x86_def_t structs with an array. With this, we will be able to simplify code that simply does the same operation on all feature words (e.g. kvm_check_features_against_host(), filter_features_for_kvm(), add_flagname_to_bitmaps(), CPU feature-bit property lookup/registration, and the proposed "feature-words" property) The following field replacements were made on X86CPU and x86_def_t: (cpuid_)features -> features[FEAT_1_EDX] (cpuid_)ext_features -> features[FEAT_1_ECX] (cpuid_)ext2_features -> features[FEAT_8000_0001_EDX] (cpuid_)ext3_features -> features[FEAT_8000_0001_ECX] (cpuid_)ext4_features -> features[FEAT_C000_0001_EDX] (cpuid_)kvm_features -> features[FEAT_KVM] (cpuid_)svm_features -> features[FEAT_SVM] (cpuid_)7_0_ebx_features -> features[FEAT_7_0_EBX] Signed-off-by: NEduardo Habkost <ehabkost@redhat.com> Reviewed-by: NIgor Mammedov <imammedo@redhat.com> Signed-off-by: NAndreas Färber <afaerber@suse.de>
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- 18 4月, 2013 6 次提交
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由 Paolo Bonzini 提交于
The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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由 Paolo Bonzini 提交于
The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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由 Paolo Bonzini 提交于
The alignment is a characteristic of the ABI, not the CPU. Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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由 Paolo Bonzini 提交于
Reviewed-by: NPeter Maydell <peter.maydell@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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由 Paolo Bonzini 提交于
Registers are 64-bit in size for the MIPS n32 ABI. Define target_elf_greg_t accordingly, and use the correct function to do endian swaps. Reviewed-by: NPeter Maydell <peter.maydell@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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由 Paolo Bonzini 提交于
Some fields in core dumps are 32-bit in 32-or-64 environments (ppc64abi32, sparc32plus). Use abi_long/ulong for those. Also, the fields of target_elf_siginfo are ints. Use tswap32 to convert them. Reviewed-by: NPeter Maydell <peter.maydell@redhat.com> Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com> Signed-off-by: NEdgar E. Iglesias <edgar.iglesias@gmail.com>
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- 19 12月, 2012 1 次提交
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由 Paolo Bonzini 提交于
Signed-off-by: NPaolo Bonzini <pbonzini@redhat.com>
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- 05 10月, 2012 1 次提交
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由 Jim Meyering 提交于
Remove two uses of strdup (use g_path_get_basename instead), and add a comment that this strncpy use is ok. Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NJim Meyering <meyering@redhat.com> Signed-off-by: NAnthony Liguori <aliguori@us.ibm.com>
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- 15 8月, 2012 2 次提交
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由 Meador Inge 提交于
Roll the code used to initialize the guest memory space when -R or -B is used into 'init_guest_space' and then call 'init_guest_space' from the driver. This way the reserved guest memory space can be probed for. Calling 'mmap' just once as is currently done is not guaranteed to succeed since the host address space validation might fail. Signed-off-by: NMeador Inge <meadori@codesourcery.com> [PMM: Fixed minor whitespace errors.] Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Meador Inge 提交于
Signed-off-by: NMeador Inge <meadori@codesourcery.com> Reviewed-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 28 7月, 2012 1 次提交
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由 Jia Liu 提交于
Add QEMU OpenRISC linux user support. Signed-off-by: NJia Liu <proljc@gmail.com> Signed-off-by: NBlue Swirl <blauwirbel@gmail.com>
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- 07 4月, 2012 2 次提交
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由 Paul Brook 提交于
Add support for ARM BE8 userspace binaries. i.e. big-endian data and little-endian code. In principle LE8 mode is also possible, but AFAIK has never actually been implemented/used. System emulation doesn't have any useable big-endian board models, but should in principle work once you fix that. Dynamic endianness switching requires messing with data accesses, preferably with TCG cooperation, and is orthogonal to BE8 support. Signed-off-by: NPaul Brook <paul@codesourcery.com> [PMM: various changes, mostly as per my suggestions in code review: * rebase * use EF_ defines rather than hardcoded constants * make bswap_code a bool for future VMSTATE macro compatibility * update comment in cpu.h about TB flags bit field usage * factor out load-code-and-swap into arm_ld*_code functions and get_user_code* macros * fix stray trailing space at end of line * added braces in disas.c to satisfy checkpatch ] Signed-off-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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由 Benoit Canet 提交于
The cpu capabilities passed by the elf loader in AT_HWCAP where a constant. Make AT_HWCAP reflect the emulated cpu features in order to give correct clues to eglibc. Riku Voipio: fixed to apply to current head Fix : [Bug 887516] [NEW] VFP support reported for the PXA270 Signed-off-by: NBenoit Canet <benoit.canet@gmail.com> Signed-off-by: NRiku Voipio <riku.voipio@linaro.org>
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- 15 3月, 2012 2 次提交
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由 Andreas Färber 提交于
Scripted conversion: for file in *.[hc] hw/*.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do sed -i "s/CPUState/CPUArchState/g" $file done All occurrences of CPUArchState are expected to be replaced by QOM CPUState, once all targets are QOM'ified and common fields have been extracted. Signed-off-by: NAndreas Färber <afaerber@suse.de> Reviewed-by: NAnthony Liguori <aliguori@us.ibm.com>
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由 Andreas Färber 提交于
In target-specific code use CPU*State. While at it, fix indentation on those lines. Signed-off-by: NAndreas Färber <afaerber@suse.de>
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