- 14 1月, 2020 3 次提交
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由 Markus Armbruster 提交于
Having to include qapi-commands.h just for qmp_init_marshal() is suboptimal. Generate it into separate files. This lets monitor/misc.c, qga/main.c, and the generated qapi-commands-FOO.h include less. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20191120182551.23795-4-armbru@redhat.com> [Typos in docs/devel/qapi-code-gen.txt fixed] Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Markus Armbruster 提交于
Commit 5d75648b "qapi: Generate QAPIEvent stuff into separate files" added tests/test-qapi-emit-events.[ch] to the set of generated files, but neglected to update tests/.gitignore and tests/Makefile.include. Commit a0af8cee "tests/.gitignore: ignore test-qapi-emit-events.[ch] for in-tree builds" fixed the former. Now fix the latter. Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20191120182551.23795-3-armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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由 Markus Armbruster 提交于
Signed-off-by: NMarkus Armbruster <armbru@redhat.com> Message-Id: <20191120182551.23795-2-armbru@redhat.com> Reviewed-by: NEric Blake <eblake@redhat.com>
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- 11 1月, 2020 1 次提交
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由 Peter Maydell 提交于
ppc patch queue 2020-01-08 Here's another pull request for qemu-5.0 of ppc related changes. Highlights are: * First parts of support for POWER Secure VMs * Rework to clean up how we pass context information to the various components of the pnv machine (reduces usage of qdev_get_machine()) * Assorted cleanups and bugfixes # gpg: Signature made Wed 08 Jan 2020 05:22:08 GMT # gpg: using RSA key 75F46586AE61A66CC44E87DC6C38CACA20D9B392 # gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>" [full] # gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>" [full] # gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>" [full] # gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>" [unknown] # Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392 * remotes/dgibson/tags/ppc-for-5.0-20200108: (26 commits) ppc/pnv: fix check on return value of blk_getlength() ppc/pnv: check return value of blk_pwrite() pnv/psi: Consolidate some duplicated code in pnv_psi_realize() pnv/psi: Add device reset hook pnv/xive: Deduce the PnvXive pointer from XiveTCTX::xptr spapr/xive: Deduce the SpaprXive pointer from XiveTCTX::xptr xive: Add a "presenter" link property to the TCTX object ppc/pnv: Add a "pnor" const link property to the BMC internal simulator ppc/pnv: Add an "nr-threads" property to the base chip class xive: Use the XIVE fabric link under the XIVE router spapr, pnv, xive: Add a "xive-fabric" link to the XIVE router pnv/xive: Use device_class_set_parent_realize() ppc/pnv: Introduce a "xics" property under the POWER8 chip ppc/pnv: Introduce a "xics" property alias under the PSI model spapr/xive: remove redundant check in spapr_match_nvt() ppc/pnv: Drop "num-chips" machine property ppc440_bamboo.c: remove label from bamboo_load_device_tree() spapr.c: remove 'out' label in spapr_dt_cas_updates() ppc/spapr: Don't call KVM_SVM_OFF ioctl on TCG spapr/xive: Use device_class_set_parent_realize() ... Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 10 1月, 2020 2 次提交
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由 Peter Maydell 提交于
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-semihosting-090120-2' into staging Testing fixes and semiconsole support: - build fix (missing x86-iommu stubs) - python fixes for freebsd and OSX - nicer reporting of acceptance failures - fix build nesting of fp-test (breaks bsds) - semihosting clean-ups - support for blocking semihosting console # gpg: Signature made Thu 09 Jan 2020 11:42:51 GMT # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44 * remotes/stsquad/tags/pull-testing-and-semihosting-090120-2: tests/tcg: add user version of dumb-as-bricks semiconsole test tests/tcg: extract __semi_call into a header and expand tests/tcg: add a dumb-as-bricks semihosting console test semihosting: add qemu_semihosting_console_inc for SYS_READC target/arm: only update pc after semihosting completes target/arm: remove unused EXCP_SEMIHOST leg testing: don't nest build for fp-test travis.yml: install homebrew python for OS X travis.yml: duplicate before_script for MacOSX travis.yml: Detach build and test steps travis.yml: avocado: Print logs of non-pass tests only freebsd: use python37 tests/vm: update openbsd to release 6.6 hw/i386/x86-iommu: Add missing stubs Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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由 Marc-André Lureau 提交于
Some distros ship gdbus-codegen separately for gio headers/pc... Reported-by: NPeter Maydell <peter.maydell@linaro.org> Signed-off-by: NMarc-André Lureau <marcandre.lureau@redhat.com> Message-id: 20200110112725.689401-1-marcandre.lureau@redhat.com Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
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- 09 1月, 2020 14 次提交
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由 Alex Bennée 提交于
There are linux-user users of semihosting so we'd better check things work for them as well. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Alex Bennée 提交于
There are two types of ARM semicall - lets test them both. Putting the logic in a header will make re-using the functions easier later. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Alex Bennée 提交于
We don't run this during check-tcg as we would need to check stuff is echoed back. However we can still build the binary so people can test it manually. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Keith Packard 提交于
Provides a blocking call to read a character from the console using semihosting.chardev, if specified. This takes some careful command line options to use stdio successfully as the serial ports, monitor and semihost all want to use stdio. Here's a sample set of command line options which share stdio between semihost, monitor and serial ports: qemu \ -chardev stdio,mux=on,id=stdio0 \ -serial chardev:stdio0 \ -semihosting-config enable=on,chardev=stdio0 \ -mon chardev=stdio0,mode=readline This creates a chardev hooked to stdio and then connects all of the subsystems to it. A shorter mechanism would be good to hear about. Signed-off-by: NKeith Packard <keithp@keithp.com> Message-Id: <20191104204230.12249-1-keithp@keithp.com> [AJB: fixed up deadlock, minor commit title reword] Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Cc: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: NKeith Packard <keithp@keithp.com> Tested-by: NKeith Packard <keithp@keithp.com> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org>
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由 Alex Bennée 提交于
Before we introduce blocking semihosting calls we need to ensure we can restart the system on semi hosting exception. To be able to do this the EXCP_SEMIHOST operation should be idempotent until it finally completes. Practically this means ensureing we only update the pc after the semihosting call has completed. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NKeith Packard <keithp@keithp.com> Tested-by: NKeith Packard <keithp@keithp.com>
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由 Alex Bennée 提交于
All semihosting exceptions are dealt with earlier in the common code so we should never get here. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NRichard Henderson <richard.henderson@linaro.org> Reviewed-by: NKeith Packard <keithp@keithp.com> Tested-by: NKeith Packard <keithp@keithp.com>
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由 Alex Bennée 提交于
Re-calling the main make is counter-productive and really messes up with parallel builds. Just ensure we have built the pre-requisites before we build the fp-test bits. If the user builds manually just complain if the parent build hasn't got the bits we need. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Reviewed-by: NEmilio G. Cota <cota@braap.org>
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由 Alex Bennée 提交于
Our python3 requirements now outstrip those of the build. While we are at it we can move more of the special casing for Mac into the one build we have. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
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由 Alex Bennée 提交于
Rather than keep the hack in the global code lets "Think Different" and have a special copy for MacOSX. Signed-off-by: NAlex Bennée <alex.bennee@linaro.org>
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Currently build and test commands are a single step in a Travis's `script` block. In order to see the output of the tests one needs to scroll down the log to find where the build messages ended and the limit is not clear. If they were in different steps then Travis would print the result build command, which can be easily grep'ed. So this change is made to detach those commands to ease the visualization of the output. Note that all steps on the `script` block is executed regardless if one previous has failed. To overcome it, let's save the return code of the build then check whether succeed or failed on the test step. Signed-off-by: NWainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20191230184327.2800-3-wainersm@redhat.com>
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The acceptance tests build on Travis is configured to print the entire Avocado's job log in case any test fail. Usually one is interested on failed tests only though. So this change the Travis configuration in order to show the log of tests which status is different from 'PASS' and 'SKIP' only. Note that 'CANCEL'-ed tests will have the log printed too because it can help to debug some condition on CI environment which is not being fulfilled. Signed-off-by: NWainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20191230184327.2800-2-wainersm@redhat.com>
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由 Gerd Hoffmann 提交于
FreeBSD seems to use python37 by default now, which breaks the build script. Add python to the package list, to explicitly pick the version, and also adapt the configure command line. Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Tested-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20200106123746.18201-1-kraxel@redhat.com>
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由 Gerd Hoffmann 提交于
Signed-off-by: NGerd Hoffmann <kraxel@redhat.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Tested-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20191018102443.26469-1-kraxel@redhat.com>
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由 Philippe Mathieu-Daudé 提交于
In commit 6c730e4a we introduced a stub to build the MicroVM machine without Intel IOMMU. This stub is incomplete for the other PC machines. Add the missing stubs. Fixes: 6c730e4a Reported-by: Travis-CI Signed-off-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Tested-by: NWainer dos Santos Moschetta <wainersm@redhat.com> Signed-off-by: NAlex Bennée <alex.bennee@linaro.org> Message-Id: <20191220154225.25879-1-philmd@redhat.com>
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- 08 1月, 2020 20 次提交
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由 Cédric Le Goater 提交于
blk_getlength() returns an int64_t but the result is stored in a uint32_t. Errors (negative values) won't be caught by the check in pnv_pnor_realize() and blk_blockalign() will allocate a very large buffer in such cases. Fixes Coverity issue CID 1412226. Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200107171809.15556-3-clg@kaod.org> Reviewed-by: NGreg Kurz <groug@kaod.org> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Cédric Le Goater 提交于
When updating the PNOR file contents, we should check for a possible failure of blk_pwrite(). Fixes Coverity issue CID 1412228. Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200107171809.15556-2-clg@kaod.org> Reviewed-by: NGreg Kurz <groug@kaod.org> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
The proper way to do that would be to use device_class_set_parent_realize(), but defining a Pnv8PsiClass and a Pnv9PsiClass types with a parent_realize pointer adds a fair amount of code. Calling pnv_psi_realize() explicitely is fine for now. This should probably be achieved with a device realize hook in the PSI base class and device_class_set_parent_realize() in the children classes. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <157841476667.66386.13659183399113837990.stgit@bahia.tlslab.ibm.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
And call it from a QEMU reset handler. This allows each PNV child class to override the reset hook if needed, eg. POWER8 doesn't but POWER9 does. The proper way to do that would be to use device_class_set_parent_reset(), but defining a Pnv8PsiClass and a Pnv9PsiClass types with a parent_reset pointer adds a fair amount of code. Calling pnv_psi_reset() explicitely is fine for now. A subsequent patch will consolidate the call to qemu_register_reset() in a single place. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <157841476035.66386.17838417527621752518.stgit@bahia.tlslab.ibm.com> Reviewed-by: NPhilippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
And use it instead of reaching out to the machine. This allows to get rid of pnv_get_chip(). Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-11-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
And use it instead of reaching out to the machine. This allows to get rid of a call to qdev_get_machine() and to reduce the scope of another one so that it is only used within the argument list of error_append_hint(). This is an acceptable tradeoff compared to all it would require to know about the maximum number of CPUs here without calling qdev_get_machine(). Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-10-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Cédric Le Goater 提交于
This will be used in subsequent patches to access the XIVE associated to a TCTX without reaching out to the machine through qdev_get_machine(). Signed-off-by: NCédric Le Goater <clg@kaod.org> [ groug: - split patch - write subject and changelog ] Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-9-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
This allows to get rid of a call to qdev_get_machine(). Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-8-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
Set it at chip creation and forward it to the cores. This allows to drop a call to qdev_get_machine(). Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-7-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
Now that the spapr and pnv machines do set the "xive-fabric" link, the use of the XIVE fabric pointer becomes mandatory. This is checked with an assert() in a new realize hook. Since the XIVE router is realized at machine init for the all the machine's life time, no risk to abort an already running guest (ie. not a hotplug path). This gets rid of a qdev_get_machine() call. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-6-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
In order to get rid of qdev_get_machine(), first add a pointer to the XIVE fabric under the XIVE router and make it configurable through a QOM link property. Configure it in the spapr and pnv machine. In the case of pnv, the XIVE routers are under the chip, so this is done with a QOM alias property of the POWER9 pnv chip. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106145645.4539-5-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
The XIVE router base class currently inherits an empty realize hook from the sysbus device base class, but it will soon implement one of its own to perform some sanity checks. Do the preliminary plumbing to have it called. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-4-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Cédric Le Goater 提交于
POWER8 is the only chip using the XICS interface. Add a "xics" link and a XICSFabric attribute under this chip to remove the use of qdev_get_machine() Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NGreg Kurz <groug@kaod.org> Reviewed-by: NDavid Gibson <david@gibson.dropbear.id.au> Message-Id: <20200106145645.4539-3-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Cédric Le Goater 提交于
This removes the need of the intermediate link under PSI to pass the XICS link to the underlying ICSState object. Signed-off-by: NCédric Le Goater <clg@kaod.org> Reviewed-by: NGreg Kurz <groug@kaod.org> Message-Id: <20200106145645.4539-2-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Cédric Le Goater 提交于
spapr_match_nvt() is a XIVE operation and is used by the machine to look for a matching target when an event notification is being delivered. An assert checks that spapr_match_nvt() is called only when the machine has selected the XIVE interrupt mode but it is redundant with the XIVE_PRESENTER() dynamic cast. Apply the cast to spapr->active_intc and remove the assert. Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20200106163207.4608-1-clg@kaod.org> Reviewed-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
The number of CPU chips of the powernv machine is configurable through a "num-chips" property. This doesn't fit well with the CPU topology, eg. some configurations can come up with more CPUs than the maximum of CPUs set in the toplogy. This causes assertion to be hit with mttcg: -machine powernv,num-chips=2 -smp cores=2 -accel tcg,thread=multi ERROR: tcg/tcg.c:789:tcg_register_thread: assertion failed: (n < ms->smp.max_cpus) Aborted (core dumped) Mttcg mandates the CPU topology to be dimensioned to the actual number of CPUs, depending on the number of chips the user asked for. That is, '-machine num-chips=N' should always have a '-smp' companion with a topology that meats the resulting number of CPUs, typically '-smp sockets=N'. It thus seems that "num-chips" doesn't bring anything but forcing the user to specify the requested number of chips on the command line twice. Simplify the command line by computing the number of chips based on the CPU topology exclusively. The powernv machine isn't a production thing ; it is mostly used by developpers to prepare the bringup of real HW. Because of this and for simplicity, this deliberately ignores the official deprecation process and dumps "num-chips" right away : '-smp sockets=N' is now the only way to control the number of CPU chips. This is done at machine init because smp_parse() is called after instance init. Signed-off-by: NGreg Kurz <groug@kaod.org> Message-Id: <157830658266.533764.2214183961444213947.stgit@bahia.lan> Reviewed-by: NCédric Le Goater <clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Daniel Henrique Barboza 提交于
'out' label can be replaced by 'return -1' in all cases. CC: David Gibson <david@gibson.dropbear.id.au> CC: qemu-ppc@nongnu.org Signed-off-by: NDaniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20200106182425.20312-3-danielhb413@gmail.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Daniel Henrique Barboza 提交于
'out' can be replaced by 'return' with the appropriate return value. CC: David Gibson <david@gibson.dropbear.id.au> CC: qemu-ppc@nongnu.org Signed-off-by: NDaniel Henrique Barboza <danielhb413@gmail.com> Message-Id: <20200106182425.20312-2-danielhb413@gmail.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Bharata B Rao 提交于
Invoking KVM_SVM_OFF ioctl for TCG guests will lead to a QEMU crash. Fix this by ensuring that we don't call KVM_SVM_OFF ioctl on TCG. Reported-by: NAlexey Kardashevskiy <aik@ozlabs.ru> Fixes: 4930c1966249 ("ppc/spapr: Support reboot of secure pseries guest") Signed-off-by: NBharata B Rao <bharata@linux.ibm.com> Message-Id: <20200102054155.13175-1-bharata@linux.ibm.com> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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由 Greg Kurz 提交于
The XIVE router base class currently inherits an empty realize hook from the sysbus device base class, but it will soon implement one of its own to perform some sanity checks. Do the preliminary plumbing to have it called. Signed-off-by: NGreg Kurz <groug@kaod.org> Signed-off-by: NCédric Le Goater <clg@kaod.org> Message-Id: <20191219181155.32530-6-clg@kaod.org> Signed-off-by: NDavid Gibson <david@gibson.dropbear.id.au>
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