提交 f986ee1d 编写于 作者: J Joel Stanley 提交者: Peter Maydell

aspeed: Register all watchdogs

The ast2400 contains two and the ast2500 contains three watchdogs.
Add this information to the AspeedSoCInfo and realise the correct number
of watchdogs for that each SoC type.
Signed-off-by: NJoel Stanley <joel@jms.id.au>
Reviewed-by: NCédric Le Goater <clg@kaod.org>
Tested-by: NCédric Le Goater <clg@kaod.org>
Signed-off-by: NPeter Maydell <peter.maydell@linaro.org>
上级 499ca137
...@@ -62,6 +62,7 @@ static const AspeedSoCInfo aspeed_socs[] = { ...@@ -62,6 +62,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
.spi_bases = aspeed_soc_ast2400_spi_bases, .spi_bases = aspeed_soc_ast2400_spi_bases,
.fmc_typename = "aspeed.smc.fmc", .fmc_typename = "aspeed.smc.fmc",
.spi_typename = aspeed_soc_ast2400_typenames, .spi_typename = aspeed_soc_ast2400_typenames,
.wdts_num = 2,
}, { }, {
.name = "ast2400-a1", .name = "ast2400-a1",
.cpu_model = "arm926", .cpu_model = "arm926",
...@@ -72,6 +73,7 @@ static const AspeedSoCInfo aspeed_socs[] = { ...@@ -72,6 +73,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
.spi_bases = aspeed_soc_ast2400_spi_bases, .spi_bases = aspeed_soc_ast2400_spi_bases,
.fmc_typename = "aspeed.smc.fmc", .fmc_typename = "aspeed.smc.fmc",
.spi_typename = aspeed_soc_ast2400_typenames, .spi_typename = aspeed_soc_ast2400_typenames,
.wdts_num = 2,
}, { }, {
.name = "ast2400", .name = "ast2400",
.cpu_model = "arm926", .cpu_model = "arm926",
...@@ -82,6 +84,7 @@ static const AspeedSoCInfo aspeed_socs[] = { ...@@ -82,6 +84,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
.spi_bases = aspeed_soc_ast2400_spi_bases, .spi_bases = aspeed_soc_ast2400_spi_bases,
.fmc_typename = "aspeed.smc.fmc", .fmc_typename = "aspeed.smc.fmc",
.spi_typename = aspeed_soc_ast2400_typenames, .spi_typename = aspeed_soc_ast2400_typenames,
.wdts_num = 2,
}, { }, {
.name = "ast2500-a1", .name = "ast2500-a1",
.cpu_model = "arm1176", .cpu_model = "arm1176",
...@@ -92,6 +95,7 @@ static const AspeedSoCInfo aspeed_socs[] = { ...@@ -92,6 +95,7 @@ static const AspeedSoCInfo aspeed_socs[] = {
.spi_bases = aspeed_soc_ast2500_spi_bases, .spi_bases = aspeed_soc_ast2500_spi_bases,
.fmc_typename = "aspeed.smc.ast2500-fmc", .fmc_typename = "aspeed.smc.ast2500-fmc",
.spi_typename = aspeed_soc_ast2500_typenames, .spi_typename = aspeed_soc_ast2500_typenames,
.wdts_num = 3,
}, },
}; };
...@@ -175,9 +179,11 @@ static void aspeed_soc_init(Object *obj) ...@@ -175,9 +179,11 @@ static void aspeed_soc_init(Object *obj)
object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc), object_property_add_alias(obj, "ram-size", OBJECT(&s->sdmc),
"ram-size", &error_abort); "ram-size", &error_abort);
object_initialize(&s->wdt, sizeof(s->wdt), TYPE_ASPEED_WDT); for (i = 0; i < sc->info->wdts_num; i++) {
object_property_add_child(obj, "wdt", OBJECT(&s->wdt), NULL); object_initialize(&s->wdt[i], sizeof(s->wdt[i]), TYPE_ASPEED_WDT);
qdev_set_parent_bus(DEVICE(&s->wdt), sysbus_get_default()); object_property_add_child(obj, "wdt[*]", OBJECT(&s->wdt[i]), NULL);
qdev_set_parent_bus(DEVICE(&s->wdt[i]), sysbus_get_default());
}
object_initialize(&s->ftgmac100, sizeof(s->ftgmac100), TYPE_FTGMAC100); object_initialize(&s->ftgmac100, sizeof(s->ftgmac100), TYPE_FTGMAC100);
object_property_add_child(obj, "ftgmac100", OBJECT(&s->ftgmac100), NULL); object_property_add_child(obj, "ftgmac100", OBJECT(&s->ftgmac100), NULL);
...@@ -300,12 +306,15 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp) ...@@ -300,12 +306,15 @@ static void aspeed_soc_realize(DeviceState *dev, Error **errp)
sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, ASPEED_SOC_SDMC_BASE); sysbus_mmio_map(SYS_BUS_DEVICE(&s->sdmc), 0, ASPEED_SOC_SDMC_BASE);
/* Watch dog */ /* Watch dog */
object_property_set_bool(OBJECT(&s->wdt), true, "realized", &err); for (i = 0; i < sc->info->wdts_num; i++) {
if (err) { object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized", &err);
error_propagate(errp, err); if (err) {
return; error_propagate(errp, err);
return;
}
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0,
ASPEED_SOC_WDT_BASE + i * 0x20);
} }
sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt), 0, ASPEED_SOC_WDT_BASE);
/* Net */ /* Net */
qdev_set_nic_properties(DEVICE(&s->ftgmac100), &nd_table[0]); qdev_set_nic_properties(DEVICE(&s->ftgmac100), &nd_table[0]);
......
...@@ -23,6 +23,7 @@ ...@@ -23,6 +23,7 @@
#include "hw/net/ftgmac100.h" #include "hw/net/ftgmac100.h"
#define ASPEED_SPIS_NUM 2 #define ASPEED_SPIS_NUM 2
#define ASPEED_WDTS_NUM 3
typedef struct AspeedSoCState { typedef struct AspeedSoCState {
/*< private >*/ /*< private >*/
...@@ -39,7 +40,7 @@ typedef struct AspeedSoCState { ...@@ -39,7 +40,7 @@ typedef struct AspeedSoCState {
AspeedSMCState fmc; AspeedSMCState fmc;
AspeedSMCState spi[ASPEED_SPIS_NUM]; AspeedSMCState spi[ASPEED_SPIS_NUM];
AspeedSDMCState sdmc; AspeedSDMCState sdmc;
AspeedWDTState wdt; AspeedWDTState wdt[ASPEED_WDTS_NUM];
FTGMAC100State ftgmac100; FTGMAC100State ftgmac100;
} AspeedSoCState; } AspeedSoCState;
...@@ -56,6 +57,7 @@ typedef struct AspeedSoCInfo { ...@@ -56,6 +57,7 @@ typedef struct AspeedSoCInfo {
const hwaddr *spi_bases; const hwaddr *spi_bases;
const char *fmc_typename; const char *fmc_typename;
const char **spi_typename; const char **spi_typename;
int wdts_num;
} AspeedSoCInfo; } AspeedSoCInfo;
typedef struct AspeedSoCClass { typedef struct AspeedSoCClass {
......
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