提交 f840fa99 编写于 作者: S Stefan Weil 提交者: Aurelien Jarno

target-sh4: Fix operands for fipr, ftrv instructions

Coverity complained about right shifts of opcode (16, 18) which were
larger than the size of opcode (16 bit).

Using the correct shift values fixes this.

Cc: Aurelien Jarno <aurelien@aurel32.net>
Signed-off-by: NStefan Weil <sw@weilnetz.de>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>
上级 e9b40fd3
......@@ -1864,8 +1864,8 @@ static void _decode_opc(DisasContext * ctx)
CHECK_FPU_ENABLED
if ((ctx->fpscr & FPSCR_PR) == 0) {
TCGv m, n;
m = tcg_const_i32((ctx->opcode >> 16) & 3);
n = tcg_const_i32((ctx->opcode >> 18) & 3);
m = tcg_const_i32((ctx->opcode >> 8) & 3);
n = tcg_const_i32((ctx->opcode >> 10) & 3);
gen_helper_fipr(m, n);
tcg_temp_free(m);
tcg_temp_free(n);
......@@ -1877,7 +1877,7 @@ static void _decode_opc(DisasContext * ctx)
if ((ctx->opcode & 0x0300) == 0x0100 &&
(ctx->fpscr & FPSCR_PR) == 0) {
TCGv n;
n = tcg_const_i32((ctx->opcode >> 18) & 3);
n = tcg_const_i32((ctx->opcode >> 10) & 3);
gen_helper_ftrv(n);
tcg_temp_free(n);
return;
......
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