ppc: Convert GPR moves to TCG

Replace op_load_gpr_{T0,T1,T2} and op_store_{T0,T1,T2} with tcg_gen_mov_tl.
Introduce TCG variables cpu_gpr[0..31].

For the SPE extension, assure that ppc_gpr_t is only uint64_t for ppc64.
Introduce TCG variables cpu_gprh[0..31] for upper 32 bits on ppc and helpers
gen_{load,store}_gpr64. Based on suggestions by Aurelien, Thiemo and Blue.
Signed-off-by: NAndreas Faerber <andreas.faerber@web.de>
Signed-off-by: NAurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5153 c046a42c-6fe2-441c-8c8c-71466251a162

target-ppc/cpu.h

@@ -33,17 +33,7 @@ typedef uint64_t ppc_gpr_t;
 
 #else /* defined (TARGET_PPC64) */
 /* PowerPC 32 definitions */
-#if (HOST_LONG_BITS >= 64)
-/* When using 64 bits temporary registers,
- * we can use 64 bits GPR with no extra cost
- * It's even an optimization as this will prevent
- * the compiler to do unuseful masking in the micro-ops.
- */
-typedef uint64_t ppc_gpr_t;
-#else /* (HOST_LONG_BITS >= 64) */
 typedef uint32_t ppc_gpr_t;
-#endif /* (HOST_LONG_BITS >= 64) */
-
 #define TARGET_LONG_BITS 32
 
 #if defined(TARGET_PPCEMB)
@@ -541,7 +531,7 @@ struct CPUPPCState {
     /* First are the most commonly used resources
      * during translated code execution
      */
-#if (HOST_LONG_BITS == 32)
+#if (TARGET_LONG_BITS > HOST_LONG_BITS) || !defined(TARGET_PPC64)
     /* temporary fixed-point registers
      * used to emulate 64 bits registers on 32 bits hosts
      */

target-ppc/op_template.h

@@ -18,91 +18,6 @@
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 
-/* General purpose registers moves */
-void OPPROTO glue(op_load_gpr_T0_gpr, REG) (void)
-{
-    T0 = env->gpr[REG];
-    RETURN();
-}
-
-void OPPROTO glue(op_load_gpr_T1_gpr, REG) (void)
-{
-    T1 = env->gpr[REG];
-    RETURN();
-}
-
-void OPPROTO glue(op_load_gpr_T2_gpr, REG) (void)
-{
-    T2 = env->gpr[REG];
-    RETURN();
-}
-
-void OPPROTO glue(op_store_T0_gpr_gpr, REG) (void)
-{
-    env->gpr[REG] = T0;
-    RETURN();
-}
-
-void OPPROTO glue(op_store_T1_gpr_gpr, REG) (void)
-{
-    env->gpr[REG] = T1;
-    RETURN();
-}
-
-#if 0 // unused
-void OPPROTO glue(op_store_T2_gpr_gpr, REG) (void)
-{
-    env->gpr[REG] = T2;
-    RETURN();
-}
-#endif
-
-/* General purpose registers containing vector operands moves */
-#if !defined(TARGET_PPC64)
-void OPPROTO glue(op_load_gpr64_T0_gpr, REG) (void)
-{
-    T0_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32);
-    RETURN();
-}
-
-void OPPROTO glue(op_load_gpr64_T1_gpr, REG) (void)
-{
-    T1_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32);
-    RETURN();
-}
-
-#if 0 // unused
-void OPPROTO glue(op_load_gpr64_T2_gpr, REG) (void)
-{
-    T2_64 = (uint64_t)env->gpr[REG] | ((uint64_t)env->gprh[REG] << 32);
-    RETURN();
-}
-#endif
-
-void OPPROTO glue(op_store_T0_gpr64_gpr, REG) (void)
-{
-    env->gpr[REG] = T0_64;
-    env->gprh[REG] = T0_64 >> 32;
-    RETURN();
-}
-
-void OPPROTO glue(op_store_T1_gpr64_gpr, REG) (void)
-{
-    env->gpr[REG] = T1_64;
-    env->gprh[REG] = T1_64 >> 32;
-    RETURN();
-}
-
-#if 0 // unused
-void OPPROTO glue(op_store_T2_gpr64_gpr, REG) (void)
-{
-    env->gpr[REG] = T2_64;
-    env->gprh[REG] = T2_64 >> 32;
-    RETURN();
-}
-#endif
-#endif /* !defined(TARGET_PPC64) */
-
 /* Altivec registers moves */
 void OPPROTO glue(op_load_avr_A0_avr, REG) (void)
 {