target-ppc: Introduce DFP Test Exponent

Add emulation of the PowerPC Decimal Floating Point Test Exponent
instructions dtstex[q][.].
Signed-off-by: NTom Musta <tommusta@gmail.com>
Signed-off-by: NAlexander Graf <agraf@suse.de>

target-ppc/dfp_helper.c

@@ -504,3 +504,35 @@ uint32_t helper_##op(CPUPPCState *env, uint64_t *a, uint32_t dcm)        \
 
 DFP_HELPER_TSTDG(dtstdg, 64)
 DFP_HELPER_TSTDG(dtstdgq, 128)
+
+#define DFP_HELPER_TSTEX(op, size)                                       \
+uint32_t helper_##op(CPUPPCState *env, uint64_t *a, uint64_t *b)         \
+{                                                                        \
+    struct PPC_DFP dfp;                                                  \
+    int expa, expb, a_is_special, b_is_special;                          \
+                                                                         \
+    dfp_prepare_decimal##size(&dfp, a, b, env);                          \
+                                                                         \
+    expa = dfp.a.exponent;                                               \
+    expb = dfp.b.exponent;                                               \
+    a_is_special = decNumberIsSpecial(&dfp.a);                           \
+    b_is_special = decNumberIsSpecial(&dfp.b);                           \
+                                                                         \
+    if (a_is_special || b_is_special) {                                  \
+        int atype = a_is_special ? (decNumberIsNaN(&dfp.a) ? 4 : 2) : 1; \
+        int btype = b_is_special ? (decNumberIsNaN(&dfp.b) ? 4 : 2) : 1; \
+        dfp.crbf = (atype ^ btype) ? 0x1 : 0x2;                          \
+    } else if (expa < expb) {                                            \
+        dfp.crbf = 0x8;                                                  \
+    } else if (expa > expb) {                                            \
+        dfp.crbf = 0x4;                                                  \
+    } else {                                                             \
+        dfp.crbf = 0x2;                                                  \
+    }                                                                    \
+                                                                         \
+    dfp_set_FPCC_from_CRBF(&dfp);                                        \
+    return dfp.crbf;                                                     \
+}
+
+DFP_HELPER_TSTEX(dtstex, 64)
+DFP_HELPER_TSTEX(dtstexq, 128)

target-ppc/helper.h

@@ -632,3 +632,5 @@ DEF_HELPER_3(dtstdc, i32, env, fprp, i32)
 DEF_HELPER_3(dtstdcq, i32, env, fprp, i32)
 DEF_HELPER_3(dtstdg, i32, env, fprp, i32)
 DEF_HELPER_3(dtstdgq, i32, env, fprp, i32)
+DEF_HELPER_3(dtstex, i32, env, fprp, fprp)
+DEF_HELPER_3(dtstexq, i32, env, fprp, fprp)

target-ppc/translate.c

@@ -8372,6 +8372,8 @@ GEN_DFP_BF_A_DCM(dtstdc)
 GEN_DFP_BF_A_DCM(dtstdcq)
 GEN_DFP_BF_A_DCM(dtstdg)
 GEN_DFP_BF_A_DCM(dtstdgq)
+GEN_DFP_BF_A_B(dtstex)
+GEN_DFP_BF_A_B(dtstexq)
 /***                           SPE extension                               ***/
 /* Register moves */
 
@@ -11315,6 +11317,8 @@ GEN_DFP_BF_A_DCM(dtstdc, 0x02, 0x06),
 GEN_DFP_BF_Ap_DCM(dtstdcq, 0x02, 0x06),
 GEN_DFP_BF_A_DCM(dtstdg, 0x02, 0x07),
 GEN_DFP_BF_Ap_DCM(dtstdgq, 0x02, 0x07),
+GEN_DFP_BF_A_B(dtstex, 0x02, 0x05),
+GEN_DFP_BF_Ap_Bp(dtstexq, 0x02, 0x05),
 #undef GEN_SPE
 #define GEN_SPE(name0, name1, opc2, opc3, inval0, inval1, type) \
     GEN_OPCODE_DUAL(name0##_##name1, 0x04, opc2, opc3, inval0, inval1, type, PPC_NONE)