RISC-V: Add misa runtime write support
This patch adds support for writing misa. misa is validated based on rules in the ISA specification. 'E' is mutually exclusive with all other extensions. 'D' depends on 'F' so 'D' bit is dropped if 'F' is not present. A conservative approach to consistency is taken by flushing the translation cache on misa writes. misa_mask is added to the CPU struct to store the original set of extensions. Signed-off-by: NMichael Clark <mjc@sifive.com> Signed-off-by: NAlistair Francis <alistair.francis@wdc.com> Reviewed-by: NPalmer Dabbelt <palmer@sifive.com> Signed-off-by: NPalmer Dabbelt <palmer@sifive.com>
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