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提交 e531761d 编写于 作者: A Anthony Liguori
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Merge remote-tracking branch 'kraxel/pixman.v8' into staging 

# By Gerd Hoffmann (18) and others
# Via Blue Swirl (1) and Gerd Hoffmann (1)
* kraxel/pixman.v8: (37 commits)
  console: remove ds_get_* helper functions
  console: zap color_table
  console: stop using DisplayState in gfx hardware emulation
  console: zap displaystate from dcl callbacks
  cocoa: stop using DisplayState
  spice: stop using DisplayState
  sdl: stop using DisplayState
  vnc: stop using DisplayState
  gtk: stop using DisplayState
  console: add surface_*() getters
  console: rework DisplaySurface handling [dcl/ui side]
  console: rework DisplaySurface handling [vga emu side]
  sdl: drop dead code
  qxl: better vga init in enter_vga_mode
  qxl: zap qxl0 global
  spice: zap sdpy global
  console: kill DisplayState->opaque
  console: fix displaychangelisteners interface
  s390: Fix cpu refactoring fallout.
  target-mips: fix rndrashift_short_acc and code for EXTR_ instructions
  ...
上级 b1999e87 1562e531
展开全部 隐藏空白更改
内联 并排
Showing with 3506 addition and 1198 deletion
default-configs/arm-softmmu.mak
浏览文件 @ e531761d
......@@ -42,6 +42,7 @@ CONFIG_PL110=y
CONFIG_PL181=y
CONFIG_PL190=y
CONFIG_PL310=y
CONFIG_PL330=y
CONFIG_CADENCE=y
CONFIG_XGMAC=y
......
hw/Makefile.objs
浏览文件 @ e531761d
......@@ -98,6 +98,7 @@ common-obj-$(CONFIG_PL110) += pl110.o
common-obj-$(CONFIG_PL181) += pl181.o
common-obj-$(CONFIG_PL190) += pl190.o
common-obj-$(CONFIG_PL310) += arm_l2x0.o
common-obj-$(CONFIG_PL330) += pl330.o
common-obj-$(CONFIG_VERSATILE_PCI) += versatile_pci.o
common-obj-$(CONFIG_VERSATILE_I2C) += versatile_i2c.o
common-obj-$(CONFIG_CADENCE) += cadence_uart.o
......
hw/arm/musicpal.c
浏览文件 @ e531761d
......@@ -462,7 +462,7 @@ typedef struct musicpal_lcd_state {
uint32_t irqctrl;
uint32_t page;
uint32_t page_off;
DisplayState *ds;
QemuConsole *con;
uint8_t video_ram[128*64/8];
} musicpal_lcd_state;
......@@ -483,7 +483,8 @@ static inline void glue(set_lcd_pixel, depth) \
(musicpal_lcd_state *s, int x, int y, type col) \
{ \
int dx, dy; \
type *pixel = &((type *) ds_get_data(s->ds))[(y * 128 * 3 + x) * 3]; \
DisplaySurface *surface = qemu_console_surface(s->con); \
type *pixel = &((type *) surface_data(surface))[(y * 128 * 3 + x) * 3]; \
\
for (dy = 0; dy < 3; dy++, pixel += 127 * 3) \
for (dx = 0; dx < 3; dx++, pixel++) \
......@@ -496,9 +497,10 @@ SET_LCD_PIXEL(32, uint32_t)
static void lcd_refresh(void *opaque)
{
musicpal_lcd_state *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
int x, y, col;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
return;
#define LCD_REFRESH(depth, func) \
......@@ -518,14 +520,14 @@ static void lcd_refresh(void *opaque)
break;
LCD_REFRESH(8, rgb_to_pixel8)
LCD_REFRESH(16, rgb_to_pixel16)
LCD_REFRESH(32, (is_surface_bgr(s->ds->surface) ?
LCD_REFRESH(32, (is_surface_bgr(surface) ?
rgb_to_pixel32bgr : rgb_to_pixel32))
default:
hw_error("unsupported colour depth %i\n",
ds_get_bits_per_pixel(s->ds));
surface_bits_per_pixel(surface));
}
dpy_gfx_update(s->ds, 0, 0, 128*3, 64*3);
dpy_gfx_update(s->con, 0, 0, 128*3, 64*3);
}
static void lcd_invalidate(void *opaque)
......@@ -609,9 +611,9 @@ static int musicpal_lcd_init(SysBusDevice *dev)
"musicpal-lcd", MP_LCD_SIZE);
sysbus_init_mmio(dev, &s->iomem);
s->ds = graphic_console_init(lcd_refresh, lcd_invalidate,
NULL, NULL, s);
qemu_console_resize(s->ds, 128*3, 64*3);
s->con = graphic_console_init(lcd_refresh, lcd_invalidate,
NULL, NULL, s);
qemu_console_resize(s->con, 128*3, 64*3);
qdev_init_gpio_in(&dev->qdev, musicpal_lcd_gpio_brigthness_in, 3);
......
hw/arm/nseries.c
浏览文件 @ e531761d
......@@ -1290,7 +1290,6 @@ static void n8x0_init(QEMUMachineInitArgs *args,
MemoryRegion *sysmem = get_system_memory();
struct n800_s *s = (struct n800_s *) g_malloc0(sizeof(*s));
int sdram_size = binfo->ram_size;
DisplayState *ds;
s->mpu = omap2420_mpu_init(sysmem, sdram_size, args->cpu_model);
......@@ -1370,12 +1369,6 @@ static void n8x0_init(QEMUMachineInitArgs *args,
n800_setup_nolo_tags(nolo_tags);
cpu_physical_memory_write(OMAP2_SRAM_BASE, nolo_tags, 0x10000);
}
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
ds = get_displaystate();
ds->surface = qemu_resize_displaysurface(ds, 800, 480);
dpy_gfx_resize(ds);
}
static struct arm_boot_info n800_binfo = {
......
hw/arm/palm.c
浏览文件 @ e531761d
......@@ -205,7 +205,6 @@ static void palmte_init(QEMUMachineInitArgs *args)
static uint32_t cs2val = 0x0000e1a0;
static uint32_t cs3val = 0xe1a0e1a0;
int rom_size, rom_loaded = 0;
DisplayState *ds = get_displaystate();
MemoryRegion *flash = g_new(MemoryRegion, 1);
MemoryRegion *cs = g_new(MemoryRegion, 4);
......@@ -268,12 +267,6 @@ static void palmte_init(QEMUMachineInitArgs *args)
palmte_binfo.initrd_filename = initrd_filename;
arm_load_kernel(mpu->cpu, &palmte_binfo);
}
/* FIXME: We shouldn't really be doing this here. The LCD controller
will set the size once configured, so this just sets an initial
size until the guest activates the display. */
ds->surface = qemu_resize_displaysurface(ds, 320, 320);
dpy_gfx_resize(ds);
}
static QEMUMachine palmte_machine = {
......
hw/arm/vexpress.c
浏览文件 @ e531761d
......@@ -147,19 +147,24 @@ typedef struct VEDBoardInfo VEDBoardInfo;
typedef void DBoardInitFn(const VEDBoardInfo *daughterboard,
ram_addr_t ram_size,
const char *cpu_model,
qemu_irq *pic, uint32_t *proc_id);
qemu_irq *pic);
struct VEDBoardInfo {
const hwaddr *motherboard_map;
hwaddr loader_start;
const hwaddr gic_cpu_if_addr;
uint32_t proc_id;
uint32_t num_voltage_sensors;
const uint32_t *voltages;
uint32_t num_clocks;
const uint32_t *clocks;
DBoardInitFn *init;
};
static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
ram_addr_t ram_size,
const char *cpu_model,
qemu_irq *pic, uint32_t *proc_id)
qemu_irq *pic)
{
MemoryRegion *sysmem = get_system_memory();
MemoryRegion *ram = g_new(MemoryRegion, 1);
......@@ -175,8 +180,6 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
cpu_model = "cortex-a9";
}
*proc_id = 0x0c000191;
for (n = 0; n < smp_cpus; n++) {
ARMCPU *cpu = cpu_arm_init(cpu_model);
if (!cpu) {
......@@ -247,17 +250,41 @@ static void a9_daughterboard_init(const VEDBoardInfo *daughterboard,
sysbus_create_varargs("l2x0", 0x1e00a000, NULL);
}
/* Voltage values for SYS_CFG_VOLT daughterboard registers;
* values are in microvolts.
*/
static const uint32_t a9_voltages[] = {
1000000, /* VD10 : 1.0V : SoC internal logic voltage */
1000000, /* VD10_S2 : 1.0V : PL310, L2 cache, RAM, non-PL310 logic */
1000000, /* VD10_S3 : 1.0V : Cortex-A9, cores, MPEs, SCU, PL310 logic */
1800000, /* VCC1V8 : 1.8V : DDR2 SDRAM, test chip DDR2 I/O supply */
900000, /* DDR2VTT : 0.9V : DDR2 SDRAM VTT termination voltage */
3300000, /* VCC3V3 : 3.3V : local board supply for misc external logic */
};
/* Reset values for daughterboard oscillators (in Hz) */
static const uint32_t a9_clocks[] = {
45000000, /* AMBA AXI ACLK: 45MHz */
23750000, /* daughterboard CLCD clock: 23.75MHz */
66670000, /* Test chip reference clock: 66.67MHz */
};
static const VEDBoardInfo a9_daughterboard = {
.motherboard_map = motherboard_legacy_map,
.loader_start = 0x60000000,
.gic_cpu_if_addr = 0x1e000100,
.proc_id = 0x0c000191,
.num_voltage_sensors = ARRAY_SIZE(a9_voltages),
.voltages = a9_voltages,
.num_clocks = ARRAY_SIZE(a9_clocks),
.clocks = a9_clocks,
.init = a9_daughterboard_init,
};
static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
ram_addr_t ram_size,
const char *cpu_model,
qemu_irq *pic, uint32_t *proc_id)
qemu_irq *pic)
{
int n;
MemoryRegion *sysmem = get_system_memory();
......@@ -271,8 +298,6 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
cpu_model = "cortex-a15";
}
*proc_id = 0x14000237;
for (n = 0; n < smp_cpus; n++) {
ARMCPU *cpu;
qemu_irq *irqp;
......@@ -340,10 +365,31 @@ static void a15_daughterboard_init(const VEDBoardInfo *daughterboard,
/* 0x7ffd0000: PL354 static memory controller: not modelled */
}
static const uint32_t a15_voltages[] = {
900000, /* Vcore: 0.9V : CPU core voltage */
};
static const uint32_t a15_clocks[] = {
60000000, /* OSCCLK0: 60MHz : CPU_CLK reference */
0, /* OSCCLK1: reserved */
0, /* OSCCLK2: reserved */
0, /* OSCCLK3: reserved */
40000000, /* OSCCLK4: 40MHz : external AXI master clock */
23750000, /* OSCCLK5: 23.75MHz : HDLCD PLL reference */
50000000, /* OSCCLK6: 50MHz : static memory controller clock */
60000000, /* OSCCLK7: 60MHz : SYSCLK reference */
40000000, /* OSCCLK8: 40MHz : DDR2 PLL reference */
};
static const VEDBoardInfo a15_daughterboard = {
.motherboard_map = motherboard_aseries_map,
.loader_start = 0x80000000,
.gic_cpu_if_addr = 0x2c002000,
.proc_id = 0x14000237,
.num_voltage_sensors = ARRAY_SIZE(a15_voltages),
.voltages = a15_voltages,
.num_clocks = ARRAY_SIZE(a15_clocks),
.clocks = a15_clocks,
.init = a15_daughterboard_init,
};
......@@ -352,7 +398,6 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
{
DeviceState *dev, *sysctl, *pl041;
qemu_irq pic[64];
uint32_t proc_id;
uint32_t sys_id;
DriveInfo *dinfo;
ram_addr_t vram_size, sram_size;
......@@ -360,9 +405,9 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
MemoryRegion *vram = g_new(MemoryRegion, 1);
MemoryRegion *sram = g_new(MemoryRegion, 1);
const hwaddr *map = daughterboard->motherboard_map;
int i;
daughterboard->init(daughterboard, args->ram_size, args->cpu_model,
pic, &proc_id);
daughterboard->init(daughterboard, args->ram_size, args->cpu_model, pic);
/* Motherboard peripherals: the wiring is the same but the
* addresses vary between the legacy and A-Series memory maps.
......@@ -372,7 +417,21 @@ static void vexpress_common_init(const VEDBoardInfo *daughterboard,
sysctl = qdev_create(NULL, "realview_sysctl");
qdev_prop_set_uint32(sysctl, "sys_id", sys_id);
qdev_prop_set_uint32(sysctl, "proc_id", proc_id);
qdev_prop_set_uint32(sysctl, "proc_id", daughterboard->proc_id);
qdev_prop_set_uint32(sysctl, "len-db-voltage",
daughterboard->num_voltage_sensors);
for (i = 0; i < daughterboard->num_voltage_sensors; i++) {
char *propname = g_strdup_printf("db-voltage[%d]", i);
qdev_prop_set_uint32(sysctl, propname, daughterboard->voltages[i]);
g_free(propname);
}
qdev_prop_set_uint32(sysctl, "len-db-clock",
daughterboard->num_clocks);
for (i = 0; i < daughterboard->num_clocks; i++) {
char *propname = g_strdup_printf("db-clock[%d]", i);
qdev_prop_set_uint32(sysctl, propname, daughterboard->clocks[i]);
g_free(propname);
}
qdev_init_nofail(sysctl);
sysbus_mmio_map(SYS_BUS_DEVICE(sysctl), 0, map[VE_SYSREGS]);
......
hw/arm/xilinx_zynq.c
浏览文件 @ e531761d
......@@ -35,6 +35,10 @@
#define IRQ_OFFSET 32 /* pic interrupts start from index 32 */
static const int dma_irqs[8] = {
46, 47, 48, 49, 72, 73, 74, 75
};
static struct arm_boot_info zynq_binfo = {};
static void gem_init(NICInfo *nd, uint32_t base, qemu_irq irq)
......@@ -196,6 +200,26 @@ static void zynq_init(QEMUMachineInitArgs *args)
sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0xE0101000);
sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, pic[79-IRQ_OFFSET]);
dev = qdev_create(NULL, "pl330");
qdev_prop_set_uint8(dev, "num_chnls", 8);
qdev_prop_set_uint8(dev, "num_periph_req", 4);
qdev_prop_set_uint8(dev, "num_events", 16);
qdev_prop_set_uint8(dev, "data_width", 64);
qdev_prop_set_uint8(dev, "wr_cap", 8);
qdev_prop_set_uint8(dev, "wr_q_dep", 16);
qdev_prop_set_uint8(dev, "rd_cap", 8);
qdev_prop_set_uint8(dev, "rd_q_dep", 16);
qdev_prop_set_uint16(dev, "data_buffer_dep", 256);
qdev_init_nofail(dev);
busdev = SYS_BUS_DEVICE(dev);
sysbus_mmio_map(busdev, 0, 0xF8003000);
sysbus_connect_irq(busdev, 0, pic[45-IRQ_OFFSET]); /* abort irq line */
for (n = 0; n < 8; ++n) { /* event irqs */
sysbus_connect_irq(busdev, n + 1, pic[dma_irqs[n] - IRQ_OFFSET]);
}
zynq_binfo.ram_size = ram_size;
zynq_binfo.kernel_filename = kernel_filename;
zynq_binfo.kernel_cmdline = kernel_cmdline;
......
hw/arm_sysctl.c
浏览文件 @ e531761d
......@@ -9,6 +9,7 @@
#include "hw/hw.h"
#include "qemu/timer.h"
#include "qemu/bitops.h"
#include "hw/sysbus.h"
#include "hw/primecell.h"
#include "sysemu/sysemu.h"
......@@ -34,11 +35,17 @@ typedef struct {
uint32_t sys_cfgctrl;
uint32_t sys_cfgstat;
uint32_t sys_clcd;
uint32_t mb_clock[6];
uint32_t *db_clock;
uint32_t db_num_vsensors;
uint32_t *db_voltage;
uint32_t db_num_clocks;
uint32_t *db_clock_reset;
} arm_sysctl_state;
static const VMStateDescription vmstate_arm_sysctl = {
.name = "realview_sysctl",
.version_id = 3,
.version_id = 4,
.minimum_version_id = 1,
.fields = (VMStateField[]) {
VMSTATE_UINT32(leds, arm_sysctl_state),
......@@ -53,6 +60,9 @@ static const VMStateDescription vmstate_arm_sysctl = {
VMSTATE_UINT32_V(sys_cfgctrl, arm_sysctl_state, 2),
VMSTATE_UINT32_V(sys_cfgstat, arm_sysctl_state, 2),
VMSTATE_UINT32_V(sys_clcd, arm_sysctl_state, 3),
VMSTATE_UINT32_ARRAY_V(mb_clock, arm_sysctl_state, 6, 4),
VMSTATE_VARRAY_UINT32(db_clock, arm_sysctl_state, db_num_clocks,
4, vmstate_info_uint32, uint32_t),
VMSTATE_END_OF_LIST()
}
};
......@@ -76,6 +86,7 @@ static int board_id(arm_sysctl_state *s)
static void arm_sysctl_reset(DeviceState *d)
{
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, SYS_BUS_DEVICE(d));
int i;
s->leds = 0;
s->lockval = 0;
......@@ -83,6 +94,17 @@ static void arm_sysctl_reset(DeviceState *d)
s->cfgdata2 = 0;
s->flags = 0;
s->resetlevel = 0;
/* Motherboard oscillators (in Hz) */
s->mb_clock[0] = 50000000; /* Static memory clock: 50MHz */
s->mb_clock[1] = 23750000; /* motherboard CLCD clock: 23.75MHz */
s->mb_clock[2] = 24000000; /* IO FPGA peripheral clock: 24MHz */
s->mb_clock[3] = 24000000; /* IO FPGA reserved clock: 24MHz */
s->mb_clock[4] = 24000000; /* System bus global clock: 24MHz */
s->mb_clock[5] = 24000000; /* IO FPGA reserved clock: 24MHz */
/* Daughterboard oscillators: reset from property values */
for (i = 0; i < s->db_num_clocks; i++) {
s->db_clock[i] = s->db_clock_reset[i];
}
if (board_id(s) == BOARD_ID_VEXPRESS) {
/* On VExpress this register will RAZ/WI */
s->sys_clcd = 0;
......@@ -191,6 +213,166 @@ static uint64_t arm_sysctl_read(void *opaque, hwaddr offset,
}
}
/* SYS_CFGCTRL functions */
#define SYS_CFG_OSC 1
#define SYS_CFG_VOLT 2
#define SYS_CFG_AMP 3
#define SYS_CFG_TEMP 4
#define SYS_CFG_RESET 5
#define SYS_CFG_SCC 6
#define SYS_CFG_MUXFPGA 7
#define SYS_CFG_SHUTDOWN 8
#define SYS_CFG_REBOOT 9
#define SYS_CFG_DVIMODE 11
#define SYS_CFG_POWER 12
#define SYS_CFG_ENERGY 13
/* SYS_CFGCTRL site field values */
#define SYS_CFG_SITE_MB 0
#define SYS_CFG_SITE_DB1 1
#define SYS_CFG_SITE_DB2 2
/**
* vexpress_cfgctrl_read:
* @s: arm_sysctl_state pointer
* @dcc, @function, @site, @position, @device: split out values from
* SYS_CFGCTRL register
* @val: pointer to where to put the read data on success
*
* Handle a VExpress SYS_CFGCTRL register read. On success, return true and
* write the read value to *val. On failure, return false (and val may
* or may not be written to).
*/
static bool vexpress_cfgctrl_read(arm_sysctl_state *s, unsigned int dcc,
unsigned int function, unsigned int site,
unsigned int position, unsigned int device,
uint32_t *val)
{
/* We don't support anything other than DCC 0, board stack position 0
* or sites other than motherboard/daughterboard:
*/
if (dcc != 0 || position != 0 ||
(site != SYS_CFG_SITE_MB && site != SYS_CFG_SITE_DB1)) {
goto cfgctrl_unimp;
}
switch (function) {
case SYS_CFG_VOLT:
if (site == SYS_CFG_SITE_DB1 && device < s->db_num_vsensors) {
*val = s->db_voltage[device];
return true;
}
if (site == SYS_CFG_SITE_MB && device == 0) {
/* There is only one motherboard voltage sensor:
* VIO : 3.3V : bus voltage between mother and daughterboard
*/
*val = 3300000;
return true;
}
break;
case SYS_CFG_OSC:
if (site == SYS_CFG_SITE_MB && device < sizeof(s->mb_clock)) {
/* motherboard clock */
*val = s->mb_clock[device];
return true;
}
if (site == SYS_CFG_SITE_DB1 && device < s->db_num_clocks) {
/* daughterboard clock */
*val = s->db_clock[device];
return true;
}
break;
default:
break;
}
cfgctrl_unimp:
qemu_log_mask(LOG_UNIMP,
"arm_sysctl: Unimplemented SYS_CFGCTRL read of function "
"0x%x DCC 0x%x site 0x%x position 0x%x device 0x%x\n",
function, dcc, site, position, device);
return false;
}
/**
* vexpress_cfgctrl_write:
* @s: arm_sysctl_state pointer
* @dcc, @function, @site, @position, @device: split out values from
* SYS_CFGCTRL register
* @val: data to write
*
* Handle a VExpress SYS_CFGCTRL register write. On success, return true.
* On failure, return false.
*/
static bool vexpress_cfgctrl_write(arm_sysctl_state *s, unsigned int dcc,
unsigned int function, unsigned int site,
unsigned int position, unsigned int device,
uint32_t val)
{
/* We don't support anything other than DCC 0, board stack position 0
* or sites other than motherboard/daughterboard:
*/
if (dcc != 0 || position != 0 ||
(site != SYS_CFG_SITE_MB && site != SYS_CFG_SITE_DB1)) {
goto cfgctrl_unimp;
}
switch (function) {
case SYS_CFG_OSC:
if (site == SYS_CFG_SITE_MB && device < sizeof(s->mb_clock)) {
/* motherboard clock */
s->mb_clock[device] = val;
return true;
}
if (site == SYS_CFG_SITE_DB1 && device < s->db_num_clocks) {
/* daughterboard clock */
s->db_clock[device] = val;
return true;
}
break;
case SYS_CFG_MUXFPGA:
if (site == SYS_CFG_SITE_MB && device == 0) {
/* Select whether video output comes from motherboard
* or daughterboard: log and ignore as QEMU doesn't
* support this.
*/
qemu_log_mask(LOG_UNIMP, "arm_sysctl: selection of video output "
"not supported, ignoring\n");
return true;
}
break;
case SYS_CFG_SHUTDOWN:
if (site == SYS_CFG_SITE_MB && device == 0) {
qemu_system_shutdown_request();
return true;
}
break;
case SYS_CFG_REBOOT:
if (site == SYS_CFG_SITE_MB && device == 0) {
qemu_system_reset_request();
return true;
}
break;
case SYS_CFG_DVIMODE:
if (site == SYS_CFG_SITE_MB && device == 0) {
/* Selecting DVI mode is meaningless for QEMU: we will
* always display the output correctly according to the
* pixel height/width programmed into the CLCD controller.
*/
return true;
}
default:
break;
}
cfgctrl_unimp:
qemu_log_mask(LOG_UNIMP,
"arm_sysctl: Unimplemented SYS_CFGCTRL write of function "
"0x%x DCC 0x%x site 0x%x position 0x%x device 0x%x\n",
function, dcc, site, position, device);
return false;
}
static void arm_sysctl_write(void *opaque, hwaddr offset,
uint64_t val, unsigned size)
{
......@@ -322,17 +504,33 @@ static void arm_sysctl_write(void *opaque, hwaddr offset,
if (board_id(s) != BOARD_ID_VEXPRESS) {
goto bad_reg;
}
s->sys_cfgctrl = val & ~(3 << 18);
s->sys_cfgstat = 1; /* complete */
switch (s->sys_cfgctrl) {
case 0xc0800000: /* SYS_CFG_SHUTDOWN to motherboard */
qemu_system_shutdown_request();
break;
case 0xc0900000: /* SYS_CFG_REBOOT to motherboard */
qemu_system_reset_request();
break;
default:
s->sys_cfgstat |= 2; /* error */
/* Undefined bits [19:18] are RAZ/WI, and writing to
* the start bit just triggers the action; it always reads
* as zero.
*/
s->sys_cfgctrl = val & ~((3 << 18) | (1 << 31));
if (val & (1 << 31)) {
/* Start bit set -- actually do something */
unsigned int dcc = extract32(s->sys_cfgctrl, 26, 4);
unsigned int function = extract32(s->sys_cfgctrl, 20, 6);
unsigned int site = extract32(s->sys_cfgctrl, 16, 2);
unsigned int position = extract32(s->sys_cfgctrl, 12, 4);
unsigned int device = extract32(s->sys_cfgctrl, 0, 12);
s->sys_cfgstat = 1; /* complete */
if (s->sys_cfgctrl & (1 << 30)) {
if (!vexpress_cfgctrl_write(s, dcc, function, site, position,
device, s->sys_cfgdata)) {
s->sys_cfgstat |= 2; /* error */
}
} else {
uint32_t val;
if (!vexpress_cfgctrl_read(s, dcc, function, site, position,
device, &val)) {
s->sys_cfgstat |= 2; /* error */
} else {
s->sys_cfgdata = val;
}
}
}
s->sys_cfgctrl &= ~(1 << 31);
return;
......@@ -385,29 +583,50 @@ static void arm_sysctl_gpio_set(void *opaque, int line, int level)
}
}
static int arm_sysctl_init(SysBusDevice *dev)
static void arm_sysctl_init(Object *obj)
{
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
DeviceState *dev = DEVICE(obj);
SysBusDevice *sd = SYS_BUS_DEVICE(obj);
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, sd);
memory_region_init_io(&s->iomem, &arm_sysctl_ops, s, "arm-sysctl", 0x1000);
sysbus_init_mmio(dev, &s->iomem);
qdev_init_gpio_in(&s->busdev.qdev, arm_sysctl_gpio_set, 2);
qdev_init_gpio_out(&s->busdev.qdev, &s->pl110_mux_ctrl, 1);
return 0;
sysbus_init_mmio(sd, &s->iomem);
qdev_init_gpio_in(dev, arm_sysctl_gpio_set, 2);
qdev_init_gpio_out(dev, &s->pl110_mux_ctrl, 1);
}
static void arm_sysctl_realize(DeviceState *d, Error **errp)
{
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, SYS_BUS_DEVICE(d));
s->db_clock = g_new0(uint32_t, s->db_num_clocks);
}
static void arm_sysctl_finalize(Object *obj)
{
SysBusDevice *dev = SYS_BUS_DEVICE(obj);
arm_sysctl_state *s = FROM_SYSBUS(arm_sysctl_state, dev);
g_free(s->db_voltage);
g_free(s->db_clock);
g_free(s->db_clock_reset);
}
static Property arm_sysctl_properties[] = {
DEFINE_PROP_UINT32("sys_id", arm_sysctl_state, sys_id, 0),
DEFINE_PROP_UINT32("proc_id", arm_sysctl_state, proc_id, 0),
/* Daughterboard power supply voltages (as reported via SYS_CFG) */
DEFINE_PROP_ARRAY("db-voltage", arm_sysctl_state, db_num_vsensors,
db_voltage, qdev_prop_uint32, uint32_t),
/* Daughterboard clock reset values (as reported via SYS_CFG) */
DEFINE_PROP_ARRAY("db-clock", arm_sysctl_state, db_num_clocks,
db_clock_reset, qdev_prop_uint32, uint32_t),
DEFINE_PROP_END_OF_LIST(),
};
static void arm_sysctl_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *k = SYS_BUS_DEVICE_CLASS(klass);
k->init = arm_sysctl_init;
dc->realize = arm_sysctl_realize;
dc->reset = arm_sysctl_reset;
dc->vmsd = &vmstate_arm_sysctl;
dc->props = arm_sysctl_properties;
......@@ -417,6 +636,8 @@ static const TypeInfo arm_sysctl_info = {
.name = "realview_sysctl",
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(arm_sysctl_state),
.instance_init = arm_sysctl_init,
.instance_finalize = arm_sysctl_finalize,
.class_init = arm_sysctl_class_init,
};
......
hw/blizzard.c
浏览文件 @ e531761d
......@@ -69,7 +69,7 @@ typedef struct {
uint8_t effect;
uint8_t iformat;
uint8_t source;
DisplayState *state;
QemuConsole *con;
blizzard_fn_t *line_fn_tab[2];
void *fb;
......@@ -144,6 +144,7 @@ static inline void blizzard_rgb2yuv(int r, int g, int b,
static void blizzard_window(BlizzardState *s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *src, *dst;
int bypp[2];
int bypl[3];
......@@ -162,7 +163,7 @@ static void blizzard_window(BlizzardState *s)
s->my[1] = s->data.y + s->data.dy;
bypp[0] = s->bpp;
bypp[1] = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
bypp[1] = surface_bytes_per_pixel(surface);
bypl[0] = bypp[0] * s->data.pitch;
bypl[1] = bypp[1] * s->x;
bypl[2] = bypp[0] * s->data.dx;
......@@ -883,23 +884,25 @@ void s1d13745_write_block(void *opaque, int dc,
static void blizzard_update_display(void *opaque)
{
BlizzardState *s = (BlizzardState *) opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
int y, bypp, bypl, bwidth;
uint8_t *src, *dst;
if (!s->enable)
return;
if (s->x != ds_get_width(s->state) || s->y != ds_get_height(s->state)) {
if (s->x != surface_width(surface) || s->y != surface_height(surface)) {
s->invalidate = 1;
qemu_console_resize(s->state, s->x, s->y);
qemu_console_resize(s->con, s->x, s->y);
surface = qemu_console_surface(s->con);
}
if (s->invalidate) {
s->invalidate = 0;
if (s->blank) {
bypp = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
memset(ds_get_data(s->state), 0, bypp * s->x * s->y);
bypp = surface_bytes_per_pixel(surface);
memset(surface_data(surface), 0, bypp * s->x * s->y);
return;
}
......@@ -912,16 +915,16 @@ static void blizzard_update_display(void *opaque)
if (s->mx[1] <= s->mx[0])
return;
bypp = (ds_get_bits_per_pixel(s->state) + 7) >> 3;
bypp = surface_bytes_per_pixel(surface);
bypl = bypp * s->x;
bwidth = bypp * (s->mx[1] - s->mx[0]);
y = s->my[0];
src = s->fb + bypl * y + bypp * s->mx[0];
dst = ds_get_data(s->state) + bypl * y + bypp * s->mx[0];
dst = surface_data(surface) + bypl * y + bypp * s->mx[0];
for (; y < s->my[1]; y ++, src += bypl, dst += bypl)
memcpy(dst, src, bwidth);
dpy_gfx_update(s->state, s->mx[0], s->my[0],
dpy_gfx_update(s->con, s->mx[0], s->my[0],
s->mx[1] - s->mx[0], y - s->my[0]);
s->mx[0] = s->x;
......@@ -934,10 +937,12 @@ static void blizzard_screen_dump(void *opaque, const char *filename,
bool cswitch, Error **errp)
{
BlizzardState *s = (BlizzardState *) opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
blizzard_update_display(opaque);
if (s && ds_get_data(s->state))
ppm_save(filename, s->state->surface, errp);
if (s && surface_data(surface)) {
ppm_save(filename, surface, errp);
}
}
#define DEPTH 8
......@@ -954,14 +959,16 @@ static void blizzard_screen_dump(void *opaque, const char *filename,
void *s1d13745_init(qemu_irq gpio_int)
{
BlizzardState *s = (BlizzardState *) g_malloc0(sizeof(*s));
DisplaySurface *surface;
s->fb = g_malloc(0x180000);
s->state = graphic_console_init(blizzard_update_display,
blizzard_invalidate_display,
blizzard_screen_dump, NULL, s);
s->con = graphic_console_init(blizzard_update_display,
blizzard_invalidate_display,
blizzard_screen_dump, NULL, s);
surface = qemu_console_surface(s->con);
switch (ds_get_bits_per_pixel(s->state)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
s->line_fn_tab[0] = s->line_fn_tab[1] =
g_malloc0(sizeof(blizzard_fn_t) * 0x10);
......
hw/cirrus_vga.c
浏览文件 @ e531761d
......@@ -729,11 +729,12 @@ static void cirrus_do_copy(CirrusVGAState *s, int dst, int src, int w, int h)
s->cirrus_blt_dstpitch, s->cirrus_blt_srcpitch,
s->cirrus_blt_width, s->cirrus_blt_height);
if (notify)
qemu_console_copy(s->vga.ds,
if (notify) {
qemu_console_copy(s->vga.con,
sx, sy, dx, dy,
s->cirrus_blt_width / depth,
s->cirrus_blt_height);
}
/* we don't have to notify the display that this portion has
changed since qemu_console_copy implies this */
......@@ -2176,6 +2177,7 @@ static void cirrus_cursor_invalidate(VGACommonState *s1)
static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
{
CirrusVGAState *s = container_of(s1, CirrusVGAState, vga);
DisplaySurface *surface = qemu_console_surface(s->vga.con);
int w, h, bpp, x1, x2, poffset;
unsigned int color0, color1;
const uint8_t *palette, *src;
......@@ -2228,9 +2230,9 @@ static void cirrus_cursor_draw_line(VGACommonState *s1, uint8_t *d1, int scr_y)
color1 = s->vga.rgb_to_pixel(c6_to_8(palette[0xf * 3]),
c6_to_8(palette[0xf * 3 + 1]),
c6_to_8(palette[0xf * 3 + 2]));
bpp = ((ds_get_bits_per_pixel(s->vga.ds) + 7) >> 3);
bpp = surface_bytes_per_pixel(surface);
d1 += x1 * bpp;
switch(ds_get_bits_per_pixel(s->vga.ds)) {
switch (surface_bits_per_pixel(surface)) {
default:
break;
case 8:
......@@ -2908,9 +2910,9 @@ static int vga_initfn(ISADevice *dev)
vga_common_init(s);
cirrus_init_common(&d->cirrus_vga, CIRRUS_ID_CLGD5430, 0,
isa_address_space(dev), isa_address_space_io(dev));
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update,
s);
s->con = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update,
s);
rom_add_vga(VGABIOS_CIRRUS_FILENAME);
/* XXX ISA-LFB support */
/* FIXME not qdev yet */
......@@ -2957,9 +2959,9 @@ static int pci_cirrus_vga_initfn(PCIDevice *dev)
vga_common_init(&s->vga);
cirrus_init_common(s, device_id, 1, pci_address_space(dev),
pci_address_space_io(dev));
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update,
&s->vga);
s->vga.con = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update,
&s->vga);
/* setup PCI */
......
hw/exynos4210_fimd.c
浏览文件 @ e531761d
......@@ -296,7 +296,7 @@ struct Exynos4210fimdWindow {
typedef struct {
SysBusDevice busdev;
MemoryRegion iomem;
DisplayState *console;
QemuConsole *console;
qemu_irq irq[3];
uint32_t vidcon[4]; /* Video main control registers 0-3 */
......@@ -1221,16 +1221,18 @@ static void exynos4210_fimd_invalidate(void *opaque)
static void exynos4210_update_resolution(Exynos4210fimdState *s)
{
DisplaySurface *surface = qemu_console_surface(s->console);
/* LCD resolution is stored in VIDEO TIME CONTROL REGISTER 2 */
uint32_t width = ((s->vidtcon[2] >> FIMD_VIDTCON2_HOR_SHIFT) &
FIMD_VIDTCON2_SIZE_MASK) + 1;
uint32_t height = ((s->vidtcon[2] >> FIMD_VIDTCON2_VER_SHIFT) &
FIMD_VIDTCON2_SIZE_MASK) + 1;
if (s->ifb == NULL || ds_get_width(s->console) != width ||
ds_get_height(s->console) != height) {
if (s->ifb == NULL || surface_width(surface) != width ||
surface_height(surface) != height) {
DPRINT_L1("Resolution changed from %ux%u to %ux%u\n",
ds_get_width(s->console), ds_get_height(s->console), width, height);
surface_width(surface), surface_height(surface), width, height);
qemu_console_resize(s->console, width, height);
s->ifb = g_realloc(s->ifb, width * height * RGBA_SIZE + 1);
memset(s->ifb, 0, width * height * RGBA_SIZE + 1);
......@@ -1241,6 +1243,7 @@ static void exynos4210_update_resolution(Exynos4210fimdState *s)
static void exynos4210_fimd_update(void *opaque)
{
Exynos4210fimdState *s = (Exynos4210fimdState *)opaque;
DisplaySurface *surface = qemu_console_surface(s->console);
Exynos4210fimdWindow *w;
int i, line;
hwaddr fb_line_addr, inc_size;
......@@ -1253,7 +1256,7 @@ static void exynos4210_fimd_update(void *opaque)
const int global_height = ((s->vidtcon[2] >> FIMD_VIDTCON2_VER_SHIFT) &
FIMD_VIDTCON2_SIZE_MASK) + 1;
if (!s || !s->console || !ds_get_bits_per_pixel(s->console) ||
if (!s || !s->console || !surface_bits_per_pixel(surface) ||
!s->enabled) {
return;
}
......@@ -1299,10 +1302,10 @@ static void exynos4210_fimd_update(void *opaque)
uint8_t *d;
int bpp;
bpp = ds_get_bits_per_pixel(s->console);
bpp = surface_bits_per_pixel(surface);
fimd_update_putpix_qemu(bpp);
bpp = (bpp + 1) >> 3;
d = ds_get_data(s->console);
d = surface_data(surface);
for (line = first_line; line <= last_line; line++) {
fimd_copy_line_toqemu(global_width, s->ifb + global_width * line *
RGBA_SIZE, d + global_width * line * bpp);
......
hw/framebuffer.c
浏览文件 @ e531761d
......@@ -24,7 +24,7 @@
/* Render an image from a shared memory framebuffer. */
void framebuffer_update_display(
DisplayState *ds,
DisplaySurface *ds,
MemoryRegion *address_space,
hwaddr base,
int cols, /* Width in pixels. */
......@@ -73,7 +73,7 @@ void framebuffer_update_display(
return;
}
src = src_base;
dest = ds_get_data(ds);
dest = surface_data(ds);
if (dest_col_pitch < 0)
dest -= dest_col_pitch * (cols - 1);
if (dest_row_pitch < 0) {
......
hw/framebuffer.h
浏览文件 @ e531761d
......@@ -8,7 +8,7 @@
typedef void (*drawfn)(void *, uint8_t *, const uint8_t *, int, int);
void framebuffer_update_display(
DisplayState *ds,
DisplaySurface *ds,
MemoryRegion *address_space,
hwaddr base,
int cols,
......
hw/g364fb.c
浏览文件 @ e531761d
......@@ -39,7 +39,7 @@ typedef struct G364State {
uint32_t top_of_screen;
uint32_t width, height; /* in pixels */
/* display refresh support */
DisplayState *ds;
QemuConsole *con;
int depth;
int blanked;
} G364State;
......@@ -77,6 +77,7 @@ static inline void reset_dirty(G364State *s,
static void g364fb_draw_graphic8(G364State *s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i, w;
uint8_t *vram;
uint8_t *data_display, *dd;
......@@ -87,7 +88,7 @@ static void g364fb_draw_graphic8(G364State *s)
int xcursor, ycursor;
unsigned int (*rgb_to_pixel)(unsigned int r, unsigned int g, unsigned int b);
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 8:
rgb_to_pixel = rgb_to_pixel8;
w = 1;
......@@ -106,7 +107,7 @@ static void g364fb_draw_graphic8(G364State *s)
break;
default:
hw_error("g364: unknown host depth %d",
ds_get_bits_per_pixel(s->ds));
surface_bits_per_pixel(surface));
return;
}
......@@ -129,7 +130,7 @@ static void g364fb_draw_graphic8(G364State *s)
vram = s->vram + s->top_of_screen;
/* XXX: out of range in vram? */
data_display = dd = ds_get_data(s->ds);
data_display = dd = surface_data(surface);
while (y < s->height) {
if (check_dirty(s, page)) {
if (y < ymin)
......@@ -182,7 +183,7 @@ static void g364fb_draw_graphic8(G364State *s)
ymax = s->height - 1;
goto done;
}
data_display = dd = data_display + ds_get_linesize(s->ds);
data_display = dd = data_display + surface_stride(surface);
xmin = 0;
x = 0;
}
......@@ -197,7 +198,7 @@ static void g364fb_draw_graphic8(G364State *s)
reset_dirty(s, page_min, page_max);
page_min = (ram_addr_t)-1;
page_max = 0;
dpy_gfx_update(s->ds, xmin, ymin,
dpy_gfx_update(s->con, xmin, ymin,
xmax - xmin + 1, ymax - ymin + 1);
xmin = s->width;
xmax = 0;
......@@ -209,7 +210,7 @@ static void g364fb_draw_graphic8(G364State *s)
x = x % s->width;
y += dy;
vram += G364_PAGE_SIZE;
data_display += dy * ds_get_linesize(s->ds);
data_display += dy * surface_stride(surface);
dd = data_display + x * w;
}
page += G364_PAGE_SIZE;
......@@ -217,13 +218,14 @@ static void g364fb_draw_graphic8(G364State *s)
done:
if (page_min != (ram_addr_t)-1) {
dpy_gfx_update(s->ds, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
dpy_gfx_update(s->con, xmin, ymin, xmax - xmin + 1, ymax - ymin + 1);
reset_dirty(s, page_min, page_max);
}
}
static void g364fb_draw_blank(G364State *s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i, w;
uint8_t *d;
......@@ -232,28 +234,30 @@ static void g364fb_draw_blank(G364State *s)
return;
}
w = s->width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
d = ds_get_data(s->ds);
w = s->width * surface_bytes_per_pixel(surface);
d = surface_data(surface);
for (i = 0; i < s->height; i++) {
memset(d, 0, w);
d += ds_get_linesize(s->ds);
d += surface_stride(surface);
}
dpy_gfx_update(s->ds, 0, 0, s->width, s->height);
dpy_gfx_update(s->con, 0, 0, s->width, s->height);
s->blanked = 1;
}
static void g364fb_update_display(void *opaque)
{
G364State *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
qemu_flush_coalesced_mmio_buffer();
if (s->width == 0 || s->height == 0)
return;
if (s->width != ds_get_width(s->ds) || s->height != ds_get_height(s->ds)) {
qemu_console_resize(s->ds, s->width, s->height);
if (s->width != surface_width(surface) ||
s->height != surface_height(surface)) {
qemu_console_resize(s->con, s->width, s->height);
}
if (s->ctla & CTLA_FORCE_BLANK) {
......@@ -413,13 +417,14 @@ static void g364fb_update_depth(G364State *s)
static void g364_invalidate_cursor_position(G364State *s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int ymin, ymax, start, end;
/* invalidate only near the cursor */
ymin = s->cursor_position & 0xfff;
ymax = MIN(s->height, ymin + 64);
start = ymin * ds_get_linesize(s->ds);
end = (ymax + 1) * ds_get_linesize(s->ds);
start = ymin * surface_stride(surface);
end = (ymax + 1) * surface_stride(surface);
memory_region_set_dirty(&s->mem_vram, start, end - start);
}
......@@ -545,9 +550,9 @@ static void g364fb_init(DeviceState *dev, G364State *s)
{
s->vram = g_malloc0(s->vram_size);
s->ds = graphic_console_init(g364fb_update_display,
g364fb_invalidate_display,
g364fb_screen_dump, NULL, s);
s->con = graphic_console_init(g364fb_update_display,
g364fb_invalidate_display,
g364fb_screen_dump, NULL, s);
memory_region_init_io(&s->mem_ctrl, &g364fb_ctrl_ops, s, "ctrl", 0x180000);
memory_region_init_ram_ptr(&s->mem_vram, "vram",
......
hw/jazz_led.c
浏览文件 @ e531761d
......@@ -36,7 +36,7 @@ typedef struct LedState {
SysBusDevice busdev;
MemoryRegion iomem;
uint8_t segments;
DisplayState *ds;
QemuConsole *con;
screen_state_t state;
} LedState;
......@@ -75,13 +75,15 @@ static const MemoryRegionOps led_ops = {
/***********************************************************/
/* jazz_led display */
static void draw_horizontal_line(DisplayState *ds, int posy, int posx1, int posx2, uint32_t color)
static void draw_horizontal_line(DisplaySurface *ds,
int posy, int posx1, int posx2,
uint32_t color)
{
uint8_t *d;
int x, bpp;
bpp = (ds_get_bits_per_pixel(ds) + 7) >> 3;
d = ds_get_data(ds) + ds_get_linesize(ds) * posy + bpp * posx1;
bpp = (surface_bits_per_pixel(ds) + 7) >> 3;
d = surface_data(ds) + surface_stride(ds) * posy + bpp * posx1;
switch(bpp) {
case 1:
for (x = posx1; x <= posx2; x++) {
......@@ -104,30 +106,32 @@ static void draw_horizontal_line(DisplayState *ds, int posy, int posx1, int posx
}
}
static void draw_vertical_line(DisplayState *ds, int posx, int posy1, int posy2, uint32_t color)
static void draw_vertical_line(DisplaySurface *ds,
int posx, int posy1, int posy2,
uint32_t color)
{
uint8_t *d;
int y, bpp;
bpp = (ds_get_bits_per_pixel(ds) + 7) >> 3;
d = ds_get_data(ds) + ds_get_linesize(ds) * posy1 + bpp * posx;
bpp = (surface_bits_per_pixel(ds) + 7) >> 3;
d = surface_data(ds) + surface_stride(ds) * posy1 + bpp * posx;
switch(bpp) {
case 1:
for (y = posy1; y <= posy2; y++) {
*((uint8_t *)d) = color;
d += ds_get_linesize(ds);
d += surface_stride(ds);
}
break;
case 2:
for (y = posy1; y <= posy2; y++) {
*((uint16_t *)d) = color;
d += ds_get_linesize(ds);
d += surface_stride(ds);
}
break;
case 4:
for (y = posy1; y <= posy2; y++) {
*((uint32_t *)d) = color;
d += ds_get_linesize(ds);
d += surface_stride(ds);
}
break;
}
......@@ -136,24 +140,24 @@ static void draw_vertical_line(DisplayState *ds, int posx, int posy1, int posy2,
static void jazz_led_update_display(void *opaque)
{
LedState *s = opaque;
DisplayState *ds = s->ds;
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *d1;
uint32_t color_segment, color_led;
int y, bpp;
if (s->state & REDRAW_BACKGROUND) {
/* clear screen */
bpp = (ds_get_bits_per_pixel(ds) + 7) >> 3;
d1 = ds_get_data(ds);
for (y = 0; y < ds_get_height(ds); y++) {
memset(d1, 0x00, ds_get_width(ds) * bpp);
d1 += ds_get_linesize(ds);
bpp = (surface_bits_per_pixel(surface) + 7) >> 3;
d1 = surface_data(surface);
for (y = 0; y < surface_height(surface); y++) {
memset(d1, 0x00, surface_width(surface) * bpp);
d1 += surface_stride(surface);
}
}
if (s->state & REDRAW_SEGMENTS) {
/* set colors according to bpp */
switch (ds_get_bits_per_pixel(ds)) {
switch (surface_bits_per_pixel(surface)) {
case 8:
color_segment = rgb_to_pixel8(0xaa, 0xaa, 0xaa);
color_led = rgb_to_pixel8(0x00, 0xff, 0x00);
......@@ -178,26 +182,34 @@ static void jazz_led_update_display(void *opaque)
}
/* display segments */
draw_horizontal_line(ds, 40, 10, 40, (s->segments & 0x02) ? color_segment : 0);
draw_vertical_line(ds, 10, 10, 40, (s->segments & 0x04) ? color_segment : 0);
draw_vertical_line(ds, 10, 40, 70, (s->segments & 0x08) ? color_segment : 0);
draw_horizontal_line(ds, 70, 10, 40, (s->segments & 0x10) ? color_segment : 0);
draw_vertical_line(ds, 40, 40, 70, (s->segments & 0x20) ? color_segment : 0);
draw_vertical_line(ds, 40, 10, 40, (s->segments & 0x40) ? color_segment : 0);
draw_horizontal_line(ds, 10, 10, 40, (s->segments & 0x80) ? color_segment : 0);
draw_horizontal_line(surface, 40, 10, 40,
(s->segments & 0x02) ? color_segment : 0);
draw_vertical_line(surface, 10, 10, 40,
(s->segments & 0x04) ? color_segment : 0);
draw_vertical_line(surface, 10, 40, 70,
(s->segments & 0x08) ? color_segment : 0);
draw_horizontal_line(surface, 70, 10, 40,
(s->segments & 0x10) ? color_segment : 0);
draw_vertical_line(surface, 40, 40, 70,
(s->segments & 0x20) ? color_segment : 0);
draw_vertical_line(surface, 40, 10, 40,
(s->segments & 0x40) ? color_segment : 0);
draw_horizontal_line(surface, 10, 10, 40,
(s->segments & 0x80) ? color_segment : 0);
/* display led */
if (!(s->segments & 0x01))
color_led = 0; /* black */
draw_horizontal_line(ds, 68, 50, 50, color_led);
draw_horizontal_line(ds, 69, 49, 51, color_led);
draw_horizontal_line(ds, 70, 48, 52, color_led);
draw_horizontal_line(ds, 71, 49, 51, color_led);
draw_horizontal_line(ds, 72, 50, 50, color_led);
draw_horizontal_line(surface, 68, 50, 50, color_led);
draw_horizontal_line(surface, 69, 49, 51, color_led);
draw_horizontal_line(surface, 70, 48, 52, color_led);
draw_horizontal_line(surface, 71, 49, 51, color_led);
draw_horizontal_line(surface, 72, 50, 50, color_led);
}
s->state = REDRAW_NONE;
dpy_gfx_update(ds, 0, 0, ds_get_width(ds), ds_get_height(ds));
dpy_gfx_update(s->con, 0, 0,
surface_width(surface), surface_height(surface));
}
static void jazz_led_invalidate_display(void *opaque)
......@@ -211,15 +223,15 @@ static void jazz_led_text_update(void *opaque, console_ch_t *chardata)
LedState *s = opaque;
char buf[2];
dpy_text_cursor(s->ds, -1, -1);
qemu_console_resize(s->ds, 2, 1);
dpy_text_cursor(s->con, -1, -1);
qemu_console_resize(s->con, 2, 1);
/* TODO: draw the segments */
snprintf(buf, 2, "%02hhx\n", s->segments);
console_write_ch(chardata++, 0x00200100 | buf[0]);
console_write_ch(chardata++, 0x00200100 | buf[1]);
dpy_text_update(s->ds, 0, 0, 2, 1);
dpy_text_update(s->con, 0, 0, 2, 1);
}
static int jazz_led_post_load(void *opaque, int version_id)
......@@ -249,10 +261,10 @@ static int jazz_led_init(SysBusDevice *dev)
memory_region_init_io(&s->iomem, &led_ops, s, "led", 1);
sysbus_init_mmio(dev, &s->iomem);
s->ds = graphic_console_init(jazz_led_update_display,
jazz_led_invalidate_display,
NULL,
jazz_led_text_update, s);
s->con = graphic_console_init(jazz_led_update_display,
jazz_led_invalidate_display,
NULL,
jazz_led_text_update, s);
return 0;
}
......@@ -263,7 +275,7 @@ static void jazz_led_reset(DeviceState *d)
s->segments = 0;
s->state = REDRAW_SEGMENTS | REDRAW_BACKGROUND;
qemu_console_resize(s->ds, 60, 80);
qemu_console_resize(s->con, 60, 80);
}
static void jazz_led_class_init(ObjectClass *klass, void *data)
......
hw/milkymist-vgafb.c
浏览文件 @ e531761d
......@@ -66,7 +66,7 @@ enum {
struct MilkymistVgafbState {
SysBusDevice busdev;
MemoryRegion regs_region;
DisplayState *ds;
QemuConsole *con;
int invalidate;
uint32_t fb_offset;
......@@ -84,6 +84,7 @@ static int vgafb_enabled(MilkymistVgafbState *s)
static void vgafb_update_display(void *opaque)
{
MilkymistVgafbState *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
int first = 0;
int last = 0;
drawfn fn;
......@@ -94,7 +95,7 @@ static void vgafb_update_display(void *opaque)
int dest_width = s->regs[R_HRES];
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
return;
case 8:
......@@ -121,7 +122,7 @@ static void vgafb_update_display(void *opaque)
break;
}
framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
framebuffer_update_display(surface, sysbus_address_space(&s->busdev),
s->regs[R_BASEADDRESS] + s->fb_offset,
s->regs[R_HRES],
s->regs[R_VRES],
......@@ -134,7 +135,7 @@ static void vgafb_update_display(void *opaque)
&first, &last);
if (first >= 0) {
dpy_gfx_update(s->ds, 0, first, s->regs[R_HRES], last - first + 1);
dpy_gfx_update(s->con, 0, first, s->regs[R_HRES], last - first + 1);
}
s->invalidate = 0;
}
......@@ -151,7 +152,7 @@ static void vgafb_resize(MilkymistVgafbState *s)
return;
}
qemu_console_resize(s->ds, s->regs[R_HRES], s->regs[R_VRES]);
qemu_console_resize(s->con, s->regs[R_HRES], s->regs[R_VRES]);
s->invalidate = 1;
}
......@@ -277,9 +278,9 @@ static int milkymist_vgafb_init(SysBusDevice *dev)
"milkymist-vgafb", R_MAX * 4);
sysbus_init_mmio(dev, &s->regs_region);
s->ds = graphic_console_init(vgafb_update_display,
vgafb_invalidate_display,
NULL, NULL, s);
s->con = graphic_console_init(vgafb_update_display,
vgafb_invalidate_display,
NULL, NULL, s);
return 0;
}
......
hw/omap_lcdc.c
浏览文件 @ e531761d
......@@ -26,7 +26,7 @@ struct omap_lcd_panel_s {
MemoryRegion *sysmem;
MemoryRegion iomem;
qemu_irq irq;
DisplayState *state;
QemuConsole *con;
int plm;
int tft;
......@@ -113,14 +113,16 @@ static draw_line_func draw_line_table2[33] = {
static void omap_update_display(void *opaque)
{
struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
DisplaySurface *surface = qemu_console_surface(omap_lcd->con);
draw_line_func draw_line;
int size, height, first, last;
int width, linesize, step, bpp, frame_offset;
hwaddr frame_base;
if (!omap_lcd || omap_lcd->plm == 1 ||
!omap_lcd->enable || !ds_get_bits_per_pixel(omap_lcd->state))
if (!omap_lcd || omap_lcd->plm == 1 || !omap_lcd->enable ||
!surface_bits_per_pixel(surface)) {
return;
}
frame_offset = 0;
if (omap_lcd->plm != 2) {
......@@ -139,25 +141,25 @@ static void omap_update_display(void *opaque)
/* Colour depth */
switch ((omap_lcd->palette[0] >> 12) & 7) {
case 1:
draw_line = draw_line_table2[ds_get_bits_per_pixel(omap_lcd->state)];
draw_line = draw_line_table2[surface_bits_per_pixel(surface)];
bpp = 2;
break;
case 2:
draw_line = draw_line_table4[ds_get_bits_per_pixel(omap_lcd->state)];
draw_line = draw_line_table4[surface_bits_per_pixel(surface)];
bpp = 4;
break;
case 3:
draw_line = draw_line_table8[ds_get_bits_per_pixel(omap_lcd->state)];
draw_line = draw_line_table8[surface_bits_per_pixel(surface)];
bpp = 8;
break;
case 4 ... 7:
if (!omap_lcd->tft)
draw_line = draw_line_table12[ds_get_bits_per_pixel(omap_lcd->state)];
draw_line = draw_line_table12[surface_bits_per_pixel(surface)];
else
draw_line = draw_line_table16[ds_get_bits_per_pixel(omap_lcd->state)];
draw_line = draw_line_table16[surface_bits_per_pixel(surface)];
bpp = 16;
break;
......@@ -168,10 +170,11 @@ static void omap_update_display(void *opaque)
/* Resolution */
width = omap_lcd->width;
if (width != ds_get_width(omap_lcd->state) ||
omap_lcd->height != ds_get_height(omap_lcd->state)) {
qemu_console_resize(omap_lcd->state,
if (width != surface_width(surface) ||
omap_lcd->height != surface_height(surface)) {
qemu_console_resize(omap_lcd->con,
omap_lcd->width, omap_lcd->height);
surface = qemu_console_surface(omap_lcd->con);
omap_lcd->invalidate = 1;
}
......@@ -196,8 +199,9 @@ static void omap_update_display(void *opaque)
if (omap_lcd->dma->dual)
omap_lcd->dma->current_frame ^= 1;
if (!ds_get_bits_per_pixel(omap_lcd->state))
if (!surface_bits_per_pixel(surface)) {
return;
}
first = 0;
height = omap_lcd->height;
......@@ -210,15 +214,15 @@ static void omap_update_display(void *opaque)
}
step = width * bpp >> 3;
linesize = ds_get_linesize(omap_lcd->state);
framebuffer_update_display(omap_lcd->state, omap_lcd->sysmem,
linesize = surface_stride(surface);
framebuffer_update_display(surface, omap_lcd->sysmem,
frame_base, width, height,
step, linesize, 0,
omap_lcd->invalidate,
draw_line, omap_lcd->palette,
&first, &last);
if (first >= 0) {
dpy_gfx_update(omap_lcd->state, 0, first, width, last - first + 1);
dpy_gfx_update(omap_lcd->con, 0, first, width, last - first + 1);
}
omap_lcd->invalidate = 0;
}
......@@ -298,12 +302,13 @@ static void omap_screen_dump(void *opaque, const char *filename, bool cswitch,
Error **errp)
{
struct omap_lcd_panel_s *omap_lcd = opaque;
DisplaySurface *surface = qemu_console_surface(omap_lcd->con);
omap_update_display(opaque);
if (omap_lcd && ds_get_data(omap_lcd->state))
omap_ppm_save(filename, ds_get_data(omap_lcd->state),
if (omap_lcd && surface_data(surface))
omap_ppm_save(filename, surface_data(surface),
omap_lcd->width, omap_lcd->height,
ds_get_linesize(omap_lcd->state), errp);
surface_stride(surface), errp);
}
static void omap_invalidate_display(void *opaque) {
......@@ -480,9 +485,9 @@ struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
memory_region_init_io(&s->iomem, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
memory_region_add_subregion(sysmem, base, &s->iomem);
s->state = graphic_console_init(omap_update_display,
omap_invalidate_display,
omap_screen_dump, NULL, s);
s->con = graphic_console_init(omap_update_display,
omap_invalidate_display,
omap_screen_dump, NULL, s);
return s;
}
hw/pl110.c
浏览文件 @ e531761d
......@@ -42,7 +42,7 @@ enum pl110_version
typedef struct {
SysBusDevice busdev;
MemoryRegion iomem;
DisplayState *ds;
QemuConsole *con;
int version;
uint32_t timing[4];
......@@ -129,6 +129,7 @@ static int pl110_enabled(pl110_state *s)
static void pl110_update_display(void *opaque)
{
pl110_state *s = (pl110_state *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
drawfn* fntable;
drawfn fn;
int dest_width;
......@@ -140,7 +141,7 @@ static void pl110_update_display(void *opaque)
if (!pl110_enabled(s))
return;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
return;
case 8:
......@@ -231,14 +232,14 @@ static void pl110_update_display(void *opaque)
}
dest_width *= s->cols;
first = 0;
framebuffer_update_display(s->ds, sysbus_address_space(&s->busdev),
framebuffer_update_display(surface, sysbus_address_space(&s->busdev),
s->upbase, s->cols, s->rows,
src_width, dest_width, 0,
s->invalidate,
fn, s->palette,
&first, &last);
if (first >= 0) {
dpy_gfx_update(s->ds, 0, first, s->cols, last - first + 1);
dpy_gfx_update(s->con, 0, first, s->cols, last - first + 1);
}
s->invalidate = 0;
}
......@@ -248,12 +249,13 @@ static void pl110_invalidate_display(void * opaque)
pl110_state *s = (pl110_state *)opaque;
s->invalidate = 1;
if (pl110_enabled(s)) {
qemu_console_resize(s->ds, s->cols, s->rows);
qemu_console_resize(s->con, s->cols, s->rows);
}
}
static void pl110_update_palette(pl110_state *s, int n)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i;
uint32_t raw;
unsigned int r, g, b;
......@@ -268,7 +270,7 @@ static void pl110_update_palette(pl110_state *s, int n)
b = (raw & 0x1f) << 3;
/* The I bit is ignored. */
raw >>= 6;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 8:
s->palette[n] = rgb_to_pixel8(r, g, b);
break;
......@@ -291,7 +293,7 @@ static void pl110_resize(pl110_state *s, int width, int height)
{
if (width != s->cols || height != s->rows) {
if (pl110_enabled(s)) {
qemu_console_resize(s->ds, width, height);
qemu_console_resize(s->con, width, height);
}
}
s->cols = width;
......@@ -409,7 +411,7 @@ static void pl110_write(void *opaque, hwaddr offset,
s->cr = val;
s->bpp = (val >> 1) & 7;
if (pl110_enabled(s)) {
qemu_console_resize(s->ds, s->cols, s->rows);
qemu_console_resize(s->con, s->cols, s->rows);
}
break;
case 10: /* LCDICR */
......@@ -450,9 +452,9 @@ static int pl110_init(SysBusDevice *dev)
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_irq(dev, &s->irq);
qdev_init_gpio_in(&s->busdev.qdev, pl110_mux_ctrl_set, 1);
s->ds = graphic_console_init(pl110_update_display,
pl110_invalidate_display,
NULL, NULL, s);
s->con = graphic_console_init(pl110_update_display,
pl110_invalidate_display,
NULL, NULL, s);
return 0;
}
......
hw/pl330.c 0 → 100644
浏览文件 @ e531761d
此差异已折叠。
hw/pxa2xx_lcd.c
浏览文件 @ e531761d
......@@ -39,7 +39,7 @@ struct PXA2xxLCDState {
int irqlevel;
int invalidated;
DisplayState *ds;
QemuConsole *con;
drawfn *line_fn[2];
int dest_width;
int xres, yres;
......@@ -579,6 +579,7 @@ static const MemoryRegionOps pxa2xx_lcdc_ops = {
/* Load new palette for a given DMA channel, convert to internal format */
static void pxa2xx_palette_parse(PXA2xxLCDState *s, int ch, int bpp)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i, n, format, r, g, b, alpha;
uint32_t *dest;
uint8_t *src;
......@@ -652,7 +653,7 @@ static void pxa2xx_palette_parse(PXA2xxLCDState *s, int ch, int bpp)
src += 4;
break;
}
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 8:
*dest = rgb_to_pixel8(r, g, b) | alpha;
break;
......@@ -676,6 +677,7 @@ static void pxa2xx_palette_parse(PXA2xxLCDState *s, int ch, int bpp)
static void pxa2xx_lcdc_dma0_redraw_rot0(PXA2xxLCDState *s,
hwaddr addr, int *miny, int *maxy)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int src_width, dest_width;
drawfn fn = NULL;
if (s->dest_width)
......@@ -693,7 +695,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot0(PXA2xxLCDState *s,
dest_width = s->xres * s->dest_width;
*miny = 0;
framebuffer_update_display(s->ds, s->sysmem,
framebuffer_update_display(surface, s->sysmem,
addr, s->xres, s->yres,
src_width, dest_width, s->dest_width,
s->invalidated,
......@@ -703,6 +705,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot0(PXA2xxLCDState *s,
static void pxa2xx_lcdc_dma0_redraw_rot90(PXA2xxLCDState *s,
hwaddr addr, int *miny, int *maxy)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int src_width, dest_width;
drawfn fn = NULL;
if (s->dest_width)
......@@ -720,7 +723,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot90(PXA2xxLCDState *s,
dest_width = s->yres * s->dest_width;
*miny = 0;
framebuffer_update_display(s->ds, s->sysmem,
framebuffer_update_display(surface, s->sysmem,
addr, s->xres, s->yres,
src_width, s->dest_width, -dest_width,
s->invalidated,
......@@ -731,6 +734,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot90(PXA2xxLCDState *s,
static void pxa2xx_lcdc_dma0_redraw_rot180(PXA2xxLCDState *s,
hwaddr addr, int *miny, int *maxy)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int src_width, dest_width;
drawfn fn = NULL;
if (s->dest_width) {
......@@ -751,7 +755,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot180(PXA2xxLCDState *s,
dest_width = s->xres * s->dest_width;
*miny = 0;
framebuffer_update_display(s->ds, s->sysmem,
framebuffer_update_display(surface, s->sysmem,
addr, s->xres, s->yres,
src_width, -dest_width, -s->dest_width,
s->invalidated,
......@@ -761,6 +765,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot180(PXA2xxLCDState *s,
static void pxa2xx_lcdc_dma0_redraw_rot270(PXA2xxLCDState *s,
hwaddr addr, int *miny, int *maxy)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int src_width, dest_width;
drawfn fn = NULL;
if (s->dest_width) {
......@@ -781,7 +786,7 @@ static void pxa2xx_lcdc_dma0_redraw_rot270(PXA2xxLCDState *s,
dest_width = s->yres * s->dest_width;
*miny = 0;
framebuffer_update_display(s->ds, s->sysmem,
framebuffer_update_display(surface, s->sysmem,
addr, s->xres, s->yres,
src_width, -s->dest_width, dest_width,
s->invalidated,
......@@ -800,9 +805,9 @@ static void pxa2xx_lcdc_resize(PXA2xxLCDState *s)
if (width != s->xres || height != s->yres) {
if (s->orientation == 90 || s->orientation == 270) {
qemu_console_resize(s->ds, height, width);
qemu_console_resize(s->con, height, width);
} else {
qemu_console_resize(s->ds, width, height);
qemu_console_resize(s->con, width, height);
}
s->invalidated = 1;
s->xres = width;
......@@ -871,20 +876,20 @@ static void pxa2xx_update_display(void *opaque)
if (miny >= 0) {
switch (s->orientation) {
case 0:
dpy_gfx_update(s->ds, 0, miny, s->xres, maxy - miny + 1);
dpy_gfx_update(s->con, 0, miny, s->xres, maxy - miny + 1);
break;
case 90:
dpy_gfx_update(s->ds, miny, 0, maxy - miny + 1, s->xres);
dpy_gfx_update(s->con, miny, 0, maxy - miny + 1, s->xres);
break;
case 180:
maxy = s->yres - maxy - 1;
miny = s->yres - miny - 1;
dpy_gfx_update(s->ds, 0, maxy, s->xres, miny - maxy + 1);
dpy_gfx_update(s->con, 0, maxy, s->xres, miny - maxy + 1);
break;
case 270:
maxy = s->yres - maxy - 1;
miny = s->yres - miny - 1;
dpy_gfx_update(s->ds, maxy, 0, miny - maxy + 1, s->xres);
dpy_gfx_update(s->con, maxy, 0, miny - maxy + 1, s->xres);
break;
}
}
......@@ -990,6 +995,7 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
hwaddr base, qemu_irq irq)
{
PXA2xxLCDState *s;
DisplaySurface *surface;
s = (PXA2xxLCDState *) g_malloc0(sizeof(PXA2xxLCDState));
s->invalidated = 1;
......@@ -1002,11 +1008,12 @@ PXA2xxLCDState *pxa2xx_lcdc_init(MemoryRegion *sysmem,
"pxa2xx-lcd-controller", 0x00100000);
memory_region_add_subregion(sysmem, base, &s->iomem);
s->ds = graphic_console_init(pxa2xx_update_display,
pxa2xx_invalidate_display,
NULL, NULL, s);
s->con = graphic_console_init(pxa2xx_update_display,
pxa2xx_invalidate_display,
NULL, NULL, s);
surface = qemu_console_surface(s->con);
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
s->dest_width = 0;
break;
......
hw/qdev-core.h
浏览文件 @ e531761d
......@@ -175,6 +175,9 @@ struct Property {
uint8_t bitnr;
uint8_t qtype;
int64_t defval;
int arrayoffset;
PropertyInfo *arrayinfo;
int arrayfieldsize;
};
struct PropertyInfo {
......
hw/qdev-properties.c
浏览文件 @ e531761d
......@@ -779,6 +779,110 @@ PropertyInfo qdev_prop_pci_host_devaddr = {
.set = set_pci_host_devaddr,
};
/* --- support for array properties --- */
/* Used as an opaque for the object properties we add for each
* array element. Note that the struct Property must be first
* in the struct so that a pointer to this works as the opaque
* for the underlying element's property hooks as well as for
* our own release callback.
*/
typedef struct {
struct Property prop;
char *propname;
ObjectPropertyRelease *release;
} ArrayElementProperty;
/* object property release callback for array element properties:
* we call the underlying element's property release hook, and
* then free the memory we allocated when we added the property.
*/
static void array_element_release(Object *obj, const char *name, void *opaque)
{
ArrayElementProperty *p = opaque;
if (p->release) {
p->release(obj, name, opaque);
}
g_free(p->propname);
g_free(p);
}
static void set_prop_arraylen(Object *obj, Visitor *v, void *opaque,
const char *name, Error **errp)
{
/* Setter for the property which defines the length of a
* variable-sized property array. As well as actually setting the
* array-length field in the device struct, we have to create the
* array itself and dynamically add the corresponding properties.
*/
DeviceState *dev = DEVICE(obj);
Property *prop = opaque;
uint32_t *alenptr = qdev_get_prop_ptr(dev, prop);
void **arrayptr = (void *)dev + prop->arrayoffset;
void *eltptr;
const char *arrayname;
int i;
if (dev->realized) {
error_set(errp, QERR_PERMISSION_DENIED);
return;
}
if (*alenptr) {
error_setg(errp, "array size property %s may not be set more than once",
name);
return;
}
visit_type_uint32(v, alenptr, name, errp);
if (error_is_set(errp)) {
return;
}
if (!*alenptr) {
return;
}
/* DEFINE_PROP_ARRAY guarantees that name should start with this prefix;
* strip it off so we can get the name of the array itself.
*/
assert(strncmp(name, PROP_ARRAY_LEN_PREFIX,
strlen(PROP_ARRAY_LEN_PREFIX)) == 0);
arrayname = name + strlen(PROP_ARRAY_LEN_PREFIX);
/* Note that it is the responsibility of the individual device's deinit
* to free the array proper.
*/
*arrayptr = eltptr = g_malloc0(*alenptr * prop->arrayfieldsize);
for (i = 0; i < *alenptr; i++, eltptr += prop->arrayfieldsize) {
char *propname = g_strdup_printf("%s[%d]", arrayname, i);
ArrayElementProperty *arrayprop = g_new0(ArrayElementProperty, 1);
arrayprop->release = prop->arrayinfo->release;
arrayprop->propname = propname;
arrayprop->prop.info = prop->arrayinfo;
arrayprop->prop.name = propname;
/* This ugly piece of pointer arithmetic sets up the offset so
* that when the underlying get/set hooks call qdev_get_prop_ptr
* they get the right answer despite the array element not actually
* being inside the device struct.
*/
arrayprop->prop.offset = eltptr - (void *)dev;
assert(qdev_get_prop_ptr(dev, &arrayprop->prop) == eltptr);
object_property_add(obj, propname,
arrayprop->prop.info->name,
arrayprop->prop.info->get,
arrayprop->prop.info->set,
array_element_release,
arrayprop, errp);
if (error_is_set(errp)) {
return;
}
}
}
PropertyInfo qdev_prop_arraylen = {
.name = "uint32",
.get = get_uint32,
.set = set_prop_arraylen,
};
/* --- public helpers --- */
static Property *qdev_prop_walk(Property *props, const char *name)
......
hw/qdev-properties.h
浏览文件 @ e531761d
......@@ -26,6 +26,7 @@ extern PropertyInfo qdev_prop_vlan;
extern PropertyInfo qdev_prop_pci_devfn;
extern PropertyInfo qdev_prop_blocksize;
extern PropertyInfo qdev_prop_pci_host_devaddr;
extern PropertyInfo qdev_prop_arraylen;
#define DEFINE_PROP(_name, _state, _field, _prop, _type) { \
.name = (_name), \
......@@ -51,6 +52,44 @@ extern PropertyInfo qdev_prop_pci_host_devaddr;
.defval = (bool)_defval, \
}
#define PROP_ARRAY_LEN_PREFIX "len-"
/**
* DEFINE_PROP_ARRAY:
* @_name: name of the array
* @_state: name of the device state structure type
* @_field: uint32_t field in @_state to hold the array length
* @_arrayfield: field in @_state (of type '@_arraytype *') which
* will point to the array
* @_arrayprop: PropertyInfo defining what property the array elements have
* @_arraytype: C type of the array elements
*
* Define device properties for a variable-length array _name. A
* static property "len-arrayname" is defined. When the device creator
* sets this property to the desired length of array, further dynamic
* properties "arrayname[0]", "arrayname[1]", ... are defined so the
* device creator can set the array element values. Setting the
* "len-arrayname" property more than once is an error.
*
* When the array length is set, the @_field member of the device
* struct is set to the array length, and @_arrayfield is set to point
* to (zero-initialised) memory allocated for the array. For a zero
* length array, @_field will be set to 0 and @_arrayfield to NULL.
* It is the responsibility of the device deinit code to free the
* @_arrayfield memory.
*/
#define DEFINE_PROP_ARRAY(_name, _state, _field, \
_arrayfield, _arrayprop, _arraytype) { \
.name = (PROP_ARRAY_LEN_PREFIX _name), \
.info = &(qdev_prop_arraylen), \
.offset = offsetof(_state, _field) \
+ type_check(uint32_t, typeof_field(_state, _field)), \
.qtype = QTYPE_QINT, \
.arrayinfo = &(_arrayprop), \
.arrayfieldsize = sizeof(_arraytype), \
.arrayoffset = offsetof(_state, _arrayfield), \
}
#define DEFINE_PROP_UINT8(_n, _s, _f, _d) \
DEFINE_PROP_DEFAULT(_n, _s, _f, _d, qdev_prop_uint8, uint8_t)
#define DEFINE_PROP_UINT16(_n, _s, _f, _d) \
......
hw/qxl-render.c
浏览文件 @ e531761d
......@@ -23,11 +23,12 @@
static void qxl_blit(PCIQXLDevice *qxl, QXLRect *rect)
{
DisplaySurface *surface = qemu_console_surface(qxl->vga.con);
uint8_t *dst = surface_data(surface);
uint8_t *src;
uint8_t *dst = ds_get_data(qxl->vga.ds);
int len, i;
if (is_buffer_shared(qxl->vga.ds->surface)) {
if (is_buffer_shared(surface)) {
return;
}
if (!qxl->guest_primary.data) {
......@@ -98,6 +99,7 @@ static void qxl_set_rect_to_surface(PCIQXLDevice *qxl, QXLRect *area)
static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
{
VGACommonState *vga = &qxl->vga;
DisplaySurface *surface;
int i;
if (qxl->guest_primary.resized) {
......@@ -112,8 +114,7 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
qxl->guest_primary.bytes_pp,
qxl->guest_primary.bits_pp);
if (qxl->guest_primary.qxl_stride > 0) {
qemu_free_displaysurface(vga->ds);
vga->ds->surface = qemu_create_displaysurface_from
surface = qemu_create_displaysurface_from
(qxl->guest_primary.surface.width,
qxl->guest_primary.surface.height,
qxl->guest_primary.bits_pp,
......@@ -121,18 +122,18 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
qxl->guest_primary.data,
false);
} else {
qemu_resize_displaysurface(vga->ds,
qxl->guest_primary.surface.width,
qxl->guest_primary.surface.height);
surface = qemu_create_displaysurface
(qxl->guest_primary.surface.width,
qxl->guest_primary.surface.height);
}
dpy_gfx_resize(vga->ds);
dpy_gfx_replace_surface(vga->con, surface);
}
for (i = 0; i < qxl->num_dirty_rects; i++) {
if (qemu_spice_rect_is_empty(qxl->dirty+i)) {
break;
}
qxl_blit(qxl, qxl->dirty+i);
dpy_gfx_update(vga->ds,
dpy_gfx_update(vga->con,
qxl->dirty[i].left, qxl->dirty[i].top,
qxl->dirty[i].right - qxl->dirty[i].left,
qxl->dirty[i].bottom - qxl->dirty[i].top);
......@@ -236,7 +237,7 @@ int qxl_render_cursor(PCIQXLDevice *qxl, QXLCommandExt *ext)
return 1;
}
if (!dpy_cursor_define_supported(qxl->ssd.ds)) {
if (!dpy_cursor_define_supported(qxl->vga.con)) {
return 0;
}
......
hw/qxl.c
浏览文件 @ e531761d
......@@ -118,8 +118,6 @@ static QXLMode qxl_modes[] = {
QXL_MODE_EX(3200, 2400),
};
static PCIQXLDevice *qxl0;
static void qxl_send_events(PCIQXLDevice *d, uint32_t events);
static int qxl_destroy_primary(PCIQXLDevice *d, qxl_async_io async);
static void qxl_reset_memslots(PCIQXLDevice *d);
......@@ -1075,8 +1073,8 @@ static void qxl_enter_vga_mode(PCIQXLDevice *d)
trace_qxl_enter_vga_mode(d->id);
qemu_spice_create_host_primary(&d->ssd);
d->mode = QXL_MODE_VGA;
dpy_gfx_resize(d->ssd.ds);
vga_dirty_log_start(&d->vga);
vga_hw_update();
}
static void qxl_exit_vga_mode(PCIQXLDevice *d)
......@@ -1784,7 +1782,7 @@ static void qxl_hw_screen_dump(void *opaque, const char *filename, bool cswitch,
case QXL_MODE_COMPAT:
case QXL_MODE_NATIVE:
qxl_render_update(qxl);
ppm_save(filename, qxl->ssd.ds->surface, errp);
ppm_save(filename, qxl->ssd.ds, errp);
break;
case QXL_MODE_VGA:
vga->screen_dump(vga, filename, cswitch, errp);
......@@ -1866,35 +1864,45 @@ static void qxl_vm_change_state_handler(void *opaque, int running,
/* display change listener */
static void display_update(struct DisplayState *ds, int x, int y, int w, int h)
static void display_update(DisplayChangeListener *dcl,
int x, int y, int w, int h)
{
if (qxl0->mode == QXL_MODE_VGA) {
qemu_spice_display_update(&qxl0->ssd, x, y, w, h);
PCIQXLDevice *qxl = container_of(dcl, PCIQXLDevice, ssd.dcl);
if (qxl->mode == QXL_MODE_VGA) {
qemu_spice_display_update(&qxl->ssd, x, y, w, h);
}
}
static void display_resize(struct DisplayState *ds)
static void display_switch(DisplayChangeListener *dcl,
struct DisplaySurface *surface)
{
if (qxl0->mode == QXL_MODE_VGA) {
qemu_spice_display_resize(&qxl0->ssd);
PCIQXLDevice *qxl = container_of(dcl, PCIQXLDevice, ssd.dcl);
qxl->ssd.ds = surface;
if (qxl->mode == QXL_MODE_VGA) {
qemu_spice_display_switch(&qxl->ssd, surface);
}
}
static void display_refresh(struct DisplayState *ds)
static void display_refresh(DisplayChangeListener *dcl)
{
if (qxl0->mode == QXL_MODE_VGA) {
qemu_spice_display_refresh(&qxl0->ssd);
PCIQXLDevice *qxl = container_of(dcl, PCIQXLDevice, ssd.dcl);
if (qxl->mode == QXL_MODE_VGA) {
qemu_spice_display_refresh(&qxl->ssd);
} else {
qemu_mutex_lock(&qxl0->ssd.lock);
qemu_spice_cursor_refresh_unlocked(&qxl0->ssd);
qemu_mutex_unlock(&qxl0->ssd.lock);
qemu_mutex_lock(&qxl->ssd.lock);
qemu_spice_cursor_refresh_unlocked(&qxl->ssd);
qemu_mutex_unlock(&qxl->ssd.lock);
}
}
static DisplayChangeListener display_listener = {
static DisplayChangeListenerOps display_listener_ops = {
.dpy_name = "spice/qxl",
.dpy_gfx_update = display_update,
.dpy_gfx_resize = display_resize,
.dpy_refresh = display_refresh,
.dpy_gfx_switch = display_switch,
.dpy_refresh = display_refresh,
};
static void qxl_init_ramsize(PCIQXLDevice *qxl)
......@@ -2055,6 +2063,7 @@ static int qxl_init_primary(PCIDevice *dev)
PCIQXLDevice *qxl = DO_UPCAST(PCIQXLDevice, pci, dev);
VGACommonState *vga = &qxl->vga;
PortioList *qxl_vga_port_list = g_new(PortioList, 1);
DisplayState *ds;
int rc;
qxl->id = 0;
......@@ -2065,18 +2074,20 @@ static int qxl_init_primary(PCIDevice *dev)
portio_list_init(qxl_vga_port_list, qxl_vga_portio_list, vga, "vga");
portio_list_add(qxl_vga_port_list, pci_address_space_io(dev), 0x3b0);
vga->ds = graphic_console_init(qxl_hw_update, qxl_hw_invalidate,
qxl_hw_screen_dump, qxl_hw_text_update, qxl);
qemu_spice_display_init_common(&qxl->ssd, vga->ds);
qxl0 = qxl;
vga->con = graphic_console_init(qxl_hw_update, qxl_hw_invalidate,
qxl_hw_screen_dump, qxl_hw_text_update,
qxl);
qxl->ssd.con = vga->con,
qemu_spice_display_init_common(&qxl->ssd);
rc = qxl_init_common(qxl);
if (rc != 0) {
return rc;
}
register_displaychangelistener(vga->ds, &display_listener);
qxl->ssd.dcl.ops = &display_listener_ops;
ds = qemu_console_displaystate(vga->con);
register_displaychangelistener(ds, &qxl->ssd.dcl);
return rc;
}
......
hw/sm501.c
浏览文件 @ e531761d
......@@ -454,7 +454,7 @@ static const uint32_t sm501_mem_local_size[] = {
typedef struct SM501State {
/* graphic console status */
DisplayState *ds;
QemuConsole *con;
/* status & internal resources */
hwaddr base;
......@@ -1234,9 +1234,9 @@ static draw_hwc_line_func * draw_hwc_line_funcs[] = {
draw_hwc_line_16bgr,
};
static inline int get_depth_index(DisplayState *s)
static inline int get_depth_index(DisplaySurface *surface)
{
switch(ds_get_bits_per_pixel(s)) {
switch (surface_bits_per_pixel(surface)) {
default:
case 8:
return 0;
......@@ -1245,26 +1245,28 @@ static inline int get_depth_index(DisplayState *s)
case 16:
return 2;
case 32:
if (is_surface_bgr(s->surface))
return 4;
else
return 3;
if (is_surface_bgr(surface)) {
return 4;
} else {
return 3;
}
}
}
static void sm501_draw_crt(SM501State * s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int y;
int width = (s->dc_crt_h_total & 0x00000FFF) + 1;
int height = (s->dc_crt_v_total & 0x00000FFF) + 1;
uint8_t * src = s->local_mem;
int src_bpp = 0;
int dst_bpp = ds_get_bytes_per_pixel(s->ds) + (ds_get_bits_per_pixel(s->ds) % 8 ? 1 : 0);
int dst_bpp = surface_bytes_per_pixel(surface);
uint32_t * palette = (uint32_t *)&s->dc_palette[SM501_DC_CRT_PALETTE
- SM501_DC_PANEL_PALETTE];
uint8_t hwc_palette[3 * 3];
int ds_depth_index = get_depth_index(s->ds);
int ds_depth_index = get_depth_index(surface);
draw_line_func * draw_line = NULL;
draw_hwc_line_func * draw_hwc_line = NULL;
int full_update = 0;
......@@ -1312,7 +1314,8 @@ static void sm501_draw_crt(SM501State * s)
/* adjust console size */
if (s->last_width != width || s->last_height != height) {
qemu_console_resize(s->ds, width, height);
qemu_console_resize(s->con, width, height);
surface = qemu_console_surface(s->con);
s->last_width = width;
s->last_height = height;
full_update = 1;
......@@ -1331,7 +1334,8 @@ static void sm501_draw_crt(SM501State * s)
/* draw line and change status */
if (update) {
uint8_t * d = &(ds_get_data(s->ds)[y * width * dst_bpp]);
uint8_t *d = surface_data(surface);
d += y * width * dst_bpp;
/* draw graphics layer */
draw_line(d, src, width, palette);
......@@ -1350,7 +1354,7 @@ static void sm501_draw_crt(SM501State * s)
} else {
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(s->ds, 0, y_start, width, y - y_start);
dpy_gfx_update(s->con, 0, y_start, width, y - y_start);
y_start = -1;
}
}
......@@ -1361,7 +1365,7 @@ static void sm501_draw_crt(SM501State * s)
/* complete flush to display */
if (y_start >= 0)
dpy_gfx_update(s->ds, 0, y_start, width, y - y_start);
dpy_gfx_update(s->con, 0, y_start, width, y - y_start);
/* clear dirty flags */
if (page_min != ~0l) {
......@@ -1441,6 +1445,6 @@ void sm501_init(MemoryRegion *address_space_mem, uint32_t base,
}
/* create qemu graphic console */
s->ds = graphic_console_init(sm501_update_display, NULL,
NULL, NULL, s);
s->con = graphic_console_init(sm501_update_display, NULL,
NULL, NULL, s);
}
hw/ssd0303.c
浏览文件 @ e531761d
......@@ -43,7 +43,7 @@ enum ssd0303_cmd {
typedef struct {
I2CSlave i2c;
DisplayState *ds;
QemuConsole *con;
int row;
int col;
int start_line;
......@@ -191,6 +191,7 @@ static void ssd0303_event(I2CSlave *i2c, enum i2c_event event)
static void ssd0303_update_display(void *opaque)
{
ssd0303_state *s = (ssd0303_state *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *dest;
uint8_t *src;
int x;
......@@ -204,7 +205,7 @@ static void ssd0303_update_display(void *opaque)
if (!s->redraw)
return;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
return;
case 15:
......@@ -236,7 +237,7 @@ static void ssd0303_update_display(void *opaque)
colors[0] = colortab + dest_width;
colors[1] = colortab;
}
dest = ds_get_data(s->ds);
dest = surface_data(surface);
for (y = 0; y < 16; y++) {
line = (y + s->start_line) & 63;
src = s->framebuffer + 132 * (line >> 3) + 36;
......@@ -252,7 +253,7 @@ static void ssd0303_update_display(void *opaque)
}
}
s->redraw = 0;
dpy_gfx_update(s->ds, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
dpy_gfx_update(s->con, 0, 0, 96 * MAGNIFY, 16 * MAGNIFY);
}
static void ssd0303_invalidate_display(void * opaque)
......@@ -287,10 +288,10 @@ static int ssd0303_init(I2CSlave *i2c)
{
ssd0303_state *s = FROM_I2C_SLAVE(ssd0303_state, i2c);
s->ds = graphic_console_init(ssd0303_update_display,
ssd0303_invalidate_display,
NULL, NULL, s);
qemu_console_resize(s->ds, 96 * MAGNIFY, 16 * MAGNIFY);
s->con = graphic_console_init(ssd0303_update_display,
ssd0303_invalidate_display,
NULL, NULL, s);
qemu_console_resize(s->con, 96 * MAGNIFY, 16 * MAGNIFY);
return 0;
}
......
hw/ssd0323.c
浏览文件 @ e531761d
......@@ -45,7 +45,7 @@ enum ssd0323_mode
typedef struct {
SSISlave ssidev;
DisplayState *ds;
QemuConsole *con;
int cmd_len;
int cmd;
......@@ -175,6 +175,7 @@ static uint32_t ssd0323_transfer(SSISlave *dev, uint32_t data)
static void ssd0323_update_display(void *opaque)
{
ssd0323_state *s = (ssd0323_state *)opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
uint8_t *dest;
uint8_t *src;
int x;
......@@ -189,7 +190,7 @@ static void ssd0323_update_display(void *opaque)
if (!s->redraw)
return;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 0:
return;
case 15:
......@@ -212,7 +213,7 @@ static void ssd0323_update_display(void *opaque)
for (i = 0; i < 16; i++) {
int n;
colors[i] = p;
switch (ds_get_bits_per_pixel(s->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 15:
n = i * 2 + (i >> 3);
p[0] = n | (n << 5);
......@@ -235,7 +236,7 @@ static void ssd0323_update_display(void *opaque)
p += dest_width;
}
/* TODO: Implement row/column remapping. */
dest = ds_get_data(s->ds);
dest = surface_data(surface);
for (y = 0; y < 64; y++) {
line = y;
src = s->framebuffer + 64 * line;
......@@ -260,7 +261,7 @@ static void ssd0323_update_display(void *opaque)
}
}
s->redraw = 0;
dpy_gfx_update(s->ds, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
dpy_gfx_update(s->con, 0, 0, 128 * MAGNIFY, 64 * MAGNIFY);
}
static void ssd0323_invalidate_display(void * opaque)
......@@ -336,10 +337,10 @@ static int ssd0323_init(SSISlave *dev)
s->col_end = 63;
s->row_end = 79;
s->ds = graphic_console_init(ssd0323_update_display,
ssd0323_invalidate_display,
NULL, NULL, s);
qemu_console_resize(s->ds, 128 * MAGNIFY, 64 * MAGNIFY);
s->con = graphic_console_init(ssd0323_update_display,
ssd0323_invalidate_display,
NULL, NULL, s);
qemu_console_resize(s->con, 128 * MAGNIFY, 64 * MAGNIFY);
qdev_init_gpio_in(&dev->qdev, ssd0323_cd, 1);
......
hw/tc6393xb.c
浏览文件 @ e531761d
......@@ -125,7 +125,7 @@ struct TC6393xbState {
DeviceState *flash;
ECCState ecc;
DisplayState *ds;
QemuConsole *con;
MemoryRegion vram;
uint16_t *vram_ptr;
uint32_t scr_width, scr_height; /* in pixels */
......@@ -433,7 +433,9 @@ static void tc6393xb_nand_writeb(TC6393xbState *s, hwaddr addr, uint32_t value)
static void tc6393xb_draw_graphic(TC6393xbState *s, int full_update)
{
switch (ds_get_bits_per_pixel(s->ds)) {
DisplaySurface *surface = qemu_console_surface(s->con);
switch (surface_bits_per_pixel(surface)) {
case 8:
tc6393xb_draw_graphic8(s);
break;
......@@ -450,34 +452,37 @@ static void tc6393xb_draw_graphic(TC6393xbState *s, int full_update)
tc6393xb_draw_graphic32(s);
break;
default:
printf("tc6393xb: unknown depth %d\n", ds_get_bits_per_pixel(s->ds));
printf("tc6393xb: unknown depth %d\n",
surface_bits_per_pixel(surface));
return;
}
dpy_gfx_update(s->ds, 0, 0, s->scr_width, s->scr_height);
dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height);
}
static void tc6393xb_draw_blank(TC6393xbState *s, int full_update)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i, w;
uint8_t *d;
if (!full_update)
return;
w = s->scr_width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
d = ds_get_data(s->ds);
w = s->scr_width * surface_bytes_per_pixel(surface);
d = surface_data(surface);
for(i = 0; i < s->scr_height; i++) {
memset(d, 0, w);
d += ds_get_linesize(s->ds);
d += surface_stride(surface);
}
dpy_gfx_update(s->ds, 0, 0, s->scr_width, s->scr_height);
dpy_gfx_update(s->con, 0, 0, s->scr_width, s->scr_height);
}
static void tc6393xb_update_display(void *opaque)
{
TC6393xbState *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
int full_update;
if (s->scr_width == 0 || s->scr_height == 0)
......@@ -488,8 +493,9 @@ static void tc6393xb_update_display(void *opaque)
s->blanked = s->blank;
full_update = 1;
}
if (s->scr_width != ds_get_width(s->ds) || s->scr_height != ds_get_height(s->ds)) {
qemu_console_resize(s->ds, s->scr_width, s->scr_height);
if (s->scr_width != surface_width(surface) ||
s->scr_height != surface_height(surface)) {
qemu_console_resize(s->con, s->scr_width, s->scr_height);
full_update = 1;
}
if (s->blanked)
......@@ -577,7 +583,7 @@ TC6393xbState *tc6393xb_init(MemoryRegion *sysmem, uint32_t base, qemu_irq irq)
memory_region_add_subregion(sysmem, base + 0x100000, &s->vram);
s->scr_width = 480;
s->scr_height = 640;
s->ds = graphic_console_init(tc6393xb_update_display,
s->con = graphic_console_init(tc6393xb_update_display,
NULL, /* invalidate */
NULL, /* screen_dump */
NULL, /* text_update */
......
hw/tc6393xb_template.h
浏览文件 @ e531761d
......@@ -37,17 +37,18 @@
static void glue(tc6393xb_draw_graphic, BITS)(TC6393xbState *s)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i;
uint16_t *data_buffer;
uint8_t *data_display;
data_buffer = s->vram_ptr;
data_display = ds_get_data(s->ds);
data_display = surface_data(surface);
for(i = 0; i < s->scr_height; i++) {
#if (BITS == 16)
memcpy(data_display, data_buffer, s->scr_width * 2);
data_buffer += s->scr_width;
data_display += ds_get_linesize(s->ds);
data_display += surface_stride(surface);
#else
int j;
for (j = 0; j < s->scr_width; j++, data_display += BITS / 8, data_buffer++) {
......
hw/tcx.c
浏览文件 @ e531761d
......@@ -38,7 +38,7 @@
typedef struct TCXState {
SysBusDevice busdev;
hwaddr addr;
DisplayState *ds;
QemuConsole *con;
uint8_t *vram;
uint32_t *vram24, *cplane;
MemoryRegion vram_mem;
......@@ -75,9 +75,11 @@ static void tcx24_set_dirty(TCXState *s)
static void update_palette_entries(TCXState *s, int start, int end)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i;
for(i = start; i < end; i++) {
switch(ds_get_bits_per_pixel(s->ds)) {
for (i = start; i < end; i++) {
switch (surface_bits_per_pixel(surface)) {
default:
case 8:
s->palette[i] = rgb_to_pixel8(s->r[i], s->g[i], s->b[i]);
......@@ -89,10 +91,11 @@ static void update_palette_entries(TCXState *s, int start, int end)
s->palette[i] = rgb_to_pixel16(s->r[i], s->g[i], s->b[i]);
break;
case 32:
if (is_surface_bgr(s->ds->surface))
if (is_surface_bgr(surface)) {
s->palette[i] = rgb_to_pixel32bgr(s->r[i], s->g[i], s->b[i]);
else
} else {
s->palette[i] = rgb_to_pixel32(s->r[i], s->g[i], s->b[i]);
}
break;
}
}
......@@ -151,12 +154,13 @@ static inline void tcx24_draw_line32(TCXState *s1, uint8_t *d,
const uint32_t *cplane,
const uint32_t *s24)
{
DisplaySurface *surface = qemu_console_surface(s1->con);
int x, bgr, r, g, b;
uint8_t val, *p8;
uint32_t *p = (uint32_t *)d;
uint32_t dval;
bgr = is_surface_bgr(s1->ds->surface);
bgr = is_surface_bgr(surface);
for(x = 0; x < width; x++, s++, s24++) {
if ((be32_to_cpu(*cplane++) & 0xff000000) == 0x03000000) {
// 24-bit direct, BGR order
......@@ -213,23 +217,26 @@ static inline void reset_dirty(TCXState *ts, ram_addr_t page_min,
static void tcx_update_display(void *opaque)
{
TCXState *ts = opaque;
DisplaySurface *surface = qemu_console_surface(ts->con);
ram_addr_t page, page_min, page_max;
int y, y_start, dd, ds;
uint8_t *d, *s;
void (*f)(TCXState *s1, uint8_t *dst, const uint8_t *src, int width);
if (ds_get_bits_per_pixel(ts->ds) == 0)
if (surface_bits_per_pixel(surface) == 0) {
return;
}
page = 0;
y_start = -1;
page_min = -1;
page_max = 0;
d = ds_get_data(ts->ds);
d = surface_data(surface);
s = ts->vram;
dd = ds_get_linesize(ts->ds);
dd = surface_stride(surface);
ds = 1024;
switch (ds_get_bits_per_pixel(ts->ds)) {
switch (surface_bits_per_pixel(surface)) {
case 32:
f = tcx_draw_line32;
break;
......@@ -269,7 +276,7 @@ static void tcx_update_display(void *opaque)
} else {
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(ts->ds, 0, y_start,
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
y_start = -1;
}
......@@ -279,7 +286,7 @@ static void tcx_update_display(void *opaque)
}
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(ts->ds, 0, y_start,
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
}
/* reset modified pages */
......@@ -293,24 +300,27 @@ static void tcx_update_display(void *opaque)
static void tcx24_update_display(void *opaque)
{
TCXState *ts = opaque;
DisplaySurface *surface = qemu_console_surface(ts->con);
ram_addr_t page, page_min, page_max, cpage, page24;
int y, y_start, dd, ds;
uint8_t *d, *s;
uint32_t *cptr, *s24;
if (ds_get_bits_per_pixel(ts->ds) != 32)
if (surface_bits_per_pixel(surface) != 32) {
return;
}
page = 0;
page24 = ts->vram24_offset;
cpage = ts->cplane_offset;
y_start = -1;
page_min = -1;
page_max = 0;
d = ds_get_data(ts->ds);
d = surface_data(surface);
s = ts->vram;
s24 = ts->vram24;
cptr = ts->cplane;
dd = ds_get_linesize(ts->ds);
dd = surface_stride(surface);
ds = 1024;
for(y = 0; y < ts->height; y += 4, page += TARGET_PAGE_SIZE,
......@@ -345,7 +355,7 @@ static void tcx24_update_display(void *opaque)
} else {
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(ts->ds, 0, y_start,
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
y_start = -1;
}
......@@ -357,7 +367,7 @@ static void tcx24_update_display(void *opaque)
}
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(ts->ds, 0, y_start,
dpy_gfx_update(ts->con, 0, y_start,
ts->width, y - y_start);
}
/* reset modified pages */
......@@ -371,7 +381,7 @@ static void tcx_invalidate_display(void *opaque)
TCXState *s = opaque;
tcx_set_dirty(s);
qemu_console_resize(s->ds, s->width, s->height);
qemu_console_resize(s->con, s->width, s->height);
}
static void tcx24_invalidate_display(void *opaque)
......@@ -380,7 +390,7 @@ static void tcx24_invalidate_display(void *opaque)
tcx_set_dirty(s);
tcx24_set_dirty(s);
qemu_console_resize(s->ds, s->width, s->height);
qemu_console_resize(s->con, s->width, s->height);
}
static int vmstate_tcx_post_load(void *opaque, int version_id)
......@@ -558,21 +568,21 @@ static int tcx_init1(SysBusDevice *dev)
&s->vram_mem, vram_offset, size);
sysbus_init_mmio(dev, &s->vram_cplane);
s->ds = graphic_console_init(tcx24_update_display,
tcx24_invalidate_display,
tcx24_screen_dump, NULL, s);
s->con = graphic_console_init(tcx24_update_display,
tcx24_invalidate_display,
tcx24_screen_dump, NULL, s);
} else {
/* THC 8 bit (dummy) */
memory_region_init_io(&s->thc8, &dummy_ops, s, "tcx.thc8",
TCX_THC_NREGS_8);
sysbus_init_mmio(dev, &s->thc8);
s->ds = graphic_console_init(tcx_update_display,
tcx_invalidate_display,
tcx_screen_dump, NULL, s);
s->con = graphic_console_init(tcx_update_display,
tcx_invalidate_display,
tcx_screen_dump, NULL, s);
}
qemu_console_resize(s->ds, s->width, s->height);
qemu_console_resize(s->con, s->width, s->height);
return 0;
}
......
hw/vga-isa-mm.c
浏览文件 @ e531761d
......@@ -135,8 +135,9 @@ int isa_vga_mm_init(hwaddr vram_base,
vga_common_init(&s->vga);
vga_mm_init(s, vram_base, ctrl_base, it_shift, address_space);
s->vga.ds = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update, s);
s->vga.con = graphic_console_init(s->vga.update, s->vga.invalidate,
s->vga.screen_dump, s->vga.text_update,
s);
vga_init_vbe(&s->vga, address_space);
return 0;
......
hw/vga-isa.c
浏览文件 @ e531761d
......@@ -62,8 +62,8 @@ static int vga_initfn(ISADevice *dev)
isa_mem_base + 0x000a0000,
vga_io_memory, 1);
memory_region_set_coalescing(vga_io_memory);
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
s->con = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
vga_init_vbe(s, isa_address_space(dev));
/* ROM BIOS */
......
hw/vga-pci.c
浏览文件 @ e531761d
......@@ -150,8 +150,8 @@ static int pci_std_vga_initfn(PCIDevice *dev)
vga_common_init(s);
vga_init(s, pci_address_space(dev), pci_address_space_io(dev), true);
s->ds = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
s->con = graphic_console_init(s->update, s->invalidate,
s->screen_dump, s->text_update, s);
/* XXX: VGA_RAM_SIZE must be a power of two */
pci_register_bar(&d->dev, 0, PCI_BASE_ADDRESS_MEM_PREFETCH, &s->vram);
......
hw/vga.c
浏览文件 @ e531761d
......@@ -1174,9 +1174,9 @@ static int update_basic_params(VGACommonState *s)
#define NB_DEPTHS 7
static inline int get_depth_index(DisplayState *s)
static inline int get_depth_index(DisplaySurface *s)
{
switch(ds_get_bits_per_pixel(s)) {
switch (surface_bits_per_pixel(s)) {
default:
case 8:
return 0;
......@@ -1185,10 +1185,11 @@ static inline int get_depth_index(DisplayState *s)
case 16:
return 2;
case 32:
if (is_surface_bgr(s->surface))
if (is_surface_bgr(s)) {
return 4;
else
} else {
return 3;
}
}
}
......@@ -1294,6 +1295,7 @@ static rgb_to_pixel_dup_func * const rgb_to_pixel_dup_table[NB_DEPTHS] = {
*/
static void vga_draw_text(VGACommonState *s, int full_update)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int cx, cy, cheight, cw, ch, cattr, height, width, ch_attr;
int cx_min, cx_max, linesize, x_incr, line, line1;
uint32_t offset, fgcol, bgcol, v, cursor_offset;
......@@ -1345,8 +1347,9 @@ static void vga_draw_text(VGACommonState *s, int full_update)
cw != s->last_cw || cheight != s->last_ch || s->last_depth) {
s->last_scr_width = width * cw;
s->last_scr_height = height * cheight;
qemu_console_resize(s->ds, s->last_scr_width, s->last_scr_height);
dpy_text_resize(s->ds, width, height);
qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height);
surface = qemu_console_surface(s->con);
dpy_text_resize(s->con, width, height);
s->last_depth = 0;
s->last_width = width;
s->last_height = height;
......@@ -1355,10 +1358,10 @@ static void vga_draw_text(VGACommonState *s, int full_update)
full_update = 1;
}
s->rgb_to_pixel =
rgb_to_pixel_dup_table[get_depth_index(s->ds)];
rgb_to_pixel_dup_table[get_depth_index(surface)];
full_update |= update_palette16(s);
palette = s->last_palette;
x_incr = cw * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
x_incr = cw * surface_bytes_per_pixel(surface);
if (full_update) {
s->full_update_text = 1;
......@@ -1389,15 +1392,15 @@ static void vga_draw_text(VGACommonState *s, int full_update)
s->cursor_visible_phase = !s->cursor_visible_phase;
}
depth_index = get_depth_index(s->ds);
depth_index = get_depth_index(surface);
if (cw == 16)
vga_draw_glyph8 = vga_draw_glyph16_table[depth_index];
else
vga_draw_glyph8 = vga_draw_glyph8_table[depth_index];
vga_draw_glyph9 = vga_draw_glyph9_table[depth_index];
dest = ds_get_data(s->ds);
linesize = ds_get_linesize(s->ds);
dest = surface_data(surface);
linesize = surface_stride(surface);
ch_attr_ptr = s->last_ch_attr;
line = 0;
offset = s->start_addr * 4;
......@@ -1465,7 +1468,7 @@ static void vga_draw_text(VGACommonState *s, int full_update)
ch_attr_ptr++;
}
if (cx_max != -1) {
dpy_gfx_update(s->ds, cx_min * cw, cy * cheight,
dpy_gfx_update(s->con, cx_min * cw, cy * cheight,
(cx_max - cx_min + 1) * cw, cheight);
}
dest += linesize * cheight;
......@@ -1636,6 +1639,7 @@ void vga_dirty_log_stop(VGACommonState *s)
*/
static void vga_draw_graphic(VGACommonState *s, int full_update)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int y1, y, update, linesize, y_start, double_scan, mask, depth;
int width, height, shift_control, line_offset, bwidth, bits;
ram_addr_t page0, page1, page_min, page_max;
......@@ -1691,13 +1695,13 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
height != s->last_height ||
s->last_depth != depth) {
if (depth == 32 || (depth == 16 && !byteswap)) {
qemu_free_displaysurface(s->ds);
s->ds->surface = qemu_create_displaysurface_from(disp_width, height, depth,
s->line_offset,
surface = qemu_create_displaysurface_from(disp_width,
height, depth, s->line_offset,
s->vram_ptr + (s->start_addr * 4), byteswap);
dpy_gfx_resize(s->ds);
dpy_gfx_replace_surface(s->con, surface);
} else {
qemu_console_resize(s->ds, disp_width, height);
qemu_console_resize(s->con, disp_width, height);
surface = qemu_console_surface(s->con);
}
s->last_scr_width = disp_width;
s->last_scr_height = height;
......@@ -1706,19 +1710,18 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
s->last_line_offset = s->line_offset;
s->last_depth = depth;
full_update = 1;
} else if (is_buffer_shared(s->ds->surface) &&
(full_update || ds_get_data(s->ds) != s->vram_ptr
} else if (is_buffer_shared(surface) &&
(full_update || surface_data(surface) != s->vram_ptr
+ (s->start_addr * 4))) {
qemu_free_displaysurface(s->ds);
s->ds->surface = qemu_create_displaysurface_from(disp_width,
height, depth,
s->line_offset,
DisplaySurface *surface;
surface = qemu_create_displaysurface_from(disp_width,
height, depth, s->line_offset,
s->vram_ptr + (s->start_addr * 4), byteswap);
dpy_gfx_setdata(s->ds);
dpy_gfx_replace_surface(s->con, surface);
}
s->rgb_to_pixel =
rgb_to_pixel_dup_table[get_depth_index(s->ds)];
rgb_to_pixel_dup_table[get_depth_index(surface)];
if (shift_control == 0) {
full_update |= update_palette16(s);
......@@ -1767,10 +1770,12 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
break;
}
}
vga_draw_line = vga_draw_line_table[v * NB_DEPTHS + get_depth_index(s->ds)];
vga_draw_line = vga_draw_line_table[v * NB_DEPTHS +
get_depth_index(surface)];
if (!is_buffer_shared(s->ds->surface) && s->cursor_invalidate)
if (!is_buffer_shared(surface) && s->cursor_invalidate) {
s->cursor_invalidate(s);
}
line_offset = s->line_offset;
#if 0
......@@ -1783,8 +1788,8 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
y_start = -1;
page_min = -1;
page_max = 0;
d = ds_get_data(s->ds);
linesize = ds_get_linesize(s->ds);
d = surface_data(surface);
linesize = surface_stride(surface);
y1 = 0;
for(y = 0; y < height; y++) {
addr = addr1;
......@@ -1811,7 +1816,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
page_min = page0;
if (page1 > page_max)
page_max = page1;
if (!(is_buffer_shared(s->ds->surface))) {
if (!(is_buffer_shared(surface))) {
vga_draw_line(s, d, s->vram_ptr + addr, width);
if (s->cursor_draw_line)
s->cursor_draw_line(s, d, y);
......@@ -1819,7 +1824,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
} else {
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(s->ds, 0, y_start,
dpy_gfx_update(s->con, 0, y_start,
disp_width, y - y_start);
y_start = -1;
}
......@@ -1840,7 +1845,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
}
if (y_start >= 0) {
/* flush to display */
dpy_gfx_update(s->ds, 0, y_start,
dpy_gfx_update(s->con, 0, y_start,
disp_width, y - y_start);
}
/* reset modified pages */
......@@ -1855,6 +1860,7 @@ static void vga_draw_graphic(VGACommonState *s, int full_update)
static void vga_draw_blank(VGACommonState *s, int full_update)
{
DisplaySurface *surface = qemu_console_surface(s->con);
int i, w, val;
uint8_t *d;
......@@ -1864,18 +1870,19 @@ static void vga_draw_blank(VGACommonState *s, int full_update)
return;
s->rgb_to_pixel =
rgb_to_pixel_dup_table[get_depth_index(s->ds)];
if (ds_get_bits_per_pixel(s->ds) == 8)
rgb_to_pixel_dup_table[get_depth_index(surface)];
if (surface_bits_per_pixel(surface) == 8) {
val = s->rgb_to_pixel(0, 0, 0);
else
} else {
val = 0;
w = s->last_scr_width * ((ds_get_bits_per_pixel(s->ds) + 7) >> 3);
d = ds_get_data(s->ds);
}
w = s->last_scr_width * surface_bytes_per_pixel(surface);
d = surface_data(surface);
for(i = 0; i < s->last_scr_height; i++) {
memset(d, val, w);
d += ds_get_linesize(s->ds);
d += surface_stride(surface);
}
dpy_gfx_update(s->ds, 0, 0,
dpy_gfx_update(s->con, 0, 0,
s->last_scr_width, s->last_scr_height);
}
......@@ -1886,11 +1893,12 @@ static void vga_draw_blank(VGACommonState *s, int full_update)
static void vga_update_display(void *opaque)
{
VGACommonState *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
int full_update, graphic_mode;
qemu_flush_coalesced_mmio_buffer();
if (ds_get_bits_per_pixel(s->ds) == 0) {
if (surface_bits_per_pixel(surface) == 0) {
/* nothing to do */
} else {
full_update = 0;
......@@ -2064,8 +2072,8 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
cw != s->last_cw || cheight != s->last_ch) {
s->last_scr_width = width * cw;
s->last_scr_height = height * cheight;
qemu_console_resize(s->ds, s->last_scr_width, s->last_scr_height);
dpy_text_resize(s->ds, width, height);
qemu_console_resize(s->con, s->last_scr_width, s->last_scr_height);
dpy_text_resize(s->con, width, height);
s->last_depth = 0;
s->last_width = width;
s->last_height = height;
......@@ -2090,11 +2098,11 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
s->cr[VGA_CRTC_CURSOR_END] != s->cursor_end || full_update) {
cursor_visible = !(s->cr[VGA_CRTC_CURSOR_START] & 0x20);
if (cursor_visible && cursor_offset < size && cursor_offset >= 0)
dpy_text_cursor(s->ds,
dpy_text_cursor(s->con,
TEXTMODE_X(cursor_offset),
TEXTMODE_Y(cursor_offset));
else
dpy_text_cursor(s->ds, -1, -1);
dpy_text_cursor(s->con, -1, -1);
s->cursor_offset = cursor_offset;
s->cursor_start = s->cr[VGA_CRTC_CURSOR_START];
s->cursor_end = s->cr[VGA_CRTC_CURSOR_END];
......@@ -2107,7 +2115,7 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
for (i = 0; i < size; src ++, dst ++, i ++)
console_write_ch(dst, VMEM2CHTYPE(le32_to_cpu(*src)));
dpy_text_update(s->ds, 0, 0, width, height);
dpy_text_update(s->con, 0, 0, width, height);
} else {
c_max = 0;
......@@ -2130,7 +2138,7 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
if (c_min <= c_max) {
i = TEXTMODE_Y(c_min);
dpy_text_update(s->ds, 0, i, width, TEXTMODE_Y(c_max) - i + 1);
dpy_text_update(s->con, 0, i, width, TEXTMODE_Y(c_max) - i + 1);
}
}
......@@ -2155,8 +2163,8 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
/* Display a message */
s->last_width = 60;
s->last_height = height = 3;
dpy_text_cursor(s->ds, -1, -1);
dpy_text_resize(s->ds, s->last_width, height);
dpy_text_cursor(s->con, -1, -1);
dpy_text_resize(s->con, s->last_width, height);
for (dst = chardata, i = 0; i < s->last_width * height; i ++)
console_write_ch(dst ++, ' ');
......@@ -2167,7 +2175,7 @@ static void vga_update_text(void *opaque, console_ch_t *chardata)
for (i = 0; i < size; i ++)
console_write_ch(dst ++, 0x00200100 | msg_buffer[i]);
dpy_text_update(s->ds, 0, 0, s->last_width, height);
dpy_text_update(s->con, 0, 0, s->last_width, height);
}
static uint64_t vga_mem_read(void *opaque, hwaddr addr,
......@@ -2439,10 +2447,11 @@ static void vga_screen_dump(void *opaque, const char *filename, bool cswitch,
Error **errp)
{
VGACommonState *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->con);
if (cswitch) {
vga_invalidate_display(s);
}
vga_hw_update();
ppm_save(filename, s->ds->surface, errp);
ppm_save(filename, surface, errp);
}
hw/vga_int.h
浏览文件 @ e531761d
......@@ -132,7 +132,7 @@ typedef struct VGACommonState {
uint32_t vbe_bank_mask;
int vbe_mapped;
/* display refresh support */
DisplayState *ds;
QemuConsole *con;
uint32_t font_offsets[2];
int graphic_mode;
uint8_t shift_control;
......
hw/vmware_vga.c
浏览文件 @ e531761d
......@@ -57,9 +57,6 @@ struct vmsvga_state_s {
int new_height;
uint32_t guest;
uint32_t svgaid;
uint32_t wred;
uint32_t wgreen;
uint32_t wblue;
int syncing;
MemoryRegion fifo_ram;
......@@ -289,6 +286,7 @@ enum {
static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
int x, int y, int w, int h)
{
DisplaySurface *surface = qemu_console_surface(s->vga.con);
int line;
int bypl;
int width;
......@@ -305,11 +303,11 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
fprintf(stderr, "%s: update w was < 0 (%d)\n", __func__, w);
w = 0;
}
if (x + w > ds_get_width(s->vga.ds)) {
if (x + w > surface_width(surface)) {
fprintf(stderr, "%s: update width too large x: %d, w: %d\n",
__func__, x, w);
x = MIN(x, ds_get_width(s->vga.ds));
w = ds_get_width(s->vga.ds) - x;
x = MIN(x, surface_width(surface));
w = surface_width(surface) - x;
}
if (y < 0) {
......@@ -321,23 +319,23 @@ static inline void vmsvga_update_rect(struct vmsvga_state_s *s,
fprintf(stderr, "%s: update h was < 0 (%d)\n", __func__, h);
h = 0;
}
if (y + h > ds_get_height(s->vga.ds)) {
if (y + h > surface_height(surface)) {
fprintf(stderr, "%s: update height too large y: %d, h: %d\n",
__func__, y, h);
y = MIN(y, ds_get_height(s->vga.ds));
h = ds_get_height(s->vga.ds) - y;
y = MIN(y, surface_height(surface));
h = surface_height(surface) - y;
}
bypl = ds_get_linesize(s->vga.ds);
width = ds_get_bytes_per_pixel(s->vga.ds) * w;
start = ds_get_bytes_per_pixel(s->vga.ds) * x + bypl * y;
bypl = surface_stride(surface);
width = surface_bytes_per_pixel(surface) * w;
start = surface_bytes_per_pixel(surface) * x + bypl * y;
src = s->vga.vram_ptr + start;
dst = ds_get_data(s->vga.ds) + start;
dst = surface_data(surface) + start;
for (line = h; line > 0; line--, src += bypl, dst += bypl) {
memcpy(dst, src, width);
}
dpy_gfx_update(s->vga.ds, x, y, w, h);
dpy_gfx_update(s->vga.con, x, y, w, h);
}
static inline void vmsvga_update_rect_delayed(struct vmsvga_state_s *s,
......@@ -373,9 +371,10 @@ static inline void vmsvga_update_rect_flush(struct vmsvga_state_s *s)
static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
int x0, int y0, int x1, int y1, int w, int h)
{
DisplaySurface *surface = qemu_console_surface(s->vga.con);
uint8_t *vram = s->vga.vram_ptr;
int bypl = ds_get_linesize(s->vga.ds);
int bypp = ds_get_bytes_per_pixel(s->vga.ds);
int bypl = surface_stride(surface);
int bypp = surface_bytes_per_pixel(surface);
int width = bypp * w;
int line = h;
uint8_t *ptr[2];
......@@ -402,8 +401,9 @@ static inline void vmsvga_copy_rect(struct vmsvga_state_s *s,
static inline void vmsvga_fill_rect(struct vmsvga_state_s *s,
uint32_t c, int x, int y, int w, int h)
{
int bypl = ds_get_linesize(s->vga.ds);
int width = ds_get_bytes_per_pixel(s->vga.ds) * w;
DisplaySurface *surface = qemu_console_surface(s->vga.con);
int bypl = surface_stride(surface);
int width = surface_bytes_per_pixel(surface) * w;
int line = h;
int column;
uint8_t *fst;
......@@ -416,14 +416,14 @@ static inline void vmsvga_fill_rect(struct vmsvga_state_s *s,
col[2] = c >> 16;
col[3] = c >> 24;
fst = s->vga.vram_ptr + ds_get_bytes_per_pixel(s->vga.ds) * x + bypl * y;
fst = s->vga.vram_ptr + surface_bytes_per_pixel(surface) * x + bypl * y;
if (line--) {
dst = fst;
src = col;
for (column = width; column > 0; column--) {
*(dst++) = *(src++);
if (src - col == ds_get_bytes_per_pixel(s->vga.ds)) {
if (src - col == surface_bytes_per_pixel(surface)) {
src = col;
}
}
......@@ -490,7 +490,7 @@ static inline void vmsvga_cursor_define(struct vmsvga_state_s *s,
qc = cursor_builtin_left_ptr();
}
dpy_cursor_define(s->vga.ds, qc);
dpy_cursor_define(s->vga.con, qc);
cursor_put(qc);
}
#endif
......@@ -720,6 +720,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
{
uint32_t caps;
struct vmsvga_state_s *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->vga.con);
switch (s->index) {
case SVGA_REG_ID:
......@@ -729,10 +730,10 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
return s->enable;
case SVGA_REG_WIDTH:
return ds_get_width(s->vga.ds);
return surface_width(surface);
case SVGA_REG_HEIGHT:
return ds_get_height(s->vga.ds);
return surface_height(surface);
case SVGA_REG_MAX_WIDTH:
return SVGA_MAX_WIDTH;
......@@ -750,13 +751,13 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
return 0x0;
case SVGA_REG_RED_MASK:
return s->wred;
return surface->pf.rmask;
case SVGA_REG_GREEN_MASK:
return s->wgreen;
return surface->pf.gmask;
case SVGA_REG_BLUE_MASK:
return s->wblue;
return surface->pf.bmask;
case SVGA_REG_BYTES_PER_LINE:
return s->bypp * s->new_width;
......@@ -785,7 +786,7 @@ static uint32_t vmsvga_value_read(void *opaque, uint32_t address)
caps |= SVGA_CAP_RECT_FILL;
#endif
#ifdef HW_MOUSE_ACCEL
if (dpy_cursor_define_supported(s->vga.ds)) {
if (dpy_cursor_define_supported(s->vga.con)) {
caps |= SVGA_CAP_CURSOR | SVGA_CAP_CURSOR_BYPASS_2 |
SVGA_CAP_CURSOR_BYPASS;
}
......@@ -947,7 +948,7 @@ static void vmsvga_value_write(void *opaque, uint32_t address, uint32_t value)
s->cursor.on &= (value != SVGA_CURSOR_ON_HIDE);
#ifdef HW_MOUSE_ACCEL
if (value <= SVGA_CURSOR_ON_SHOW) {
dpy_mouse_set(s->vga.ds, s->cursor.x, s->cursor.y, s->cursor.on);
dpy_mouse_set(s->vga.con, s->cursor.x, s->cursor.y, s->cursor.on);
}
#endif
break;
......@@ -982,9 +983,11 @@ static void vmsvga_bios_write(void *opaque, uint32_t address, uint32_t data)
static inline void vmsvga_check_size(struct vmsvga_state_s *s)
{
if (s->new_width != ds_get_width(s->vga.ds) ||
s->new_height != ds_get_height(s->vga.ds)) {
qemu_console_resize(s->vga.ds, s->new_width, s->new_height);
DisplaySurface *surface = qemu_console_surface(s->vga.con);
if (s->new_width != surface_width(surface) ||
s->new_height != surface_height(surface)) {
qemu_console_resize(s->vga.con, s->new_width, s->new_height);
s->invalidated = 1;
}
}
......@@ -992,6 +995,7 @@ static inline void vmsvga_check_size(struct vmsvga_state_s *s)
static void vmsvga_update_display(void *opaque)
{
struct vmsvga_state_s *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->vga.con);
bool dirty = false;
if (!s->enable) {
......@@ -1011,19 +1015,19 @@ static void vmsvga_update_display(void *opaque)
if (memory_region_is_logging(&s->vga.vram)) {
vga_sync_dirty_bitmap(&s->vga);
dirty = memory_region_get_dirty(&s->vga.vram, 0,
ds_get_linesize(s->vga.ds) * ds_get_height(s->vga.ds),
surface_stride(surface) * surface_height(surface),
DIRTY_MEMORY_VGA);
}
if (s->invalidated || dirty) {
s->invalidated = 0;
memcpy(ds_get_data(s->vga.ds), s->vga.vram_ptr,
ds_get_linesize(s->vga.ds) * ds_get_height(s->vga.ds));
dpy_gfx_update(s->vga.ds, 0, 0,
ds_get_width(s->vga.ds), ds_get_height(s->vga.ds));
memcpy(surface_data(surface), s->vga.vram_ptr,
surface_stride(surface) * surface_height(surface));
dpy_gfx_update(s->vga.con, 0, 0,
surface_width(surface), surface_height(surface));
}
if (dirty) {
memory_region_reset_dirty(&s->vga.vram, 0,
ds_get_linesize(s->vga.ds) * ds_get_height(s->vga.ds),
surface_stride(surface) * surface_height(surface),
DIRTY_MEMORY_VGA);
}
}
......@@ -1063,17 +1067,19 @@ static void vmsvga_screen_dump(void *opaque, const char *filename, bool cswitch,
Error **errp)
{
struct vmsvga_state_s *s = opaque;
DisplaySurface *surface = qemu_console_surface(s->vga.con);
if (!s->enable) {
s->vga.screen_dump(&s->vga, filename, cswitch, errp);
return;
}
if (ds_get_bits_per_pixel(s->vga.ds) == 32) {
if (surface_bits_per_pixel(surface) == 32) {
DisplaySurface *ds = qemu_create_displaysurface_from(
ds_get_width(s->vga.ds),
ds_get_height(s->vga.ds),
surface_width(surface),
surface_height(surface),
32,
ds_get_linesize(s->vga.ds),
surface_stride(surface),
s->vga.vram_ptr, false);
ppm_save(filename, ds, errp);
g_free(ds);
......@@ -1143,14 +1149,16 @@ static const VMStateDescription vmstate_vmware_vga = {
static void vmsvga_init(struct vmsvga_state_s *s,
MemoryRegion *address_space, MemoryRegion *io)
{
DisplaySurface *surface;
s->scratch_size = SVGA_SCRATCH_SIZE;
s->scratch = g_malloc(s->scratch_size * 4);
s->vga.ds = graphic_console_init(vmsvga_update_display,
vmsvga_invalidate_display,
vmsvga_screen_dump,
vmsvga_text_update, s);
s->vga.con = graphic_console_init(vmsvga_update_display,
vmsvga_invalidate_display,
vmsvga_screen_dump,
vmsvga_text_update, s);
surface = qemu_console_surface(s->vga.con);
s->fifo_size = SVGA_FIFO_SIZE;
memory_region_init_ram(&s->fifo_ram, "vmsvga.fifo", s->fifo_size);
......@@ -1162,11 +1170,8 @@ static void vmsvga_init(struct vmsvga_state_s *s,
vmstate_register(NULL, 0, &vmstate_vga_common, &s->vga);
/* Save some values here in case they are changed later.
* This is suspicious and needs more though why it is needed. */
s->depth = ds_get_bits_per_pixel(s->vga.ds);
s->bypp = ds_get_bytes_per_pixel(s->vga.ds);
s->wred = ds_get_rmask(s->vga.ds);
s->wgreen = ds_get_gmask(s->vga.ds);
s->wblue = ds_get_bmask(s->vga.ds);
s->depth = surface_bits_per_pixel(surface);
s->bypp = surface_bytes_per_pixel(surface);
}
static uint64_t vmsvga_io_read(void *opaque, hwaddr addr, unsigned size)
......
hw/xenfb.c
浏览文件 @ e531761d
......@@ -54,7 +54,7 @@
struct common {
struct XenDevice xendev; /* must be first */
void *page;
DisplayState *ds;
QemuConsole *con;
};
struct XenInput {
......@@ -318,8 +318,9 @@ static void xenfb_mouse_event(void *opaque,
int dx, int dy, int dz, int button_state)
{
struct XenInput *xenfb = opaque;
int dw = ds_get_width(xenfb->c.ds);
int dh = ds_get_height(xenfb->c.ds);
DisplaySurface *surface = qemu_console_surface(xenfb->c.con);
int dw = surface_width(surface);
int dh = surface_height(surface);
int i;
if (xenfb->abs_pointer_wanted)
......@@ -353,16 +354,9 @@ static int input_initialise(struct XenDevice *xendev)
struct XenInput *in = container_of(xendev, struct XenInput, c.xendev);
int rc;
if (!in->c.ds) {
char *vfb = xenstore_read_str(NULL, "device/vfb");
if (vfb == NULL) {
/* there is no vfb, run vkbd on its own */
in->c.ds = get_displaystate();
} else {
g_free(vfb);
xen_be_printf(xendev, 1, "ds not set (yet)\n");
return -1;
}
if (!in->c.con) {
xen_be_printf(xendev, 1, "ds not set (yet)\n");
return -1;
}
rc = common_bind(&in->c);
......@@ -615,12 +609,13 @@ static int xenfb_configure_fb(struct XenFB *xenfb, size_t fb_len_lim,
*/
static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h)
{
DisplaySurface *surface = qemu_console_surface(xenfb->c.con);
int line, oops = 0;
int bpp = ds_get_bits_per_pixel(xenfb->c.ds);
int linesize = ds_get_linesize(xenfb->c.ds);
uint8_t *data = ds_get_data(xenfb->c.ds);
int bpp = surface_bits_per_pixel(surface);
int linesize = surface_stride(surface);
uint8_t *data = surface_data(surface);
if (!is_buffer_shared(xenfb->c.ds->surface)) {
if (!is_buffer_shared(surface)) {
switch (xenfb->depth) {
case 8:
if (bpp == 16) {
......@@ -648,10 +643,10 @@ static void xenfb_guest_copy(struct XenFB *xenfb, int x, int y, int w, int h)
xen_be_printf(&xenfb->c.xendev, 0, "%s: oops: convert %d -> %d bpp?\n",
__FUNCTION__, xenfb->depth, bpp);
dpy_gfx_update(xenfb->c.ds, x, y, w, h);
dpy_gfx_update(xenfb->c.con, x, y, w, h);
}
#ifdef XENFB_TYPE_REFRESH_PERIOD
#if 0 /* def XENFB_TYPE_REFRESH_PERIOD */
static int xenfb_queue_full(struct XenFB *xenfb)
{
struct xenfb_page *page = xenfb->c.page;
......@@ -703,13 +698,14 @@ static void xenfb_send_refresh_period(struct XenFB *xenfb, int period)
static void xenfb_update(void *opaque)
{
struct XenFB *xenfb = opaque;
DisplaySurface *surface;
int i;
if (xenfb->c.xendev.be_state != XenbusStateConnected)
return;
if (xenfb->feature_update) {
#ifdef XENFB_TYPE_REFRESH_PERIOD
#if 0 /* XENFB_TYPE_REFRESH_PERIOD */
struct DisplayChangeListener *l;
int period = 99999999;
int idle = 1;
......@@ -753,21 +749,20 @@ static void xenfb_update(void *opaque)
case 16:
case 32:
/* console.c supported depth -> buffer can be used directly */
qemu_free_displaysurface(xenfb->c.ds);
xenfb->c.ds->surface = qemu_create_displaysurface_from
surface = qemu_create_displaysurface_from
(xenfb->width, xenfb->height, xenfb->depth,
xenfb->row_stride, xenfb->pixels + xenfb->offset,
false);
break;
default:
/* we must convert stuff */
qemu_resize_displaysurface(xenfb->c.ds, xenfb->width, xenfb->height);
surface = qemu_create_displaysurface(xenfb->width, xenfb->height);
break;
}
dpy_gfx_replace_surface(xenfb->c.con, surface);
xen_be_printf(&xenfb->c.xendev, 1, "update: resizing: %dx%d @ %d bpp%s\n",
xenfb->width, xenfb->height, xenfb->depth,
is_buffer_shared(xenfb->c.ds->surface) ? " (shared)" : "");
dpy_gfx_resize(xenfb->c.ds);
is_buffer_shared(surface) ? " (shared)" : "");
xenfb->up_fullscreen = 1;
}
......@@ -1009,16 +1004,16 @@ wait_more:
/* vfb */
fb = container_of(xfb, struct XenFB, c.xendev);
fb->c.ds = graphic_console_init(xenfb_update,
xenfb_invalidate,
NULL,
NULL,
fb);
fb->c.con = graphic_console_init(xenfb_update,
xenfb_invalidate,
NULL,
NULL,
fb);
fb->have_console = 1;
/* vkbd */
in = container_of(xin, struct XenInput, c.xendev);
in->c.ds = fb->c.ds;
in->c.con = fb->c.con;
/* retry ->init() */
xen_be_check_state(xin);
......
hw/xilinx_spips.c
浏览文件 @ e531761d
......@@ -115,6 +115,19 @@
#define SNOOP_NONE 0xFE
#define SNOOP_STRIPING 0
typedef enum {
READ = 0x3,
FAST_READ = 0xb,
DOR = 0x3b,
QOR = 0x6b,
DIOR = 0xbb,
QIOR = 0xeb,
PP = 0x2,
DPP = 0xa2,
QPP = 0x32,
} FlashCMD;
typedef struct {
SysBusDevice busdev;
MemoryRegion iomem;
......@@ -141,10 +154,15 @@ typedef struct {
hwaddr lqspi_cached_addr;
} XilinxSPIPS;
#define TYPE_XILINX_SPIPS "xilinx,spips"
#define XILINX_SPIPS(obj) \
OBJECT_CHECK(XilinxSPIPS, (obj), TYPE_XILINX_SPIPS)
static inline int num_effective_busses(XilinxSPIPS *s)
{
return (s->regs[R_LQSPI_STS] & LQSPI_CFG_SEP_BUS &&
s->regs[R_LQSPI_STS] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1;
return (s->regs[R_LQSPI_CFG] & LQSPI_CFG_SEP_BUS &&
s->regs[R_LQSPI_CFG] & LQSPI_CFG_TWO_MEM) ? s->num_busses : 1;
}
static void xilinx_spips_update_cs_lines(XilinxSPIPS *s)
......@@ -197,7 +215,7 @@ static void xilinx_spips_update_ixr(XilinxSPIPS *s)
static void xilinx_spips_reset(DeviceState *d)
{
XilinxSPIPS *s = DO_UPCAST(XilinxSPIPS, busdev.qdev, d);
XilinxSPIPS *s = XILINX_SPIPS(d);
int i;
for (i = 0; i < R_MAX; i++) {
......@@ -251,15 +269,19 @@ static void xilinx_spips_flush_txfifo(XilinxSPIPS *s)
switch (s->snoop_state) {
case (SNOOP_CHECKING):
switch (tx) { /* new instruction code */
case 0x0b: /* dual/quad output read DOR/QOR */
case 0x6b:
s->snoop_state = 4;
case READ: /* 3 address bytes, no dummy bytes/cycles */
case PP:
case DPP:
case QPP:
s->snoop_state = 3;
break;
/* FIXME: these vary between vendor - set to spansion */
case 0xbb: /* high performance dual read DIOR */
case FAST_READ: /* 3 address bytes, 1 dummy byte */
case DOR:
case QOR:
case DIOR: /* FIXME: these vary between vendor - set to spansion */
s->snoop_state = 4;
break;
case 0xeb: /* high performance quad read QIOR */
case QIOR: /* 3 address bytes, 2 dummy bytes */
s->snoop_state = 6;
break;
default:
......@@ -483,9 +505,10 @@ static const MemoryRegionOps lqspi_ops = {
}
};
static int xilinx_spips_init(SysBusDevice *dev)
static void xilinx_spips_realize(DeviceState *dev, Error **errp)
{
XilinxSPIPS *s = FROM_SYSBUS(typeof(*s), dev);
XilinxSPIPS *s = XILINX_SPIPS(dev);
SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
int i;
DB_PRINT("inited device model\n");
......@@ -494,31 +517,29 @@ static int xilinx_spips_init(SysBusDevice *dev)
for (i = 0; i < s->num_busses; ++i) {
char bus_name[16];
snprintf(bus_name, 16, "spi%d", i);
s->spi[i] = ssi_create_bus(&dev->qdev, bus_name);
s->spi[i] = ssi_create_bus(dev, bus_name);
}
s->cs_lines = g_new(qemu_irq, s->num_cs * s->num_busses);
s->cs_lines = g_new0(qemu_irq, s->num_cs * s->num_busses);
ssi_auto_connect_slaves(DEVICE(s), s->cs_lines, s->spi[0]);
ssi_auto_connect_slaves(DEVICE(s), s->cs_lines, s->spi[1]);
sysbus_init_irq(dev, &s->irq);
sysbus_init_irq(sbd, &s->irq);
for (i = 0; i < s->num_cs * s->num_busses; ++i) {
sysbus_init_irq(dev, &s->cs_lines[i]);
sysbus_init_irq(sbd, &s->cs_lines[i]);
}
memory_region_init_io(&s->iomem, &spips_ops, s, "spi", R_MAX*4);
sysbus_init_mmio(dev, &s->iomem);
sysbus_init_mmio(sbd, &s->iomem);
memory_region_init_io(&s->mmlqspi, &lqspi_ops, s, "lqspi",
(1 << LQSPI_ADDRESS_BITS) * 2);
sysbus_init_mmio(dev, &s->mmlqspi);
sysbus_init_mmio(sbd, &s->mmlqspi);
s->irqline = -1;
s->lqspi_cached_addr = ~0ULL;
fifo8_create(&s->rx_fifo, RXFF_A);
fifo8_create(&s->tx_fifo, TXFF_A);
return 0;
}
static int xilinx_spips_post_load(void *opaque, int version_id)
......@@ -552,16 +573,15 @@ static Property xilinx_spips_properties[] = {
static void xilinx_spips_class_init(ObjectClass *klass, void *data)
{
DeviceClass *dc = DEVICE_CLASS(klass);
SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
sdc->init = xilinx_spips_init;
dc->realize = xilinx_spips_realize;
dc->reset = xilinx_spips_reset;
dc->props = xilinx_spips_properties;
dc->vmsd = &vmstate_xilinx_spips;
}
static const TypeInfo xilinx_spips_info = {
.name = "xilinx,spips",
.name = TYPE_XILINX_SPIPS,
.parent = TYPE_SYS_BUS_DEVICE,
.instance_size = sizeof(XilinxSPIPS),
.class_init = xilinx_spips_class_init,
......
include/qemu-common.h
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......@@ -442,4 +442,10 @@ int64_t pow2floor(int64_t value);
int uleb128_encode_small(uint8_t *out, uint32_t n);
int uleb128_decode_small(const uint8_t *in, uint32_t *n);
/*
* Hexdump a buffer to a file. An optional string prefix is added to every line
*/
void hexdump(const char *buf, FILE *fp, const char *prefix, size_t size);
#endif
include/ui/console.h
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include/ui/spice-display.h
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target-mips/dsp_helper.c
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target-s390x/kvm.c
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......@@ -315,8 +315,7 @@ void kvm_arch_post_run(CPUState *cpu, struct kvm_run *run)
int kvm_arch_process_async_events(CPUState *cs)
{
S390CPU *cpu = S390_CPU(cs);
return cpu->env.halted;
return cs->halted;
}
void kvm_s390_interrupt_internal(S390CPU *cpu, int type, uint32_t parm,
......
tests/tcg/mips/mips32-dsp/extr_w.c
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trace-events
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ui/cocoa.m
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ui/console.c
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ui/curses.c
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ui/gtk.c
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ui/sdl.c
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ui/spice-display.c
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ui/vnc-enc-tight.c
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ui/vnc-jobs.c
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......@@ -183,7 +183,6 @@ static void vnc_async_encoding_start(VncState *orig, VncState *local)
{
local->vnc_encoding = orig->vnc_encoding;
local->features = orig->features;
local->ds = orig->ds;
local->vd = orig->vd;
local->lossy_rect = orig->lossy_rect;
local->write_pixels = orig->write_pixels;
......
ui/vnc.c
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ui/vnc.h
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util/Makefile.objs
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......@@ -9,3 +9,4 @@ util-obj-y += error.o qemu-error.o
util-obj-$(CONFIG_POSIX) += compatfd.o
util-obj-y += iov.o aes.o qemu-config.o qemu-sockets.o uri.o notify.o
util-obj-y += qemu-option.o qemu-progress.o
util-obj-y += hexdump.o
util/hexdump.c 0 → 100644
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util/iov.c
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vl.c
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此差异已折叠。
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